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Wed, 19 Jun 2024 07:18:11 -0700 (PDT) Received: from [172.31.0.109] ([136.36.72.243]) by smtp.gmail.com with ESMTPSA id af79cd13be357-798abe47feasm610754285a.113.2024.06.19.07.18.10 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Jun 2024 07:18:10 -0700 (PDT) Message-ID: Date: Wed, 19 Jun 2024 08:18:09 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Beta Content-Language: en-US To: "gcc-patches@gcc.gnu.org" From: Jeff Law Subject: [to-be-committed] [RISC-V] [PATCH V2] Minor cleanup/improvement to bset/binv patterns X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Changes since V1: Whitespace fixes noted by the linter Missed using the iterator for the output template in _mask pattern! --- This patch introduces a bit_optab iterator that maps IOR/XOR to bset and binv (and one day bclr if we need it). That allows us to combine some patterns that only differed in the RTL opcode (IOR vs XOR) and in the name/assembly (bset vs binv). Additionally this also allow us to use the iterator in the bsetmask and bsetidisi patterns thus potentially fixing a missed optimization. This has gone through my tester. I'll wait for a verdict from pre-commit CI before moving forward. Jeff This patch introduces a bit_optab iterator that maps IOR/XOR to bset and binv (and one day bclr if we need it). That allows us to combine some patterns that only differed in the RTL opcode (IOR vs XOR) and in the name/assembly (bset vs binv). Additionally this also allow us to use the iterator in the bsetmask and bsetidisi patterns thus potentially fixing a missed optimization. This has gone through my tester. I'll wait for a verdict from pre-commit CI before moving forward. diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md index ae5e7e510c0..3eedabffca0 100644 --- a/gcc/config/riscv/bitmanip.md +++ b/gcc/config/riscv/bitmanip.md @@ -569,24 +569,26 @@ (define_insn_and_split "*minmax" ;; ZBS extension. -(define_insn "*bset" +(define_insn "*" [(set (match_operand:X 0 "register_operand" "=r") - (ior:X (ashift:X (const_int 1) - (match_operand:QI 2 "register_operand" "r")) - (match_operand:X 1 "register_operand" "r")))] + (any_or:X (ashift:X (const_int 1) + (match_operand:QI 2 "register_operand" "r")) + (match_operand:X 1 "register_operand" "r")))] "TARGET_ZBS" - "bset\t%0,%1,%2" + "\t%0,%1,%2" [(set_attr "type" "bitmanip")]) -(define_insn "*bset_mask" +(define_insn "*_mask" [(set (match_operand:X 0 "register_operand" "=r") - (ior:X (ashift:X (const_int 1) - (subreg:QI - (and:X (match_operand:X 2 "register_operand" "r") - (match_operand 3 "" "")) 0)) - (match_operand:X 1 "register_operand" "r")))] + (any_or:X + (ashift:X + (const_int 1) + (subreg:QI + (and:X (match_operand:X 2 "register_operand" "r") + (match_operand 3 "" "")) 0)) + (match_operand:X 1 "register_operand" "r")))] "TARGET_ZBS" - "bset\t%0,%1,%2" + "\t%0,%1,%2" [(set_attr "type" "bitmanip")]) (define_insn "*bset_1" @@ -655,24 +657,24 @@ (define_insn "*bset_1_mask" "bset\t%0,x0,%1" [(set_attr "type" "bitmanip")]) -(define_insn "*bseti" +(define_insn "*i" [(set (match_operand:X 0 "register_operand" "=r") - (ior:X (match_operand:X 1 "register_operand" "r") - (match_operand:X 2 "single_bit_mask_operand" "DbS")))] + (any_or:X (match_operand:X 1 "register_operand" "r") + (match_operand:X 2 "single_bit_mask_operand" "DbS")))] "TARGET_ZBS" - "bseti\t%0,%1,%S2" + "i\t%0,%1,%S2" [(set_attr "type" "bitmanip")]) ;; As long as the SImode operand is not a partial subreg, we can use a ;; bseti without postprocessing, as the middle end is smart enough to ;; stay away from the signbit. -(define_insn "*bsetidisi" +(define_insn "*idisi" [(set (match_operand:DI 0 "register_operand" "=r") - (ior:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r")) - (match_operand 2 "single_bit_mask_operand" "i")))] + (any_or:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r")) + (match_operand 2 "single_bit_mask_operand" "i")))] "TARGET_ZBS && TARGET_64BIT && !partial_subreg_p (operands[1])" - "bseti\t%0,%1,%S2" + "i\t%0,%1,%S2" [(set_attr "type" "bitmanip")]) ;; We can easily handle zero extensions @@ -781,23 +783,6 @@ (define_split (and:DI (rotate:DI (const_int -2) (match_dup 1)) (match_dup 3)))]) -(define_insn "*binv" - [(set (match_operand:X 0 "register_operand" "=r") - (xor:X (ashift:X (const_int 1) - (match_operand:QI 2 "register_operand" "r")) - (match_operand:X 1 "register_operand" "r")))] - "TARGET_ZBS" - "binv\t%0,%1,%2" - [(set_attr "type" "bitmanip")]) - -(define_insn "*binvi" - [(set (match_operand:X 0 "register_operand" "=r") - (xor:X (match_operand:X 1 "register_operand" "r") - (match_operand:X 2 "single_bit_mask_operand" "DbS")))] - "TARGET_ZBS" - "binvi\t%0,%1,%S2" - [(set_attr "type" "bitmanip")]) - (define_insn "*bext" [(set (match_operand:X 0 "register_operand" "=r") (zero_extract:X (match_operand:X 1 "register_operand" "r") diff --git a/gcc/config/riscv/iterators.md b/gcc/config/riscv/iterators.md index 1e37e843023..20745faa55e 100644 --- a/gcc/config/riscv/iterators.md +++ b/gcc/config/riscv/iterators.md @@ -275,6 +275,9 @@ (define_code_attr optab [(ashift "ashl") (fix "fix_trunc") (unsigned_fix "fixuns_trunc")]) +(define_code_attr bit_optab [(ior "bset") + (xor "binv")]) + ;; code attributes (define_code_attr or_optab [(ior "ior") (xor "xor")])