From patchwork Fri May 31 01:02:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1941895 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=QnBAo6gX; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Vr4dz6t3nz20Wc for ; Fri, 31 May 2024 11:04:39 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3FB993858C41 for ; Fri, 31 May 2024 01:04:37 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) by sourceware.org (Postfix) with ESMTPS id 0A9223858D29 for ; Fri, 31 May 2024 01:04:14 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0A9223858D29 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 0A9223858D29 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.12 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1717117457; cv=none; b=eORl4N6gNPVbxu5D4dxj58VH3xOvGUXyNms0AxmuJypTMrzFZnsMli+sOFS+Ry4OS57L4TTESdUH3+mK/3RvRxJexC9v4XZVRMA6+OgM/xZC1KdkNTR7swCaC1Z8M8vBW6ua6GEx6+qr8OY99m+sk0SSazffyuYQbZzOmwwoA0o= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1717117457; c=relaxed/simple; bh=M62botAfwr19B/83C6xxrZtwCOcNy6INflmgKwBaq3U=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=mYKDtVPNm3rfRy2xoCeMMShUpZNbAQE1TeYJozd25bIExhtwybYN6XOR2aYyLXdHnWby2eeedqi5JbEv39u/8RLQPU+BhpdqjM2wACFMUn/vGkHjChp7lh6cf4OvOKQUW9soJYpDmFmraJcMLQhps78kP/U0kdgkgD0LM/qBg8c= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1717117455; x=1748653455; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=M62botAfwr19B/83C6xxrZtwCOcNy6INflmgKwBaq3U=; b=QnBAo6gXJczptOQY4i+0f+kDzYDTsazD/3yglob5+hUu7P8Fb3+7FrVq EFVwvWcxNHUwJQGGTHH4ByBAYDwwGUDDWlv7DE8Sr8zJ+ldLFrnY+LMea QyKCywsj+2VsneOY551NocpEf0pF/LCrGKrxNcYawKixADHnQ7Zd9LeHQ 1q6/Xx3TE+cuYMMV+F9rvG8zknG/+Wt9ASFVr4ns86QXeZfCxbFXDiEgQ oQkK/ybWBgd3YxZ5ksdvmLPkU+vbrSwJF9+y3o5oOiYIR75BvbO0Za4pm P7b4U5qoEZLcDPFOEy210m2FNHve0gClUqlpUUWYLmMI+DyrnnFzWfqhN g==; X-CSE-ConnectionGUID: vvM2QU1BSiC3Vemo+FiujQ== X-CSE-MsgGUID: xKTLRHUCSLybK6tu4JlV8Q== X-IronPort-AV: E=McAfee;i="6600,9927,11088"; a="25047300" X-IronPort-AV: E=Sophos;i="6.08,202,1712646000"; d="scan'208";a="25047300" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 May 2024 18:04:14 -0700 X-CSE-ConnectionGUID: HtW4uyrySj+tckq0Mqs3hA== X-CSE-MsgGUID: qou55jokST++xdmBG0T7og== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,202,1712646000"; d="scan'208";a="40453341" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmviesa005.fm.intel.com with ESMTP; 30 May 2024 18:04:11 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 2E2C210081FF; Fri, 31 May 2024 09:04:11 +0800 (CST) From: liuhongt To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com Subject: [committed] [x86] Rename double_u with __double_u to avoid pulluting the namespace. Date: Fri, 31 May 2024 09:02:11 +0800 Message-Id: <20240531010211.633818-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Committed as an obvious patch. gcc/ChangeLog: * config/i386/emmintrin.h (__double_u): Rename from double_u. (_mm_load_sd): Replace double_u with __double_u. (_mm_store_sd): Ditto. (_mm_loadh_pd): Ditto. (_mm_loadl_pd): Ditto. * config/i386/xmmintrin.h (__float_u): Rename from float_u. (_mm_load_ss): Ditto. (_mm_store_ss): Ditto. --- gcc/config/i386/emmintrin.h | 10 +++++----- gcc/config/i386/xmmintrin.h | 6 +++--- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/gcc/config/i386/emmintrin.h b/gcc/config/i386/emmintrin.h index fa301103daf..356ca218fcb 100644 --- a/gcc/config/i386/emmintrin.h +++ b/gcc/config/i386/emmintrin.h @@ -56,7 +56,7 @@ typedef double __m128d __attribute__ ((__vector_size__ (16), __may_alias__)); /* Unaligned version of the same types. */ typedef long long __m128i_u __attribute__ ((__vector_size__ (16), __may_alias__, __aligned__ (1))); typedef double __m128d_u __attribute__ ((__vector_size__ (16), __may_alias__, __aligned__ (1))); -typedef double double_u __attribute__ ((__may_alias__, __aligned__ (1))); +typedef double __double_u __attribute__ ((__may_alias__, __aligned__ (1))); /* Create a selector for use with the SHUFPD instruction. */ #define _MM_SHUFFLE2(fp1,fp0) \ @@ -146,7 +146,7 @@ _mm_load1_pd (double const *__P) extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_load_sd (double const *__P) { - return __extension__ (__m128d) { *(double_u *)__P, 0.0 }; + return __extension__ (__m128d) { *(__double_u *)__P, 0.0 }; } extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) @@ -181,7 +181,7 @@ _mm_storeu_pd (double *__P, __m128d __A) extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_store_sd (double *__P, __m128d __A) { - *(double_u *)__P = ((__v2df)__A)[0] ; + *(__double_u *)__P = ((__v2df)__A)[0] ; } extern __inline double __attribute__((__gnu_inline__, __always_inline__, __artificial__)) @@ -974,13 +974,13 @@ _mm_unpacklo_pd (__m128d __A, __m128d __B) extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_loadh_pd (__m128d __A, double const *__B) { - return __extension__ (__m128d) { ((__v2df)__A)[0], *(double_u*)__B }; + return __extension__ (__m128d) { ((__v2df)__A)[0], *(__double_u*)__B }; } extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_loadl_pd (__m128d __A, double const *__B) { - return __extension__ (__m128d) { *(double_u*)__B, ((__v2df)__A)[1] }; + return __extension__ (__m128d) { *(__double_u*)__B, ((__v2df)__A)[1] }; } extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) diff --git a/gcc/config/i386/xmmintrin.h b/gcc/config/i386/xmmintrin.h index 87515ecb218..c90fc71331a 100644 --- a/gcc/config/i386/xmmintrin.h +++ b/gcc/config/i386/xmmintrin.h @@ -72,7 +72,7 @@ typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__)); /* Unaligned version of the same type. */ typedef float __m128_u __attribute__ ((__vector_size__ (16), __may_alias__, __aligned__ (1))); -typedef float float_u __attribute__ ((__may_alias__, __aligned__ (1))); +typedef float __float_u __attribute__ ((__may_alias__, __aligned__ (1))); /* Internal data types for implementing the intrinsics. */ typedef float __v4sf __attribute__ ((__vector_size__ (16))); @@ -910,7 +910,7 @@ _mm_set_ps1 (float __F) extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_load_ss (float const *__P) { - return __extension__ (__m128) (__v4sf){ *(float_u *)__P, 0.0f, 0.0f, 0.0f }; + return __extension__ (__m128) (__v4sf){ *(__float_u *)__P, 0.0f, 0.0f, 0.0f }; } /* Create a vector with all four elements equal to *P. */ @@ -966,7 +966,7 @@ _mm_setr_ps (float __Z, float __Y, float __X, float __W) extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_store_ss (float *__P, __m128 __A) { - *(float_u *)__P = ((__v4sf)__A)[0]; + *(__float_u *)__P = ((__v4sf)__A)[0]; } extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__))