From patchwork Thu May 30 07:59:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 1941566 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VqdwC28n9z20Pc for ; Thu, 30 May 2024 18:00:27 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B84A3385ED4C for ; Thu, 30 May 2024 08:00:24 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 63CD13858D20 for ; Thu, 30 May 2024 07:59:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 63CD13858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 63CD13858D20 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1717056001; cv=none; b=lfGWKoDNzp8toCTJY40sAQ2i99vNHW/G4qzUqNmHZ/jkWonLEm8DWpL1o7/dxQJrXj4vzWJZDcQn40fa7CyvUjLN056ynerw/QqRZ9uY3u1srUXLSpNwsQb3dBbadjQJQbIBUT+yXNzrG/dyOCQhJ7RG4WYeyfcPDlc8BtRW3+M= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1717056001; c=relaxed/simple; bh=mBDamS5N9fNoB5u5JcOuTBe+1CQ/u71JzEVbp5LRO7Y=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=gtVg8AvkFt3ZtYtrb9EfT1Ac513n7k18fU7IS45mS1xIb0SWWVpURjjSqW/pFV1M90d+NC4pxuZEX1qzBmrg4IJQigGOkG2xbNwq2cYHhIJ1X8u5dGlHQhO6YPDP0Fk8lMH7BCTn8+RwpB3mjWs9KQOigWYJl++dHz82yOl6aaU= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3E946339; Thu, 30 May 2024 01:00:23 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8CF0C3F762; Thu, 30 May 2024 00:59:58 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, vmakarov@redhat.com, richard.sandiford@arm.com Cc: vmakarov@redhat.com Subject: [PATCH] ira: Fix go_through_subreg offset calculation [PR115281] Date: Thu, 30 May 2024 08:59:57 +0100 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 X-Spam-Status: No, score=-20.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org go_through_subreg used: else if (!can_div_trunc_p (SUBREG_BYTE (x), REGMODE_NATURAL_SIZE (GET_MODE (x)), offset)) to calculate the register offset for a pseudo subreg x. In the blessed days before poly-int, this was: *offset = (SUBREG_BYTE (x) / REGMODE_NATURAL_SIZE (GET_MODE (x))); But I think this is testing the wrong natural size. If we exclude paradoxical subregs (which will get an offset of zero regardless), it's the inner register that is being split, so it should be the inner register's natural size that we use. This matters in the testcase because we have an SFmode lowpart subreg into the last of three variable-sized vectors. The SUBREG_BYTE is therefore equal to the size of two variable-sized vectors. Dividing by the vector size gives a register offset of 2, as expected, but dividing by the size of a scalar FPR would give a variable offset. I think something similar could happen for fixed-size targets if REGMODE_NATURAL_SIZE is different for vectors and integers (say). Tested on aarch64-linux-gnu & x86_64-linux-gnu. OK to install? Richard gcc/ PR rtl-optimization/115281 * ira-conflicts.cc (go_through_subreg): Use the natural size of the inner mode rather than the outer mode. gcc/testsuite/ PR rtl-optimization/115281 * gfortran.dg/pr115281.f90: New test. --- gcc/ira-conflicts.cc | 3 +- gcc/testsuite/gfortran.dg/pr115281.f90 | 39 ++++++++++++++++++++++++++ 2 files changed, 41 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gfortran.dg/pr115281.f90 diff --git a/gcc/ira-conflicts.cc b/gcc/ira-conflicts.cc index 83274c53330..15ac42d8848 100644 --- a/gcc/ira-conflicts.cc +++ b/gcc/ira-conflicts.cc @@ -227,8 +227,9 @@ go_through_subreg (rtx x, int *offset) if (REGNO (reg) < FIRST_PSEUDO_REGISTER) *offset = subreg_regno_offset (REGNO (reg), GET_MODE (reg), SUBREG_BYTE (x), GET_MODE (x)); + /* The offset is always 0 for paradoxical subregs. */ else if (!can_div_trunc_p (SUBREG_BYTE (x), - REGMODE_NATURAL_SIZE (GET_MODE (x)), offset)) + REGMODE_NATURAL_SIZE (GET_MODE (reg)), offset)) /* Checked by validate_subreg. We must know at compile time which inner hard registers are being accessed. */ gcc_unreachable (); diff --git a/gcc/testsuite/gfortran.dg/pr115281.f90 b/gcc/testsuite/gfortran.dg/pr115281.f90 new file mode 100644 index 00000000000..80aa822e745 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pr115281.f90 @@ -0,0 +1,39 @@ +! { dg-options "-O3" } +! { dg-additional-options "-mcpu=neoverse-v1" { target aarch64*-*-* } } + +SUBROUTINE fn0(ma, mb, nt) + CHARACTER ca + REAL r0(ma) + INTEGER i0(mb) + REAL r1(3,mb) + REAL r2(3,mb) + REAL r3(3,3) + zero=0.0 + do na = 1, nt + nt = i0(na) + do l = 1, 3 + r1 (l, na) = r0 (nt) + r2(l, na) = zero + enddo + enddo + if (ca .ne.'z') then + do j = 1, 3 + do i = 1, 3 + r4 = zero + enddo + enddo + do na = 1, nt + do k = 1, 3 + do l = 1, 3 + do m = 1, 3 + r3 = r4 * v + enddo + enddo + enddo + do i = 1, 3 + do k = 1, ifn (r3) + enddo + enddo + enddo + endif +END