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[216.114.108.10]) by smtp.gmail.com with ESMTPSA id af79cd13be357-794d2f82f60sm59342885a.37.2024.05.28.08.53.27 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 May 2024 08:53:27 -0700 (PDT) From: mitchell.augustin@canonical.com To: kernel-team@lists.ubuntu.com Subject: [SRU][Noble][PATCH v2 1/1] UBUNTU: [Config]: Configure TPM drivers as builtins for arm64 in annotations Date: Tue, 28 May 2024 10:53:26 -0500 Message-Id: <20240528155326.249643-1-mitchell.augustin@canonical.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Mitchell Augustin BugLink: https://bugs.launchpad.net/bugs/2037688 Sets the following configs for arm64 to resolve the above issue on Grace systems: CONFIG_SPI_TEGRA210_QUAD=y CONFIG_TCG_TIS_SPI=y --- debian.master/config/annotations | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/debian.master/config/annotations b/debian.master/config/annotations index 702fca42e937..2b0a91d7cb73 100644 --- a/debian.master/config/annotations +++ b/debian.master/config/annotations @@ -13326,7 +13326,7 @@ CONFIG_SPI_SYNQUACER policy<{'arm64': 'm'}> CONFIG_SPI_TEGRA114 policy<{'arm64': 'm', 'armhf': 'm'}> CONFIG_SPI_TEGRA20_SFLASH policy<{'arm64': 'm', 'armhf': 'm'}> CONFIG_SPI_TEGRA20_SLINK policy<{'arm64': 'm', 'armhf': 'm'}> -CONFIG_SPI_TEGRA210_QUAD policy<{'arm64': 'm', 'armhf': 'm'}> +CONFIG_SPI_TEGRA210_QUAD policy<{'arm64': 'y', 'armhf': 'm'}> CONFIG_SPI_THUNDERX policy<{'arm64': 'm'}> CONFIG_SPI_TI_QSPI policy<{'armhf': 'm'}> CONFIG_SPI_TLE62X0 policy<{'amd64': 'm', 'arm64': 'm', 'armhf': 'm', 'ppc64el': 'm', 'riscv64': 'm', 's390x': '-'}> @@ -13627,7 +13627,7 @@ CONFIG_TCG_TIS policy<{'amd64': 'y', 'arm64': ' CONFIG_TCG_TIS_CORE policy<{'amd64': 'y', 'arm64': 'y', 'armhf': 'y', 'ppc64el': 'y', 'riscv64': 'y'}> CONFIG_TCG_TIS_I2C policy<{'amd64': 'm', 'arm64': 'm', 'armhf': 'm', 'ppc64el': 'm', 'riscv64': 'm', 's390x': 'n'}> CONFIG_TCG_TIS_I2C_CR50 policy<{'amd64': 'm', 'arm64': 'm', 'armhf': 'm', 'ppc64el': 'm', 'riscv64': 'm', 's390x': 'n'}> -CONFIG_TCG_TIS_SPI policy<{'amd64': 'm', 'arm64': 'm', 'armhf': 'm', 'ppc64el': 'm', 'riscv64': 'm', 's390x': '-'}> +CONFIG_TCG_TIS_SPI policy<{'amd64': 'm', 'arm64': 'y', 'armhf': 'm', 'ppc64el': 'm', 'riscv64': 'm', 's390x': '-'}> CONFIG_TCG_TIS_SPI_CR50 policy<{'amd64': 'y', 'arm64': 'y', 'armhf': 'y', 'ppc64el': 'y', 'riscv64': 'y'}> CONFIG_TCG_TIS_ST33ZP24 policy<{'amd64': 'm', 'arm64': 'm', 'armhf': 'm', 'ppc64el': 'm', 'riscv64': 'm'}> CONFIG_TCG_TIS_ST33ZP24_I2C policy<{'amd64': 'm', 'arm64': 'm', 'armhf': 'm', 'ppc64el': 'm', 'riscv64': 'm', 's390x': 'n'}>