From patchwork Tue May 28 13:12:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manorit Chawdhry X-Patchwork-Id: 1940481 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=w0Rgj/Ga; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VpXyB6CDwz20Pb for ; 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Tue, 28 May 2024 08:13:10 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 28 May 2024 08:13:10 -0500 Received: from [127.0.1.1] (uda0497581.dhcp.ti.com [10.24.68.185]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44SDD25d099882; Tue, 28 May 2024 08:13:07 -0500 From: Manorit Chawdhry Date: Tue, 28 May 2024 18:42:55 +0530 Subject: [PATCH v2 1/4] mtd: spi-nor-core: Do not start or end writes at odd address in DTR mode MIME-Version: 1.0 Message-ID: <20240528-b4-upstream-j721s2-ospi-support-v2-1-b2e372ebcdd7@ti.com> References: <20240528-b4-upstream-j721s2-ospi-support-v2-0-b2e372ebcdd7@ti.com> In-Reply-To: <20240528-b4-upstream-j721s2-ospi-support-v2-0-b2e372ebcdd7@ti.com> To: Jagan Teki , Vignesh R , "Tom Rini" CC: , Nishanth Menon , Udit Kumar , Vaishnav Achath , Prasanth Mantena , Apurva Nandan , Manorit Chawdhry , Pratyush Yadav , Jonathan Humphreys X-Mailer: b4 0.14-dev X-Developer-Signature: v=1; a=ed25519-sha256; t=1716901982; l=2516; i=m-chawdhry@ti.com; s=20231127; h=from:subject:message-id; bh=9yJbeJJh1BRRq3TrIe4BKBlxZYXEQL3vpgJQbGr0ri4=; b=qteamt4A1AAHNxM7J+KaoNRX4t+hjuuNdi5W//DyDbuAzM73y9PHzzexeyFzNGz2GJaLVkG7Z oVf/elUNhSgDTuYX5eEH1tU0fUWoRQIvZJwxQyFQzdIQ203MsPhlefe X-Developer-Key: i=m-chawdhry@ti.com; a=ed25519; pk=fsr6Tm39TvsTgfyfFQLk+nnqIz2sBA1PthfqqfiiYSs= X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Pratyush Yadav On DTR capable flashes like Micron Xcella the writes cannot start or end at an odd address in DTR mode. Extra 0xff bytes need to be prepended or appended respectively to make sure both the start and end addresses are even. Signed-off-by: Pratyush Yadav Signed-off-by: Apurva Nandan Signed-off-by: Vignesh Raghavendra Tested-by: Jonathan Humphreys Signed-off-by: Manorit Chawdhry --- drivers/mtd/spi/spi-nor-core.c | 59 +++++++++++++++++++++++++++++++++++++++--- 1 file changed, 55 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 982dd251150d..aea611fef523 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1804,11 +1804,62 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, if (ret < 0) return ret; #endif + write_enable(nor); - ret = nor->write(nor, addr, page_remain, buf + i); - if (ret < 0) - goto write_err; - written = ret; + + /* + * On DTR capable flashes like Micron Xcella the writes cannot + * start or end at an odd address in DTR mode. So we need to + * append or prepend extra 0xff bytes to make sure the start + * address and end address are even. + */ + if (spi_nor_protocol_is_dtr(nor->write_proto) && + ((addr | page_remain) & 1)) { + u_char *tmp; + size_t extra_bytes = 0; + + tmp = kmalloc(nor->page_size, 0); + if (!tmp) { + ret = -ENOMEM; + goto write_err; + } + + /* Prepend a 0xff byte if the start address is odd. */ + if (addr & 1) { + tmp[0] = 0xff; + memcpy(tmp + 1, buf + i, page_remain); + addr--; + page_remain++; + extra_bytes++; + } else { + memcpy(tmp, buf + i, page_remain); + } + + /* Append a 0xff byte if the end address is odd. */ + if ((addr + page_remain) & 1) { + tmp[page_remain + extra_bytes] = 0xff; + extra_bytes++; + page_remain++; + } + + ret = nor->write(nor, addr, page_remain, tmp); + + kfree(tmp); + + if (ret < 0) + goto write_err; + + /* + * We write extra bytes but they are not part of the + * original write. + */ + written = ret - extra_bytes; + } else { + ret = nor->write(nor, addr, page_remain, buf + i); + if (ret < 0) + goto write_err; + written = ret; + } ret = spi_nor_wait_till_ready(nor); if (ret) From patchwork Tue May 28 13:12:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manorit Chawdhry X-Patchwork-Id: 1940482 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=F4CdqwgZ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VpXyP5R2Wz20Pb for ; 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Tue, 28 May 2024 08:13:14 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 28 May 2024 08:13:14 -0500 Received: from [127.0.1.1] (uda0497581.dhcp.ti.com [10.24.68.185]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44SDD25e099882; Tue, 28 May 2024 08:13:11 -0500 From: Manorit Chawdhry Date: Tue, 28 May 2024 18:42:56 +0530 Subject: [PATCH v2 2/4] arch: arm: dts: k3-j721s2-r5: Override ospi and fss for 32-bit mode MIME-Version: 1.0 Message-ID: <20240528-b4-upstream-j721s2-ospi-support-v2-2-b2e372ebcdd7@ti.com> References: <20240528-b4-upstream-j721s2-ospi-support-v2-0-b2e372ebcdd7@ti.com> In-Reply-To: <20240528-b4-upstream-j721s2-ospi-support-v2-0-b2e372ebcdd7@ti.com> To: Jagan Teki , Vignesh R , "Tom Rini" CC: , Nishanth Menon , Udit Kumar , Vaishnav Achath , Prasanth Mantena , Apurva Nandan , Manorit Chawdhry X-Mailer: b4 0.14-dev X-Developer-Signature: v=1; a=ed25519-sha256; t=1716901982; l=1089; i=m-chawdhry@ti.com; s=20231127; h=from:subject:message-id; bh=Ey5QAkMhGgZY3grA1qkl4TVVquMYYC3zUvy1Ir5J5gc=; b=y53p20jcAIKWGadghDrZFUTREH1yobTLdQVL/5U6nX4+h+4D79hg325Jx4zDRNCtF4OKHeHXW bzO2EmxnajZCFxdg+2qC7S22282/E97raS1zIIEvjaAUSEW5kexo8ma X-Developer-Key: i=m-chawdhry@ti.com; a=ed25519; pk=fsr6Tm39TvsTgfyfFQLk+nnqIz2sBA1PthfqqfiiYSs= X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean R5 being a 32-bit processor can't understand the 64-bit mapping being done in ospi node. Override the ospi node for 32-bit register ranges and the fss node ( the parent node of ospi ) to map the ranges for the updated child node correctly. Reviewed-by: Apurva Nandan Signed-off-by: Manorit Chawdhry --- arch/arm/dts/k3-j721s2-r5.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/dts/k3-j721s2-r5.dtsi b/arch/arm/dts/k3-j721s2-r5.dtsi index eb0df42583a3..dbea6b9d0113 100644 --- a/arch/arm/dts/k3-j721s2-r5.dtsi +++ b/arch/arm/dts/k3-j721s2-r5.dtsi @@ -79,3 +79,16 @@ &mcu_udmap { ti,sci = <&dm_tifs>; }; + +&ospi0 { + reg = <0x0 0x47040000 0x0 0x100>, + <0x0 0x50000000 0x0 0x8000000>; +}; + +&fss { + /* fss node has 64 bit address regions mapped to it and since the ospi + * nodes is being override, override the fss node ranges as well + */ + ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>, + <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>; +}; From patchwork Tue May 28 13:12:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manorit Chawdhry X-Patchwork-Id: 1940483 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Tue, 28 May 2024 08:13:21 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 28 May 2024 08:13:21 -0500 Received: from [127.0.1.1] (uda0497581.dhcp.ti.com [10.24.68.185]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44SDD25g099882; Tue, 28 May 2024 08:13:18 -0500 From: Manorit Chawdhry Date: Tue, 28 May 2024 18:42:58 +0530 Subject: [PATCH v2 4/4] configs: j721s2_evm_*_defconfig: Enable OSPI configs MIME-Version: 1.0 Message-ID: <20240528-b4-upstream-j721s2-ospi-support-v2-4-b2e372ebcdd7@ti.com> References: <20240528-b4-upstream-j721s2-ospi-support-v2-0-b2e372ebcdd7@ti.com> In-Reply-To: <20240528-b4-upstream-j721s2-ospi-support-v2-0-b2e372ebcdd7@ti.com> To: Jagan Teki , Vignesh R , "Tom Rini" CC: , Nishanth Menon , Udit Kumar , Vaishnav Achath , Prasanth Mantena , Apurva Nandan , Manorit Chawdhry X-Mailer: b4 0.14-dev X-Developer-Signature: v=1; a=ed25519-sha256; t=1716901982; l=1728; i=m-chawdhry@ti.com; s=20231127; h=from:subject:message-id; bh=0/UHQYY1xWXN1CZ1qbIdU6AOWxiibriO1I3saTLW8ik=; b=2ddwONwoefWGFxj4K0kNPQ3meFnqXfYxZzTeCOwiWSMpB5C8Dw0d5uWvuIvzKsq8wFif73dXU HGL53cVSvrnBgnQ4/aUu0egdrqLbsyx8d3klcIgq48aCN0Wl9ZocpTu X-Developer-Key: i=m-chawdhry@ti.com; a=ed25519; pk=fsr6Tm39TvsTgfyfFQLk+nnqIz2sBA1PthfqqfiiYSs= X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Enable OSPI related configs to boot using OSPI Reviewed-by: Apurva Nandan Signed-off-by: Manorit Chawdhry --- configs/j721s2_evm_a72_defconfig | 3 +++ configs/j721s2_evm_r5_defconfig | 3 +++ 2 files changed, 6 insertions(+) diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 5ed8d00662e3..326beedea411 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -51,6 +51,7 @@ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_MTD=y +CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_DM_RESET=y @@ -59,6 +60,8 @@ CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_THERMAL=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 3c958cafbe8f..4039841488f9 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -57,6 +57,7 @@ CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_MTD=y +CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_DM_RESET=y @@ -66,6 +67,8 @@ CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_REMOTEPROC=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_THERMAL=y