From patchwork Tue May 28 05:37:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1940226 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=AOrp0FmH; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VpLvg1vlhz20Q3 for ; Tue, 28 May 2024 15:40:28 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1895E3864849 for ; Tue, 28 May 2024 05:40:26 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by sourceware.org (Postfix) with ESMTPS id 164583858C78 for ; Tue, 28 May 2024 05:40:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 164583858C78 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 164583858C78 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716874808; cv=none; b=bFddcjFRQ+ek3tgm61a79z02FT9K6/ourKF965u6BUZeMy5/ywMZXJi4adbjywFajuGG1WdnCAhVs+g4ZFTTnyYkYtRtHGmOI9yeCCEJDWRRrg+lAq5MMRS9oEu0AnA7J4DEr0lZ23G9CWHG81v8qJ76lROzSVTlDVNrXkiVywg= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716874808; c=relaxed/simple; bh=bNeTwHr1D2A+OzypiR0itjdYiDQQu85Avb0ZIgjNIGc=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=tIK5i2VMg8Iom81P1em68xSh8yLFaLl3+1o/jPecir8D3on9wECqGdEYa33dOGDLQM8XT3YSTUK1B0MtaeUUrYQc3AGQkGeIRtbohiRN6DbKpPLuXyA4OthsqJCXO8wuIJKnYklgTJlNc72QTg8TJxCP1cpWbJvKdqpM17raODI= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716874806; x=1748410806; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=bNeTwHr1D2A+OzypiR0itjdYiDQQu85Avb0ZIgjNIGc=; b=AOrp0FmHdeco82EReYy5x5nYLhCxKxqYb81CDEH4R7Z9Zeh0J4RcCNxu scNqXe0iuwn8Ya40AjKJb1uKAlEcZQDMhXtiFRVhabwIKz185mn/3IUoM zEXjtzE6hy5FvQGV7c1K2svd79aZAsDe8iGncts6a4kYyznjtA+jCEqT3 rUHVEXCnghjAPYO+qI0n/QNfJBDAtTlcWPTdmHp0qRVl4amVb7I2rWpKn XB2G9siWoOugi3g2F62mD6z71QCwbAEbJKXDEAyCxL8jS06L8hccohnlU kz8TWNfhujr9JCKSb4uwSOzikr0vueuTtHMyyni4CV/UVfeLrDRmafAD0 Q==; X-CSE-ConnectionGUID: 1VycnU/iQEW2jh+NUh294Q== X-CSE-MsgGUID: A2dXAO9IRuaoV7kS3N5msQ== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="13039366" X-IronPort-AV: E=Sophos;i="6.08,194,1712646000"; d="scan'208";a="13039366" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 May 2024 22:40:02 -0700 X-CSE-ConnectionGUID: vyntyNZpRD+nXMumpDL4gg== X-CSE-MsgGUID: D7rzjde+Q6aa0NiR+ATSSw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,194,1712646000"; d="scan'208";a="72359557" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orviesa001.jf.intel.com with ESMTP; 27 May 2024 22:40:00 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 4A640100737A; Tue, 28 May 2024 13:39:59 +0800 (CST) From: liuhongt To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com Subject: [PATCH][committed] [avx512] Fix predicate mismatch between vfcmaddcph's define_insn and define_expand. Date: Tue, 28 May 2024 13:37:59 +0800 Message-Id: <20240528053759.1820019-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org When I applied Roger's patch [1], there's ICE due to it. The patch fix the latent bug. [1] https://gcc.gnu.org/pipermail/gcc-patches/2024-May/651365.html Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Pushed to trunk. gcc/ChangeLog: * config/i386/sse.md (___mask): Align operands' predicate with corresponding expander. (__): Ditto. --- gcc/config/i386/sse.md | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index b59c988fc31..0f4fbcb2c5d 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -6867,9 +6867,9 @@ (define_insn "___mask" [(set (match_operand:VHF_AVX512VL 0 "register_operand" "=&v") (vec_merge:VHF_AVX512VL (unspec:VHF_AVX512VL - [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand" "v") - (match_operand:VHF_AVX512VL 2 "nonimmediate_operand" "") - (match_operand:VHF_AVX512VL 3 "register_operand" "0")] + [(match_operand:VHF_AVX512VL 1 "" "v") + (match_operand:VHF_AVX512VL 2 "" "") + (match_operand:VHF_AVX512VL 3 "" "0")] UNSPEC_COMPLEX_F_C_MA) (match_dup 1) (unspec: @@ -6892,8 +6892,8 @@ (define_expand "cmul3" (define_insn "__" [(set (match_operand:VHF_AVX512VL 0 "register_operand" "=&v") (unspec:VHF_AVX512VL - [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand" "v") - (match_operand:VHF_AVX512VL 2 "nonimmediate_operand" "")] + [(match_operand:VHF_AVX512VL 1 "" "v") + (match_operand:VHF_AVX512VL 2 "" "")] UNSPEC_COMPLEX_F_C_MUL))] "TARGET_AVX512FP16 && " {