From patchwork Sun May 19 14:45:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henry Bell X-Patchwork-Id: 1936828 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=protonmail.com header.i=@protonmail.com header.a=rsa-sha256 header.s=protonmail3 header.b=PlAzG+o9; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Vj92T2ldyz20KF for ; Mon, 20 May 2024 04:58:25 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 8D4E68816A; Sun, 19 May 2024 20:58:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; secure) header.d=protonmail.com header.i=@protonmail.com header.b="PlAzG+o9"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id CB714880DB; Sun, 19 May 2024 16:45:45 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-4319.protonmail.ch (mail-4319.protonmail.ch [185.70.43.19]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 560B188027 for ; Sun, 19 May 2024 16:45:43 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dmoo_dv@protonmail.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1716129942; x=1716389142; bh=mCRV2hXSq1ZMB/7kFcHLQCzYwBnJMnYboqVZAW4E/Ec=; h=Date:To:From:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=PlAzG+o9wwzjvanjMzX3eF/vWJvjGn4hK8KT1AyjQP2j2/Tg1wL20tyuOd0X240IF DZoSMzSQkskl+2BWEDId40UGdTMVtmK6JwV4uc4cx1pv10wX+tYEAGBVsvmv2Cldzl oZn4GygZZ4AtViy79/mF9GkdsbL1Fc8yBvDzzw1Tu4p6IG9VlCYIk3QQgJUQcRZb78 u/ycqk/6GKnDJcCeFt9/yYLeznnm3cQrruih1fD+wkKoVWx1UtGPB+mkDdmTCFiCcH zFIhp+k9otdd+3y9I+49h/0GmKUtLHAN7OZQAy7iPkPYGzqXatZkzThRXw3GUJYGh+ BKz8+pRkDVw1g== Date: Sun, 19 May 2024 14:45:39 +0000 To: "u-boot@lists.denx.de" From: H Bell Subject: [PATCH 1/2 v3] board: starfive: support Pine64 Star64 board Message-ID: Feedback-ID: 106097379:user:proton X-Pm-Message-ID: 66eedc1d54de1cc6696e008cfb361ef1e3c91241 MIME-Version: 1.0 X-Mailman-Approved-At: Sun, 19 May 2024 20:58:11 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Similar to the Milk-V Mars, The Star64 board contains few differences to the VisionFive 2 boards, so can be part of the same U-boot build. Signed-off-by: Henry Bell Cc: ycliang@andestech.com Cc: heinrich.schuchardt@canonical.com --- Changes since v1 - Fix typos on naming - Create pine64_star64 struct to be populated with PHY values once confirmed Changes since v2 - Set delays to 0 - Add missing 10/100/1000 clocks across the two devices - Set all uA values to 2910 --- board/starfive/visionfive2/spl.c | 91 +++++++++++++++++++ .../visionfive2/starfive_visionfive2.c | 4 + 2 files changed, 95 insertions(+) diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c index ca61b5be22..ad30c06f99 100644 --- a/board/starfive/visionfive2/spl.c +++ b/board/starfive/visionfive2/spl.c @@ -86,6 +86,45 @@ static const struct starfive_vf2_pro starfive_verb[] = { "tx-internal-delay-ps", "0"}, }; +static const struct starfive_vf2_pro star64_pine64[] = { + {"/soc/ethernet@16030000", "starfive,tx-use-rgmii-clk", NULL}, + {"/soc/ethernet@16040000", "starfive,tx-use-rgmii-clk", NULL}, + + {"/soc/ethernet@16030000/mdio/ethernet-phy@0", + "motorcomm,tx-clk-adj-enabled", NULL}, + {"/soc/ethernet@16030000/mdio/ethernet-phy@0", + "motorcomm,tx-clk-10-inverted", NULL}, + {"/soc/ethernet@16030000/mdio/ethernet-phy@0", + "motorcomm,tx-clk-100-inverted", NULL}, + {"/soc/ethernet@16030000/mdio/ethernet-phy@0", + "motorcomm,tx-clk-1000-inverted", NULL}, + {"/soc/ethernet@16030000/mdio/ethernet-phy@0", + "motorcomm,rx-clk-drv-microamp", "2910"}, + {"/soc/ethernet@16030000/mdio/ethernet-phy@0", + "motorcomm,rx-data-drv-microamp", "2910"}, + {"/soc/ethernet@16030000/mdio/ethernet-phy@0", + "rx-internal-delay-ps", "0"}, + {"/soc/ethernet@16030000/mdio/ethernet-phy@0", + "tx-internal-delay-ps", "0"}, + + {"/soc/ethernet@16040000/mdio/ethernet-phy@1", + "motorcomm,tx-clk-adj-enabled", NULL}, + {"/soc/ethernet@16040000/mdio/ethernet-phy@1", + "motorcomm,tx-clk-10-inverted", NULL}, + {"/soc/ethernet@16040000/mdio/ethernet-phy@1", + "motorcomm,tx-clk-100-inverted", NULL}, + {"/soc/ethernet@16040000/mdio/ethernet-phy@0", + "motorcomm,tx-clk-1000-inverted", NULL}, + {"/soc/ethernet@16040000/mdio/ethernet-phy@1", + "motorcomm,rx-clk-drv-microamp", "2910"}, + {"/soc/ethernet@16040000/mdio/ethernet-phy@1", + "motorcomm,rx-data-drv-microamp", "2910"}, + {"/soc/ethernet@16040000/mdio/ethernet-phy@1", + "rx-internal-delay-ps", "0"}, + {"/soc/ethernet@16040000/mdio/ethernet-phy@1", + "tx-internal-delay-ps", "0"}, +}; + void spl_fdt_fixup_mars(void *fdt) { static const char compat[] = "milkv,mars\0starfive,jh7110"; @@ -226,6 +265,56 @@ void spl_fdt_fixup_version_b(void *fdt) } } +void spl_fdt_fixup_star64(void *fdt) +{ + static const char compat[] = "pine64,star64\0starfive,jh7110"; + u32 phandle; + u8 i; + int offset; + int ret; + + fdt_setprop(fdt, fdt_path_offset(fdt, "/"), "compatible", compat, sizeof(compat)); + fdt_setprop_string(fdt, fdt_path_offset(fdt, "/"), "model", + "Pine64 Star64"); + + /* gmac0 */ + offset = fdt_path_offset(fdt, "/soc/clock-controller@17000000"); + phandle = fdt_get_phandle(fdt, offset); + offset = fdt_path_offset(fdt, "/soc/ethernet@16030000"); + + fdt_setprop_u32(fdt, offset, "assigned-clocks", phandle); + fdt_appendprop_u32(fdt, offset, "assigned-clocks", JH7110_AONCLK_GMAC0_TX); + fdt_setprop_u32(fdt, offset, "assigned-clock-parents", phandle); + fdt_appendprop_u32(fdt, offset, "assigned-clock-parents", + JH7110_AONCLK_GMAC0_RMII_RTX); + + /* gmac1 */ + offset = fdt_path_offset(fdt, "/soc/clock-controller@13020000"); + phandle = fdt_get_phandle(fdt, offset); + offset = fdt_path_offset(fdt, "/soc/ethernet@16040000"); + + fdt_setprop_u32(fdt, offset, "assigned-clocks", phandle); + fdt_appendprop_u32(fdt, offset, "assigned-clocks", JH7110_SYSCLK_GMAC1_TX); + fdt_setprop_u32(fdt, offset, "assigned-clock-parents", phandle); + fdt_appendprop_u32(fdt, offset, "assigned-clock-parents", + JH7110_SYSCLK_GMAC1_RMII_RTX); + + for (i = 0; i < ARRAY_SIZE(star64_pine64); i++) { + offset = fdt_path_offset(fdt, star64_pine64[i].path); + + if (star64_pine64[i].value) + ret = fdt_setprop_u32(fdt, offset, star64_pine64[i].name, + dectoul(star64_pine64[i].value, NULL)); + else + ret = fdt_setprop_empty(fdt, offset, star64_pine64[i].name); + + if (ret) { + pr_err("%s set prop %s fail.\n", __func__, star64_pine64[i].name); + break; + } + } +} + void spl_perform_fixups(struct spl_image_info *spl_image) { u8 version; @@ -252,6 +341,8 @@ void spl_perform_fixups(struct spl_image_info *spl_image) spl_fdt_fixup_version_b(spl_image->fdt_addr); break; }; + } else if (!strncmp(product_id, "STAR64", 6)) { + spl_fdt_fixup_star64(spl_image->fdt_addr); } else { pr_err("Unknown product %s\n", product_id); }; diff --git a/board/starfive/visionfive2/starfive_visionfive2.c b/board/starfive/visionfive2/starfive_visionfive2.c index a86bca533b..1e7c41f01b 100644 --- a/board/starfive/visionfive2/starfive_visionfive2.c +++ b/board/starfive/visionfive2/starfive_visionfive2.c @@ -23,6 +23,8 @@ DECLARE_GLOBAL_DATA_PTR; "starfive/jh7110-starfive-visionfive-2-v1.2a.dtb" #define FDTFILE_VISIONFIVE2_1_3B \ "starfive/jh7110-starfive-visionfive-2-v1.3b.dtb" +#define FDTFILE_PINE64_STAR64 \ + "starfive/jh7110-pine64-star64.dtb" /* enable U74-mc hart1~hart4 prefetcher */ static void enable_prefetcher(void) @@ -78,6 +80,8 @@ static void set_fdtfile(void) fdtfile = FDTFILE_VISIONFIVE2_1_3B; break; } + } else if (!strncmp(product_id, "STAR64", 6)) { + fdtfile = FDTFILE_PINE64_STAR64; } else { log_err("Unknown product\n"); return; From patchwork Sun May 19 14:45:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henry Bell X-Patchwork-Id: 1936829 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=protonmail.com header.i=@protonmail.com header.a=rsa-sha256 header.s=protonmail3 header.b=jeE7OGkv; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Vj92V5WWnz20dF for ; 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Sun, 19 May 2024 16:45:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dmoo_dv@protonmail.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1716129946; x=1716389146; bh=CVeUw3sIlGmaKQPZ+8+7r43FTpMgkdHdPJV+IMmb8tY=; h=Date:To:From:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=jeE7OGkvsEIE5KQQJ+j+AJF8zpL0n/nE6e2LyNuVArFCiN/tdl+w0xPjs1iUrowt6 i3VSX1elz3vhRefBs91AI8Nn7YfMZRZ1WBWoWbZsvsYYvZABfq43VcWjlktvWAfNYh 5UQF3pxE9W5aRq4EcapvQaVWnLPL+ax5M/lx7FowdHd26S7wLr9v1/rPLJReklvaGT oWvFLUCA47p16KU+iYKlSTWqD1dnyQ2y8YWIw1DCaX/aDt4zrYUKDa6YUGzCnj6q4Q ooMDRvzQl0WVR3Vg9o5UD5HFJFjplkfVHvOfU1Ktx+mG5PBmajBVMiSrEOv4cJEkJb oSWRl1VK+LoZg== Date: Sun, 19 May 2024 14:45:42 +0000 To: "u-boot@lists.denx.de" From: H Bell Subject: [PATCH 2/2 v3] board: starfive: support Pine64 Star64 board Message-ID: Feedback-ID: 106097379:user:proton X-Pm-Message-ID: fcbbc23ffbd9a38e6a260956ee8f41fbd79c773c MIME-Version: 1.0 X-Mailman-Approved-At: Sun, 19 May 2024 20:58:11 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add documentation files Signed-off-by: Henry Bell Cc: ycliang@andestech.com Cc: heinrich.schuchardt@canonical.com --- Changes since v1 - New patch Changes since v2 - Remove extra params to - Clarification on boot section - Add entry on MAC adresses and how to correct them --- doc/board/starfive/index.rst | 1 + doc/board/starfive/pine64_star64.rst | 136 +++++++++++++++++++++++++++ 2 files changed, 137 insertions(+) create mode 100644 doc/board/starfive/pine64_star64.rst diff --git a/doc/board/starfive/index.rst b/doc/board/starfive/index.rst index 2762bf74c1..f05f8a0765 100644 --- a/doc/board/starfive/index.rst +++ b/doc/board/starfive/index.rst @@ -7,4 +7,5 @@ StarFive :maxdepth: 1 milk-v_mars.rst + pine64_star64 visionfive2 diff --git a/doc/board/starfive/pine64_star64.rst b/doc/board/starfive/pine64_star64.rst new file mode 100644 index 0000000000..567d1207ba --- /dev/null +++ b/doc/board/starfive/pine64_star64.rst @@ -0,0 +1,136 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Pine64 Star64 +=========== + +U-Boot for the Star64 uses the same U-Boot binaries as the VisionFive 2 board. +In U-Boot SPL the actual board is detected and the device-tree patched +accordingly. + +Building +~~~~~~~~ + +1. Add the RISC-V toolchain to your PATH. +2. Setup ARCH & cross compilation environment variable: + +.. code-block:: none + + export CROSS_COMPILE= + +The M-mode software OpenSBI provides the supervisor binary interface (SBI) and +is responsible for the switch to S-Mode. It is a prerequisite to build U-Boot. +Support for the JH7110 was introduced in OpenSBI 1.2. It is recommended to use +a current release. + +.. code-block:: console + + git clone https://github.com/riscv/opensbi.git + cd opensbi + make PLATFORM=generic FW_TEXT_START=0x40000000 + +Now build the U-Boot SPL and U-Boot proper. + +.. code-block:: console + + cd + make starfive_visionfive2_defconfig + make OPENSBI=$(opensbi_dir)/build/platform/generic/firmware/fw_dynamic.bin + +This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well +as the FIT image (u-boot.itb) with OpenSBI and U-Boot. + +Device-tree selection +~~~~~~~~~~~~~~~~~~~~~ + +U-Boot will set variable $fdtfile to starfive/jh7110-pine64-star64.dtb. + +To overrule this selection the variable can be set manually and saved in the +environment + +:: + + setenv fdtfile my_device-tree.dtb + env save + +or the configuration variable CONFIG_DEFAULT_FDT_FILE can be used to set to +provide a default value. + +Boot source selection +~~~~~~~~~~~~~~~~~~~~~ + +The board provides the DIP switches (marked S1804) adjacent to the 40pin GPIO +Bus for boot selection. The ``L`` (0) and ``H`` (1) silk screening to the side +of the should be used to determine state (not the ``ON/ONKE`` markings +physically on the component). ``GPIO_0`` is channel 2 on the switch, while +``GPIO_1`` is channel 1. + ++ (QSPI) Flash: 00 ``??`` ++ SD: 01 ``??`` ++ EMMC: 10 ``??`` ++ UART: 11 ``??`` + +Preparing the SD-Card +~~~~~~~~~~~~~~~~~~~~~ + +The device firmware loads U-Boot SPL (u-boot-spl.bin.normal.out) from the +partition with type GUID 2E54B353-1271-4842-806F-E436D6AF6985. You are free +to choose any partition number. + +With the default configuration U-Boot SPL loads the U-Boot FIT image +(u-boot.itb) from partition 2 (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2). +When formatting it is recommended to use GUID +BC13C2FF-59E6-4262-A352-B275FD6F7172 for this partition. + +The FIT image (u-boot.itb) is a combination of OpenSBI's fw_dynamic.bin, +u-boot-nodtb.bin and the device tree blob. + +Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch) + +.. code-block:: bash + + sudo sgdisk --clear \ + --set-alignment=2 \ + --new=1:4096:8191 --change-name=1:spl --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985\ + --new=2:8192:16383 --change-name=2:uboot --typecode=2:BC13C2FF-59E6-4262-A352-B275FD6F7172 \ + --new=3:16384:1654784 --change-name=3:system --typecode=3:EBD0A0A2-B9E5-4433-87C0-68B6B72699C7 \ + /dev/sdb + +Copy U-Boot to the SD card + +.. code-block:: bash + + sudo dd if=u-boot-spl.bin.normal.out of=/dev/sdb1 + sudo dd if=u-boot.itb of=/dev/sdb2 + + sudo mount /dev/sdb3 /mnt/ + sudo cp u-boot-spl.bin.normal.out /mnt/ + sudo cp u-boot.itb /mnt/ + sudo cp Image.gz /mnt/ + sudo cp initramfs.cpio.gz /mnt/ + sudo cp jh7110-starfive-visionfive-2.dtb /mnt/ + sudo umount /mnt + +Booting +~~~~~~~ + +Once you plugin the sdcard and power up, you should see the U-Boot prompt. + +MAC address issues +~~~~~~~~~~~~~~~~~~ + +The Star64 does not currently ship with unique serial numbers per-device. +Devices tested (all 4GiB RAM) have the same serial number of +``STAR64V1-2310-D004E000-00000005`` and the mac addresses of +``6c:cf:39:00:75:61`` (lower) and ``6c:cf:39:00:75:62`` (upper) port will be +assigned. Shipped models also have the EEPROM set as write protected, so it +cannot be changed using ``mac`` commands. + +The MAC addresses may be "set" as follows by writing as a custom config to SPI +(Change the last 3 bytes of MAC addreses as appropriate): + +:: + + env set ethaddr 6c:cf:39:00:75:63 + env set eth1addr 6c:cf:39:00:75:64 + env save + reset