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[149.172.150.237]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57421480d99sm10135028a12.8.2024.05.17.08.26.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 17 May 2024 08:26:20 -0700 (PDT) Message-ID: Date: Fri, 17 May 2024 17:26:19 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Cc: rdapp.gcc@gmail.com, palmer , Kito Cheng , "juzhe.zhong@rivai.ai" , jeffreyalaw Content-Language: en-US To: gcc-patches From: Robin Dapp Subject: [PATCH] RISC-V: Add vandn combine helper. X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Hi, this patch adds a combine pattern for vandn as well as tests for it. Regtested on rv64gcv_zvfh_zvbb. Regards Robin gcc/ChangeLog: * config/riscv/autovec-opt.md (*vandn_): New pattern. * config/riscv/vector.md: Add vandn to mode_idx. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vandn-1.c: New test. * gcc.target/riscv/rvv/autovec/binop/vandn-run.c: New test. * gcc.target/riscv/rvv/autovec/binop/vandn-template.h: New test. --- gcc/config/riscv/autovec-opt.md | 18 +++++++ gcc/config/riscv/vector.md | 2 +- .../riscv/rvv/autovec/binop/vandn-1.c | 8 +++ .../riscv/rvv/autovec/binop/vandn-run.c | 54 +++++++++++++++++++ .../riscv/rvv/autovec/binop/vandn-template.h | 38 +++++++++++++ 5 files changed, 119 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-template.h diff --git a/gcc/config/riscv/autovec-opt.md b/gcc/config/riscv/autovec-opt.md index 06438f9e2f7..07372d965b0 100644 --- a/gcc/config/riscv/autovec-opt.md +++ b/gcc/config/riscv/autovec-opt.md @@ -1559,3 +1559,21 @@ (define_insn_and_split "*vwsll_zext1_trunc_scalar_" DONE; } [(set_attr "type" "vwsll")]) + +;; vnot + vand = vandn. +(define_insn_and_split "*vandn_" + [(set (match_operand:V_VLSI 0 "register_operand" "=vr") + (and:V_VLSI + (not:V_VLSI + (match_operand:V_VLSI 2 "register_operand" "vr")) + (match_operand:V_VLSI 1 "register_operand" "vr")))] + "TARGET_ZVBB && can_create_pseudo_p ()" + "#" + "&& 1" + [(const_int 0)] + { + insn_code icode = code_for_pred_vandn (mode); + riscv_vector::emit_vlmax_insn (icode, riscv_vector::BINARY_OP, operands); + DONE; + } + [(set_attr "type" "vandn")]) diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md index c6a3845dc13..dafcd7d9bf9 100644 --- a/gcc/config/riscv/vector.md +++ b/gcc/config/riscv/vector.md @@ -743,7 +743,7 @@ (define_attr "mode_idx" "" vfcmp,vfminmax,vfsgnj,vfclass,vfmerge,vfmov,\ vfcvtitof,vfncvtitof,vfncvtftoi,vfncvtftof,vmalu,vmiota,vmidx,\ vimovxv,vfmovfv,vslideup,vslidedown,vislide1up,vislide1down,vfslide1up,vfslide1down,\ - vgather,vcompress,vmov,vnclip,vnshift") + vgather,vcompress,vmov,vnclip,vnshift,vandn") (const_int 0) (eq_attr "type" "vimovvx,vfmovvf") diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-1.c new file mode 100644 index 00000000000..3bb5bf8dd5b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-1.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvbb" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */ + +#include "vandn-template.h" + +/* { dg-final { scan-assembler-times {\tvandn\.vv} 8 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-run.c new file mode 100644 index 00000000000..243c5975068 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-run.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-require-effective-target "riscv_zvbb_ok" } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvbb" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */ + +#include "vandn-template.h" + +#include + +#define SZ 512 + +#define RUN(TYPE, VAL) \ + TYPE a##TYPE[SZ]; \ + TYPE b##TYPE[SZ]; \ + for (int i = 0; i < SZ; i++) \ + { \ + a##TYPE[i] = 123; \ + b##TYPE[i] = VAL; \ + } \ + vandn_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ); \ + for (int i = 0; i < SZ; i++) \ + assert (a##TYPE[i] == (TYPE) (123 & ~VAL)); + +#define RUN2(TYPE, VAL) \ + TYPE as##TYPE[SZ]; \ + for (int i = 0; i < SZ; i++) \ + as##TYPE[i] = 123; \ + vandns_##TYPE (as##TYPE, as##TYPE, VAL, SZ); \ + for (int i = 0; i < SZ; i++) \ + assert (as##TYPE[i] == (123 & ~VAL)); + +#define RUN_ALL() \ + RUN (int8_t, -1) \ + RUN (uint8_t, 2) \ + RUN (int16_t, -1) \ + RUN (uint16_t, 2) \ + RUN (int32_t, -3) \ + RUN (uint32_t, 4) \ + RUN (int64_t, -5) \ + RUN (uint64_t, 6) \ + RUN2 (int8_t, -7) \ + RUN2 (uint8_t, 8) \ + RUN2 (int16_t, -7) \ + RUN2 (uint16_t, 8) \ + RUN2 (int32_t, -9) \ + RUN2 (uint32_t, 10) \ + RUN2 (int64_t, -11) \ + RUN2 (uint64_t, 12) + +int main () +{ + RUN_ALL() +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-template.h new file mode 100644 index 00000000000..47ee86a1dba --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-template.h @@ -0,0 +1,38 @@ +#include + +#define TEST_TYPE(TYPE) \ + __attribute__ ((noipa)) void vandn_##TYPE (TYPE *restrict dst, \ + TYPE *restrict a, \ + TYPE *restrict b, int n) \ + { \ + for (int i = 0; i < n; i++) \ + dst[i] = a[i] & ~b[i]; \ + } + +#define TEST2_TYPE(TYPE) \ + __attribute__ ((noipa)) void vandns_##TYPE (TYPE *restrict dst, \ + TYPE *restrict a, TYPE b, int n) \ + { \ + for (int i = 0; i < n; i++) \ + dst[i] = a[i] & ~b; \ + } + +#define TEST_ALL() \ + TEST_TYPE (int8_t) \ + TEST_TYPE(uint8_t) \ + TEST_TYPE(int16_t) \ + TEST_TYPE(uint16_t) \ + TEST_TYPE(int32_t) \ + TEST_TYPE(uint32_t) \ + TEST_TYPE(int64_t) \ + TEST_TYPE(uint64_t) \ + TEST2_TYPE(int8_t) \ + TEST2_TYPE(uint8_t) \ + TEST2_TYPE(int16_t) \ + TEST2_TYPE(uint16_t) \ + TEST2_TYPE(int32_t) \ + TEST2_TYPE(uint32_t) \ + TEST2_TYPE(int64_t) \ + TEST2_TYPE(uint64_t) + +TEST_ALL()