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[106.168.128.197]) by smtp.gmail.com with ESMTPSA id p22-20020a170902b09600b001e7b7a7934bsm12754513plr.107.2024.04.24.21.53.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 21:53:42 -0700 (PDT) From: tkuw584924@gmail.com X-Google-Original-From: Takahiro.Kuwano@infineon.com To: u-boot@lists.denx.de Cc: jagan@amarulasolutions.com, vigneshr@ti.com, tudor.ambarus@linaro.org, d-gole@ti.com, pratyush@kernel.org, tkuw584924@gmail.com, Bacem.Daassi@infineon.com, Takahiro Kuwano Subject: [PATCH v2 1/6] mtd: ubi: Do not zero out EC and VID on ECC-ed NOR flashes Date: Thu, 25 Apr 2024 13:52:11 +0900 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Takahiro Kuwano For NOR flashes EC and VID are zeroed out before an erase is issued to make sure UBI does not mistakenly treat the PEB as used and associate it with an LEB. But on some flashes, like the Infineon Semper NOR flash family, multi-pass page programming is not allowed on the default ECC scheme. This means zeroing out these magic numbers will result in the flash throwing a page programming error. Do not zero out EC and VID for such flashes. A writesize > 1 is an indication of an ECC-ed flash. This patch replicates the following upstream linux commit: f669e74be820 ("ubi: Do not zero out EC and VID on ECC-ed NOR flashes") Acked-by: Tudor Ambarus Signed-off-by: Takahiro Kuwano Acked-by: Pratyush Yadav --- drivers/mtd/ubi/build.c | 4 +--- drivers/mtd/ubi/io.c | 9 ++++++++- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c index a1941b8eb8..81c1b7bdbc 100644 --- a/drivers/mtd/ubi/build.c +++ b/drivers/mtd/ubi/build.c @@ -679,10 +679,8 @@ static int io_init(struct ubi_device *ubi, int max_beb_per1024) ubi->bad_peb_limit = get_bad_peb_limit(ubi, max_beb_per1024); } - if (ubi->mtd->type == MTD_NORFLASH) { - ubi_assert(ubi->mtd->writesize == 1); + if (ubi->mtd->type == MTD_NORFLASH) ubi->nor_flash = 1; - } ubi->min_io_size = ubi->mtd->writesize; ubi->hdrs_min_io_size = ubi->mtd->writesize >> ubi->mtd->subpage_sft; diff --git a/drivers/mtd/ubi/io.c b/drivers/mtd/ubi/io.c index 14be95b74b..45699b4a47 100644 --- a/drivers/mtd/ubi/io.c +++ b/drivers/mtd/ubi/io.c @@ -563,7 +563,14 @@ int ubi_io_sync_erase(struct ubi_device *ubi, int pnum, int torture) return -EROFS; } - if (ubi->nor_flash) { + /* + * If the flash is ECC-ed then we have to erase the ECC block before we + * can write to it. But the write is in preparation to an erase in the + * first place. This means we cannot zero out EC and VID before the + * erase and we just have to hope the flash starts erasing from the + * start of the page. + */ + if (ubi->nor_flash && ubi->mtd->writesize == 1) { err = nor_erase_prepare(ubi, pnum); if (err) return err; From patchwork Thu Apr 25 04:52:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takahiro Kuwano X-Patchwork-Id: 1927567 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=WiPryiGz; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VQ3RN57Dpz1yZP for ; Thu, 25 Apr 2024 14:54:08 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 63D4C88EBC; Thu, 25 Apr 2024 06:53:51 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="WiPryiGz"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1B6F888EE5; Thu, 25 Apr 2024 06:53:50 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B366F8803A for ; Thu, 25 Apr 2024 06:53:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tkuw584924@gmail.com Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-1e51398cc4eso5124795ad.2 for ; Wed, 24 Apr 2024 21:53:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1714020826; x=1714625626; darn=lists.denx.de; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8SRnBPcK3mQX7rciSQs9F6iCzhqOkJVLI9rng/ugAVk=; b=WiPryiGzC/3Ache/nHmsmzpsecWT39Cl1UvVDUg4aKpTd4MNk1UE6BomdW/mjTqJPW su7S5Cx3WLFspleeQGNMlFrUnDTlfssOy8fvGgzIwgaXV9FoITw9wIa7TekLJZU7X8uO 28C7941j/jphuZT24j6qTynIrnfAN72I0GV/kPGd/UfRXU6fp+P2wIdXqVcfq8szth0A eHV9zAzbHzXiGOoS1RArFxoEngE99fB7JU150I2LvF52U7nkLQBgXUJb/HD+XrH9aiz9 uls2QgmK5tbM9+brv995zRoIDYYeIeMNpF/mahoD4g7GjAEucpxS4oHlI+kAZ8JfZSY3 0uNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714020826; x=1714625626; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8SRnBPcK3mQX7rciSQs9F6iCzhqOkJVLI9rng/ugAVk=; b=eJFH+uLtT/UN78xzrOFa8fFtt8ChbYnXwuPxOeLvw0Yx4FJfWhSWCa8FogqcTItJSl 6PT/0myMGmOxbUunnhB3Da3/WYj1JVRZ4Ce5L0Vh4hq56xqIfZxytRmGAuDgNeCd7s13 /saS91PZw8bQ218UaJx3En/25lLTAlChWJtfoNznilRzaJEX4S079LKtyQrIgxPtTKcE X63L0OxnbJx/x959BpJ9b00zIkFKzZzu4PluKd+WZMFdi6BYTILbOZQM6I91scbTE0s7 XhU/I6bOtZyoo5CdNhBwgfFi3pKEj+yAcICraKKUkQeshjZWcKW04ie5fenJynoKJzTz 7t7g== X-Gm-Message-State: AOJu0YxIcqop8w4WBIz7AmlwMmTMSfIw4OqLy2q0Au+HmUFaEps8x+iW fW/nJwBiZuePuGOcaOqP5zqdXcsAq8JbB4gtMCbH6gWDV5ZpZZg51+RgbA== X-Google-Smtp-Source: AGHT+IFNMgrwKDTwg9eNtXmqtseJ4BAy+pAyVn8Z/Lxxi1vxRlUouxXWGUQ7Pk1ljVTjdB0UO5l75A== X-Received: by 2002:a17:902:e885:b0:1e7:d482:9d96 with SMTP id w5-20020a170902e88500b001e7d4829d96mr7390608plg.10.1714020826202; Wed, 24 Apr 2024 21:53:46 -0700 (PDT) Received: from ISCN5CG2520RPD.infineon.com (KD106168128197.ppp-bb.dion.ne.jp. [106.168.128.197]) by smtp.gmail.com with ESMTPSA id p22-20020a170902b09600b001e7b7a7934bsm12754513plr.107.2024.04.24.21.53.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 21:53:45 -0700 (PDT) From: tkuw584924@gmail.com X-Google-Original-From: Takahiro.Kuwano@infineon.com To: u-boot@lists.denx.de Cc: jagan@amarulasolutions.com, vigneshr@ti.com, tudor.ambarus@linaro.org, d-gole@ti.com, pratyush@kernel.org, tkuw584924@gmail.com, Bacem.Daassi@infineon.com, Takahiro Kuwano Subject: [PATCH v2 2/6] mtd: spi-nor: Allow flashes to specify MTD writesize Date: Thu, 25 Apr 2024 13:52:12 +0900 Message-Id: <31d19c3333257717a871cdd6312b80b7a9fba0a8.1714020303.git.Takahiro.Kuwano@infineon.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Takahiro Kuwano Some flashes like the Infineon SEMPER NOR flash family use ECC. Under this ECC scheme, multi-pass writes to an ECC block is not allowed. In other words, once data is programmed to an ECC block, it can't be programmed again without erasing it first. Upper layers like file systems need to be given this information so they do not cause error conditions on the flash by attempting multi-pass programming. This can be done by setting 'writesize' in 'struct mtd_info'. Set the default to 1 but allow flashes to modify it in fixup hooks. If more flashes show up with this constraint in the future it might be worth it to add it to 'struct flash_info', but for now increasing its size is not worth it. This patch replicates the following upstream linux commit: afd473e85827 ("mtd: spi-nor: core: Allow flashes to specify MTD writesize") Acked-by: Tudor Ambarus Signed-off-by: Takahiro Kuwano --- drivers/mtd/spi/spi-nor-core.c | 3 ++- include/linux/mtd/spi-nor.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index f86003ca8c..1bfef6797f 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -2789,6 +2789,7 @@ static int spi_nor_init_params(struct spi_nor *nor, memset(params, 0, sizeof(*params)); /* Set SPI NOR sizes. */ + params->writesize = 1; params->size = info->sector_size * info->n_sectors; params->page_size = info->page_size; @@ -4078,7 +4079,7 @@ int spi_nor_scan(struct spi_nor *nor) mtd->dev = nor->dev; mtd->priv = nor; mtd->type = MTD_NORFLASH; - mtd->writesize = 1; + mtd->writesize = params.writesize; mtd->flags = MTD_CAP_NORFLASH; mtd->size = params.size; mtd->_erase = spi_nor_erase; diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index d1dbf3eadb..0d37a806c4 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -436,6 +436,7 @@ enum spi_nor_pp_command_index { struct spi_nor_flash_parameter { u64 size; + u32 writesize; u32 page_size; u8 rdsr_dummy; u8 rdsr_addr_nbytes; From patchwork Thu Apr 25 04:52:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takahiro Kuwano X-Patchwork-Id: 1927568 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=gVZAHMit; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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[106.168.128.197]) by smtp.gmail.com with ESMTPSA id p22-20020a170902b09600b001e7b7a7934bsm12754513plr.107.2024.04.24.21.53.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 21:53:49 -0700 (PDT) From: tkuw584924@gmail.com X-Google-Original-From: Takahiro.Kuwano@infineon.com To: u-boot@lists.denx.de Cc: jagan@amarulasolutions.com, vigneshr@ti.com, tudor.ambarus@linaro.org, d-gole@ti.com, pratyush@kernel.org, tkuw584924@gmail.com, Bacem.Daassi@infineon.com, Takahiro Kuwano , JaimeLiao Subject: [PATCH v2 3/6] mtd: spi-nor: Check nor->info before setting macronix_octal_fixups Date: Thu, 25 Apr 2024 13:52:13 +0900 Message-Id: <8bd7edaaeefd69eb9bf2fa469ddbaeebd2433013.1714020303.git.Takahiro.Kuwano@infineon.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Takahiro Kuwano The macronix_octal_fixups should be set only when mfr and flags match. Fixes: df3d5f9e41 ("mtd: spi-nor: add support for Macronix Octal flash") Signed-off-by: Takahiro Kuwano Cc: JaimeLiao Acked-by: Tudor Ambarus --- drivers/mtd/spi/spi-nor-core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 1bfef6797f..c2d2ddf0c8 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -4003,7 +4003,9 @@ void spi_nor_set_fixups(struct spi_nor *nor) #endif #if CONFIG_IS_ENABLED(SPI_FLASH_MACRONIX) - nor->fixups = ¯onix_octal_fixups; + if (JEDEC_MFR(nor->info) == SNOR_MFR_MACRONIX && + nor->info->flags & SPI_NOR_OCTAL_DTR_READ) + nor->fixups = ¯onix_octal_fixups; #endif /* SPI_FLASH_MACRONIX */ } From patchwork Thu Apr 25 04:52:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takahiro Kuwano X-Patchwork-Id: 1927569 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[106.168.128.197]) by smtp.gmail.com with ESMTPSA id p22-20020a170902b09600b001e7b7a7934bsm12754513plr.107.2024.04.24.21.53.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 21:53:53 -0700 (PDT) From: tkuw584924@gmail.com X-Google-Original-From: Takahiro.Kuwano@infineon.com To: u-boot@lists.denx.de Cc: jagan@amarulasolutions.com, vigneshr@ti.com, tudor.ambarus@linaro.org, d-gole@ti.com, pratyush@kernel.org, tkuw584924@gmail.com, Bacem.Daassi@infineon.com, Takahiro Kuwano Subject: [PATCH v2 4/6] mtd: spi-nor: Replace default_init() hook with late_init() Date: Thu, 25 Apr 2024 13:52:14 +0900 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Takahiro Kuwano default_init() is wrong, it contributes to the maze of initializing flash parameters. We'd like to get rid of it because the flash parameters that it initializes are not really used at SFDP parsing time, thus they can be initialized later. Ideally we want SFDP to initialize all the flash parameters. If (when) SFDP tables are wrong, we fix them with the post_sfdp/bfpt hooks, to emphasize that SFDP is indeed wrong. When there are parameters that are not covered by SFDP, we initialize them in late_init() - these parameters have nothing to do with SFDP and they are not needed earlier. With this we'll have a clearer view of who initializes what. There are six default_init() hooks implemented just for initializing octal_dtr_enable() and/or setup() hooks that called later on. Just moving those to late_init() does not change functionality. Suggested-by: Tudor Ambarus Signed-off-by: Takahiro Kuwano Acked-by: Tudor Ambarus --- drivers/mtd/spi/spi-nor-core.c | 48 +++++++++++++++++++--------------- 1 file changed, 27 insertions(+), 21 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index c2d2ddf0c8..fda879f3a3 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -189,27 +189,27 @@ struct sfdp_bfpt { /** * struct spi_nor_fixups - SPI NOR fixup hooks - * @default_init: called after default flash parameters init. Used to tweak - * flash parameters when information provided by the flash_info - * table is incomplete or wrong. * @post_bfpt: called after the BFPT table has been parsed * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs * that do not support RDSFDP). Typically used to tweak various * parameters that could not be extracted by other means (i.e. * when information provided by the SFDP/flash_info tables are * incomplete or wrong). + * @late_init: used to initialize flash parameters that are not declared in the + * JESD216 SFDP standard, or where SFDP tables not defined at all. * * Those hooks can be used to tweak the SPI NOR configuration when the SFDP * table is broken or not available. */ struct spi_nor_fixups { - void (*default_init)(struct spi_nor *nor); int (*post_bfpt)(struct spi_nor *nor, const struct sfdp_parameter_header *bfpt_header, const struct sfdp_bfpt *bfpt, struct spi_nor_flash_parameter *params); void (*post_sfdp)(struct spi_nor *nor, struct spi_nor_flash_parameter *params); + void (*late_init)(struct spi_nor *nor, + struct spi_nor_flash_parameter *params); }; #define SPI_NOR_SRST_SLEEP_LEN 200 @@ -2775,10 +2775,11 @@ static void spi_nor_post_sfdp_fixups(struct spi_nor *nor, nor->fixups->post_sfdp(nor, params); } -static void spi_nor_default_init_fixups(struct spi_nor *nor) +static void spi_nor_late_init_fixups(struct spi_nor *nor, + struct spi_nor_flash_parameter *params) { - if (nor->fixups && nor->fixups->default_init) - nor->fixups->default_init(nor); + if (nor->fixups && nor->fixups->late_init) + nor->fixups->late_init(nor, params); } static int spi_nor_init_params(struct spi_nor *nor, @@ -2885,8 +2886,6 @@ static int spi_nor_init_params(struct spi_nor *nor, } } - spi_nor_default_init_fixups(nor); - /* Override the parameters with data read from SFDP tables. */ nor->addr_width = 0; nor->mtd.erasesize = 0; @@ -2905,6 +2904,7 @@ static int spi_nor_init_params(struct spi_nor *nor, } spi_nor_post_sfdp_fixups(nor, params); + spi_nor_late_init_fixups(nor, params); return 0; } @@ -3328,7 +3328,8 @@ static int s25fs_s_setup(struct spi_nor *nor, const struct flash_info *info, return spi_nor_default_setup(nor, info, params); } -static void s25fs_s_default_init(struct spi_nor *nor) +static void s25fs_s_late_init(struct spi_nor *nor, + struct spi_nor_flash_parameter *params) { nor->setup = s25fs_s_setup; } @@ -3366,9 +3367,9 @@ static void s25fs_s_post_sfdp_fixup(struct spi_nor *nor, } static struct spi_nor_fixups s25fs_s_fixups = { - .default_init = s25fs_s_default_init, .post_bfpt = s25fs_s_post_bfpt_fixup, .post_sfdp = s25fs_s_post_sfdp_fixup, + .late_init = s25fs_s_late_init, }; static int s25_s28_mdp_ready(struct spi_nor *nor) @@ -3452,7 +3453,8 @@ static int s25_s28_setup(struct spi_nor *nor, const struct flash_info *info, return spi_nor_default_setup(nor, info, params); } -static void s25_default_init(struct spi_nor *nor) +static void s25_late_init(struct spi_nor *nor, + struct spi_nor_flash_parameter *params) { nor->setup = s25_s28_setup; } @@ -3533,9 +3535,9 @@ static void s25_post_sfdp_fixup(struct spi_nor *nor, } static struct spi_nor_fixups s25_fixups = { - .default_init = s25_default_init, .post_bfpt = s25_s28_post_bfpt_fixup, .post_sfdp = s25_post_sfdp_fixup, + .late_init = s25_late_init, }; static int s25fl256l_setup(struct spi_nor *nor, const struct flash_info *info, @@ -3544,13 +3546,14 @@ static int s25fl256l_setup(struct spi_nor *nor, const struct flash_info *info, return -ENOTSUPP; /* Bank Address Register is not supported */ } -static void s25fl256l_default_init(struct spi_nor *nor) +static void s25fl256l_late_init(struct spi_nor *nor, + struct spi_nor_flash_parameter *params) { nor->setup = s25fl256l_setup; } static struct spi_nor_fixups s25fl256l_fixups = { - .default_init = s25fl256l_default_init, + .late_init = s25fl256l_late_init, }; #endif @@ -3613,7 +3616,8 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor) return 0; } -static void s28hx_t_default_init(struct spi_nor *nor) +static void s28hx_t_late_init(struct spi_nor *nor, + struct spi_nor_flash_parameter *params) { nor->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable; nor->setup = s25_s28_setup; @@ -3651,9 +3655,9 @@ static void s28hx_t_post_sfdp_fixup(struct spi_nor *nor, } static struct spi_nor_fixups s28hx_t_fixups = { - .default_init = s28hx_t_default_init, .post_sfdp = s28hx_t_post_sfdp_fixup, .post_bfpt = s25_s28_post_bfpt_fixup, + .late_init = s28hx_t_late_init, }; #endif /* CONFIG_SPI_FLASH_S28HX_T */ @@ -3705,7 +3709,8 @@ static int spi_nor_micron_octal_dtr_enable(struct spi_nor *nor) return 0; } -static void mt35xu512aba_default_init(struct spi_nor *nor) +static void mt35xu512aba_late_init(struct spi_nor *nor, + struct spi_nor_flash_parameter *params) { nor->octal_dtr_enable = spi_nor_micron_octal_dtr_enable; } @@ -3734,8 +3739,8 @@ static void mt35xu512aba_post_sfdp_fixup(struct spi_nor *nor, } static struct spi_nor_fixups mt35xu512aba_fixups = { - .default_init = mt35xu512aba_default_init, .post_sfdp = mt35xu512aba_post_sfdp_fixup, + .late_init = mt35xu512aba_late_init, }; #endif /* CONFIG_SPI_FLASH_MT35XU */ @@ -3795,7 +3800,8 @@ static int spi_nor_macronix_octal_dtr_enable(struct spi_nor *nor) return 0; } -static void macronix_octal_default_init(struct spi_nor *nor) +static void macronix_octal_late_init(struct spi_nor *nor, + struct spi_nor_flash_parameter *params) { nor->octal_dtr_enable = spi_nor_macronix_octal_dtr_enable; } @@ -3812,8 +3818,8 @@ static void macronix_octal_post_sfdp_fixup(struct spi_nor *nor, } static struct spi_nor_fixups macronix_octal_fixups = { - .default_init = macronix_octal_default_init, .post_sfdp = macronix_octal_post_sfdp_fixup, + .late_init = macronix_octal_late_init, }; #endif /* CONFIG_SPI_FLASH_MACRONIX */ From patchwork Thu Apr 25 04:52:15 2024 Content-Type: text/plain; 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[106.168.128.197]) by smtp.gmail.com with ESMTPSA id p22-20020a170902b09600b001e7b7a7934bsm12754513plr.107.2024.04.24.21.53.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 21:53:56 -0700 (PDT) From: tkuw584924@gmail.com X-Google-Original-From: Takahiro.Kuwano@infineon.com To: u-boot@lists.denx.de Cc: jagan@amarulasolutions.com, vigneshr@ti.com, tudor.ambarus@linaro.org, d-gole@ti.com, pratyush@kernel.org, tkuw584924@gmail.com, Bacem.Daassi@infineon.com, Takahiro Kuwano Subject: [PATCH v2 5/6] mtd: spi-nor: Call spi_nor_post_sfdp_fixups() only after spi_nor_parse_sfdp() Date: Thu, 25 Apr 2024 13:52:15 +0900 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Takahiro Kuwano spi_nor_post_sfdp_fixups() was called regardless of if spi_nor_parse_sfdp() had been called or not. late_init() should be instead used to initialize the parameters that are not defined in SFDP. Ideally spi_nor_post_sfdp_fixups() is called only after successful parse of SFDP. However, in case SFDP support is disabled by .config, that can break current functionality. Therefore, we would call it after spi_nor_parse_sfdp() regardless of its return value. This patch follows the upstream linux commit: 5273cc6df984("mtd: spi-nor: core: Call spi_nor_post_sfdp_fixups() only when SFDP is defined") Signed-off-by: Takahiro Kuwano Acked-by: Tudor Ambarus --- drivers/mtd/spi/spi-nor-core.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index fda879f3a3..ee968c10e4 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -190,11 +190,10 @@ struct sfdp_bfpt { /** * struct spi_nor_fixups - SPI NOR fixup hooks * @post_bfpt: called after the BFPT table has been parsed - * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs - * that do not support RDSFDP). Typically used to tweak various - * parameters that could not be extracted by other means (i.e. - * when information provided by the SFDP/flash_info tables are - * incomplete or wrong). + * @post_sfdp: called after SFDP has been parsed. Typically used to tweak + * various parameters that could not be extracted by other means + * (i.e. when information provided by the SFDP tables are incomplete + * or wrong). * @late_init: used to initialize flash parameters that are not declared in the * JESD216 SFDP standard, or where SFDP tables not defined at all. * @@ -2760,13 +2759,12 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, /** * spi_nor_post_sfdp_fixups() - Updates the flash's parameters and settings - * after SFDP has been parsed (is also called for SPI NORs that do not - * support RDSFDP). + * after SFDP has been parsed. * @nor: pointer to a 'struct spi_nor' * * Typically used to tweak various parameters that could not be extracted by - * other means (i.e. when information provided by the SFDP/flash_info tables - * are incomplete or wrong). + * other means (i.e. when information provided by the SFDP tables are incomplete + * or wrong). */ static void spi_nor_post_sfdp_fixups(struct spi_nor *nor, struct spi_nor_flash_parameter *params) @@ -2901,9 +2899,10 @@ static int spi_nor_init_params(struct spi_nor *nor, } else { memcpy(params, &sfdp_params, sizeof(*params)); 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[106.168.128.197]) by smtp.gmail.com with ESMTPSA id p22-20020a170902b09600b001e7b7a7934bsm12754513plr.107.2024.04.24.21.53.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 21:54:00 -0700 (PDT) From: tkuw584924@gmail.com X-Google-Original-From: Takahiro.Kuwano@infineon.com To: u-boot@lists.denx.de Cc: jagan@amarulasolutions.com, vigneshr@ti.com, tudor.ambarus@linaro.org, d-gole@ti.com, pratyush@kernel.org, tkuw584924@gmail.com, Bacem.Daassi@infineon.com, Takahiro Kuwano Subject: [PATCH v2 6/6] mtd: spi-nor: Set ECC unit size to MTD writesize in Infineon SEMPER flashes Date: Thu, 25 Apr 2024 13:52:16 +0900 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Takahiro Kuwano The Infineon SEMPER NOR flash family uses 2-bit ECC by default with each ECC block being 16 bytes. Under this scheme multi-pass programming to an ECC block is not allowed. Set the writesize to make sure multi-pass programming is not attempted on the flash. Signed-off-by: Takahiro Kuwano Acked-by: Tudor Ambarus --- drivers/mtd/spi/spi-nor-core.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ee968c10e4..7985ca70ff 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -3456,6 +3456,13 @@ static void s25_late_init(struct spi_nor *nor, struct spi_nor_flash_parameter *params) { nor->setup = s25_s28_setup; + + /* + * Programming is supported only in 16-byte ECC data unit granularity. + * Byte-programming, bit-walking, or multiple program operations to the + * same ECC data unit without an erase are not allowed. + */ + params->writesize = 16; } static int s25_s28_post_bfpt_fixup(struct spi_nor *nor, @@ -3620,6 +3627,13 @@ static void s28hx_t_late_init(struct spi_nor *nor, { nor->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable; nor->setup = s25_s28_setup; + + /* + * Programming is supported only in 16-byte ECC data unit granularity. + * Byte-programming, bit-walking, or multiple program operations to the + * same ECC data unit without an erase are not allowed. + */ + params->writesize = 16; } static void s28hx_t_post_sfdp_fixup(struct spi_nor *nor,