From patchwork Tue Apr 9 08:25:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Leo Liang X-Patchwork-Id: 1921281 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VDJvB6bsbz1yYd for ; Tue, 9 Apr 2024 18:25:58 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C285487DEA; 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Tue, 9 Apr 2024 16:25:42 +0800 (+08) (envelope-from ycliang@andestech.com) Received: from swlinux02 (10.0.15.183) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Tue, 9 Apr 2024 16:25:39 +0800 Date: Tue, 9 Apr 2024 16:25:36 +0800 From: Leo Liang To: CC: , , Subject: [GIT PULL] u-boot-riscv/master Message-ID: MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/2.2.10 (e0e92c31) (2023-03-25) X-Originating-IP: [10.0.15.183] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 4398PgE0016374 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Hi Tom, The following changes since commit 069d07396e30aa9be396c1dd3fc158ac199e6843: Merge tag 'efi-2024-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi (2024-04-08 14:33:59 -0600) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-riscv.git for you to fetch changes up to c1f78a4f632276bb4d77f8c79fe203709a9fa397: doc: describe Milk-V Mars board (2024-04-09 11:30:37 +0800) CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/20256 ---------------------------------------------------------------- - RISC-V: Support backtrace and improve isa extension parsing - cpu: Add cv1800b SoC support - board: Add Milk-V Mars board support - board: Add Milk-V Duo SD card support ---------------------------------------------------------------- Ben Dooks (1): riscv: add backtrace support Conor Dooley (2): riscv: don't read riscv, isa in the riscv cpu's get_desc() riscv: support extension probing using riscv, isa-extensions Heinrich Schuchardt (7): riscv: starfive: MMC card detect riscv: do not set default fdt for VisionFive 2 eeprom: starfive: function get_product_id_from_eeprom() riscv: set fdtfile on Milk-V Mars board: starfive: support Milk-V Mars board riscv: starfive: avoid including common.h doc: describe Milk-V Mars board Kongyang Liu (5): riscv: cpu: cv1800b: Add support for cv1800b SoC riscv: cache: Implement dcache for cv1800b mmc: cv1800b: Add sdhci driver support for cv1800b SoC riscv: dts: sophgo: Add clk node and sdhci node configs: milkv_duo: Add SD card configs Łukasz Stelmach (1): riscv: Move virtio scan to board_late_init() arch/riscv/Kconfig | 22 ++++ arch/riscv/Makefile | 4 + arch/riscv/cpu/cpu.c | 60 +++++++---- arch/riscv/cpu/cv1800b/Kconfig | 12 +++ arch/riscv/cpu/cv1800b/Makefile | 7 ++ arch/riscv/cpu/cv1800b/cache.c | 45 ++++++++ arch/riscv/cpu/cv1800b/cpu.c | 9 ++ arch/riscv/cpu/cv1800b/dram.c | 21 ++++ arch/riscv/cpu/start.S | 1 + arch/riscv/dts/cv1800b-milkv-duo.dts | 8 ++ arch/riscv/dts/cv1800b.dtsi | 4 + arch/riscv/dts/cv18xx.dtsi | 22 ++++ arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi | 2 +- arch/riscv/include/asm/arch-jh7110/eeprom.h | 9 ++ arch/riscv/lib/interrupts.c | 35 +++++++ board/emulation/qemu-riscv/qemu-riscv.c | 12 +-- board/sophgo/milkv_duo/Kconfig | 4 +- board/starfive/visionfive2/spl.c | 100 +++++++++++++++--- board/starfive/visionfive2/starfive_visionfive2.c | 48 ++++++--- .../starfive/visionfive2/visionfive2-i2c-eeprom.c | 9 +- configs/milkv_duo_defconfig | 10 ++ configs/starfive_visionfive2_defconfig | 1 - doc/board/starfive/index.rst | 1 + doc/board/starfive/milk-v_mars.rst | 111 ++++++++++++++++++++ doc/board/starfive/visionfive2.rst | 18 ++++ drivers/cpu/riscv_cpu.c | 8 +- drivers/mmc/Kconfig | 13 +++ drivers/mmc/Makefile | 1 + drivers/mmc/cv1800b_sdhci.c | 116 +++++++++++++++++++++ 29 files changed, 649 insertions(+), 64 deletions(-) create mode 100644 arch/riscv/cpu/cv1800b/Kconfig create mode 100644 arch/riscv/cpu/cv1800b/Makefile create mode 100644 arch/riscv/cpu/cv1800b/cache.c create mode 100644 arch/riscv/cpu/cv1800b/cpu.c create mode 100644 arch/riscv/cpu/cv1800b/dram.c create mode 100644 doc/board/starfive/milk-v_mars.rst create mode 100644 drivers/mmc/cv1800b_sdhci.c Best regards, Leo