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[2001:b400:e355:7eb0:b4d0:66d2:2269:ef6c]) by smtp.gmail.com with ESMTPSA id g5-20020a170902c38500b001e0e85a21f5sm201338plg.32.2024.03.27.18.33.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 18:33:12 -0700 (PDT) From: Peter Yin To: patrick@stwcx.xyz, Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 1/4] ARM: dts: aspeed: Add the AST2500 WDT with SCU register Date: Thu, 28 Mar 2024 09:32:59 +0800 Message-Id: <20240328013303.3609385-2-peteryin.openbmc@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240328013303.3609385-1-peteryin.openbmc@gmail.com> References: <20240328013303.3609385-1-peteryin.openbmc@gmail.com> MIME-Version: 1.0 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" The AST2500 WDT references the System Control Unit register for its operation. Signed-off-by: Peter Yin --- arch/arm/boot/dts/aspeed/aspeed-g5.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi index 04f98d1dbb97..5fd12c057c31 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi @@ -410,12 +410,14 @@ wdt1: watchdog@1e785000 { compatible = "aspeed,ast2500-wdt"; reg = <0x1e785000 0x20>; clocks = <&syscon ASPEED_CLK_APB>; + aspeed,scu = <&syscon>; }; wdt2: watchdog@1e785020 { compatible = "aspeed,ast2500-wdt"; reg = <0x1e785020 0x20>; clocks = <&syscon ASPEED_CLK_APB>; + aspeed,scu = <&syscon>; }; wdt3: watchdog@1e785040 { @@ -423,6 +425,7 @@ wdt3: watchdog@1e785040 { reg = <0x1e785040 0x20>; clocks = <&syscon ASPEED_CLK_APB>; status = "disabled"; + aspeed,scu = <&syscon>; }; pwm_tacho: pwm-tacho-controller@1e786000 { From patchwork Thu Mar 28 01:33:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Yin X-Patchwork-Id: 1917089 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[2001:b400:e355:7eb0:b4d0:66d2:2269:ef6c]) by smtp.gmail.com with ESMTPSA id g5-20020a170902c38500b001e0e85a21f5sm201338plg.32.2024.03.27.18.33.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 18:33:15 -0700 (PDT) From: Peter Yin To: patrick@stwcx.xyz, Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 2/4] ARM: dts: aspeed: Add the AST2600 WDT with SCU register Date: Thu, 28 Mar 2024 09:33:00 +0800 Message-Id: <20240328013303.3609385-3-peteryin.openbmc@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240328013303.3609385-1-peteryin.openbmc@gmail.com> References: <20240328013303.3609385-1-peteryin.openbmc@gmail.com> MIME-Version: 1.0 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" The AST2600 Watchdog Timer (WDT) references the System Control Unit (SCU) register for its operation. Signed-off-by: Peter Yin --- arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi index ead835fca657..b47850f0dca0 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -557,23 +557,27 @@ uart5: serial@1e784000 { wdt1: watchdog@1e785000 { compatible = "aspeed,ast2600-wdt"; reg = <0x1e785000 0x40>; + aspeed,scu = <&syscon>; }; wdt2: watchdog@1e785040 { compatible = "aspeed,ast2600-wdt"; reg = <0x1e785040 0x40>; + aspeed,scu = <&syscon>; status = "disabled"; }; wdt3: watchdog@1e785080 { compatible = "aspeed,ast2600-wdt"; reg = <0x1e785080 0x40>; + aspeed,scu = <&syscon>; status = "disabled"; }; wdt4: watchdog@1e7850c0 { compatible = "aspeed,ast2600-wdt"; reg = <0x1e7850C0 0x40>; + aspeed,scu = <&syscon>; status = "disabled"; }; From patchwork Thu Mar 28 01:33:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Yin X-Patchwork-Id: 1917090 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[2001:b400:e355:7eb0:b4d0:66d2:2269:ef6c]) by smtp.gmail.com with ESMTPSA id g5-20020a170902c38500b001e0e85a21f5sm201338plg.32.2024.03.27.18.33.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 18:33:19 -0700 (PDT) From: Peter Yin To: patrick@stwcx.xyz, Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 3/4] dt-bindings: watchdog: aspeed-wdt: Add aspeed,scu Date: Thu, 28 Mar 2024 09:33:01 +0800 Message-Id: <20240328013303.3609385-4-peteryin.openbmc@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240328013303.3609385-1-peteryin.openbmc@gmail.com> References: <20240328013303.3609385-1-peteryin.openbmc@gmail.com> MIME-Version: 1.0 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" To use the SCU register to obtain reset flags for supporting bootstatus. Signed-off-by: Peter Yin --- Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt index 3208adb3e52e..80a1f58b5a2e 100644 --- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt @@ -8,6 +8,8 @@ Required properties: - reg: physical base address of the controller and length of memory mapped region + - aspeed,scu: a reference to the System Control Unit node of the Aspeed + SOC. Optional properties: @@ -62,6 +64,7 @@ Examples: reg = <0x1e785000 0x1c>; aspeed,reset-type = "system"; aspeed,external-signal; + aspeed,scu = <&syscon>; }; #include @@ -70,4 +73,5 @@ Examples: reg = <0x1e785040 0x40>; aspeed,reset-mask = ; + aspeed,scu = <&syscon>; }; From patchwork Thu Mar 28 01:33:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Yin X-Patchwork-Id: 1917091 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=fmO+c14T; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=patchwork.ozlabs.org) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4V4mJw15Pbz1yWr for ; Thu, 28 Mar 2024 12:33:36 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=fmO+c14T; dkim-atps=neutral Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4V4mJw03Rvz3vXB for ; Thu, 28 Mar 2024 12:33:36 +1100 (AEDT) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=fmO+c14T; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::635; helo=mail-pl1-x635.google.com; envelope-from=peteryin.openbmc@gmail.com; receiver=lists.ozlabs.org) Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4V4mJk0lxKz3fQH for ; Thu, 28 Mar 2024 12:33:25 +1100 (AEDT) Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-1e0bfc42783so4312135ad.0 for ; Wed, 27 Mar 2024 18:33:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1711589604; x=1712194404; darn=lists.ozlabs.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=G0IynxA3JbozA3TAjnZstACddkpz8hoX6OU7xoU+2fw=; b=fmO+c14TT359feLzLV6N7f8fPDxT3NR8okhnVIWcGS62GyNqpTk9YmW85EiT0zewkU 6czGlRYodRaBDU3d6poRNHDzJ6NESLnd07b26r9R/8lU6qTsMx7b2RckAHE6CkFLT/ut 1h+P7FlVmTiWqHYoW8OFRAnZrhma7N0agSHOmmhYPMswPIHjrU6bN8wk1QTYM92ys/Un LHGwa28X+cjH/zhRdQVWQu80YEoVnuJ6io+0mFfhU9oK+beGTaKPU/K9imFON6jNS5sP e6jsPF0c2vJwjoZB4XSEoEqd46h//4lXt37p0VMNhLc4tWWT54aVMHOmUofvvjBSfEz/ qriQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711589604; x=1712194404; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=G0IynxA3JbozA3TAjnZstACddkpz8hoX6OU7xoU+2fw=; b=cgU2edTrg9Yt5vn6jvQpBrq9BWkPLLpqkTNFQ5PY1kJ/+X5LuWTHSvSFs6pYX8sG85 750+6WNOG795oshfqSIOqn3aR/UqUrRXeAqqhr8snO69yNcL590aITp/OLoGKAibAbab iwJFURLYvVVmIXIAK2R8gVDZJ257/JsjJzbFJsTvswGiWC4hKkS6tHyLaLBBhIEht4Bf VT0vuuTOI+DLLTwrAdecNs8dNZvEhrh3kLIamlZQwJZLUl7JxK3JRfEgAAIru3idqd4r FgeY1Zhq/L8FA2evADRuQ3TYFplCpdyj4xiCLFQyh7Z+WlMA33zuayOvpSPUkflS1UKL 39SA== X-Forwarded-Encrypted: i=1; AJvYcCVJO/HlmTqMYaO+HgxFZZ19Lme7T3ZzTZ9cZ5cWsGBXrhGhb7n9jCBHdM3cbRqF/MGWr9LOsLsaMPJSb0j/xX8+j1Ywy1zvQde1SrTTzg== X-Gm-Message-State: AOJu0YxQQN9Rta+4MjIZLYsiH3kzbi7CG3NYT46fOXDvlBr0Jd7nZP+G yzIVsSBitM8ZWVDlYCDJicWXhLjWOnyR7H8njDONBEJoPN7A64+1 X-Google-Smtp-Source: AGHT+IErqe1JgPY/tC+iEEwyWTtpp/xy7QUKcZTy0vIiStxw4d/K5SUR+QGLZAGX83Ujl4LUNDIuFw== X-Received: by 2002:a17:903:8cc:b0:1e0:a2cf:62f2 with SMTP id lk12-20020a17090308cc00b001e0a2cf62f2mr1579482plb.23.1711589604023; Wed, 27 Mar 2024 18:33:24 -0700 (PDT) Received: from peter-bmc.dhcpserver.bu9bmc.local (2001-b400-e355-7eb0-b4d0-66d2-2269-ef6c.emome-ip6.hinet.net. [2001:b400:e355:7eb0:b4d0:66d2:2269:ef6c]) by smtp.gmail.com with ESMTPSA id g5-20020a170902c38500b001e0e85a21f5sm201338plg.32.2024.03.27.18.33.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 18:33:23 -0700 (PDT) From: Peter Yin To: patrick@stwcx.xyz, Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 4/4] drivers: watchdog: ast2500 and ast2600 support bootstatus Date: Thu, 28 Mar 2024 09:33:02 +0800 Message-Id: <20240328013303.3609385-5-peteryin.openbmc@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240328013303.3609385-1-peteryin.openbmc@gmail.com> References: <20240328013303.3609385-1-peteryin.openbmc@gmail.com> MIME-Version: 1.0 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" Add WDIOF_EXTERN1 and WDIOF_CARDRESET bootstatus in ast2600 Regarding the AST2600 specification, the WDTn Timeout Status Register (WDT10) has bit 1 reserved. Bit 1 of the status register indicates on ast2500 if the boot was from the second boot source. It does not indicate that the most recent reset was triggered by the watchdog. The code should just be changed to set WDIOF_CARDRESET if bit 0 of the status register is set. Include SCU register to veriy WDIOF_EXTERN1 in ast2600 SCU74 or ast2500 SCU3C when bit1 is set. Signed-off-by: Peter Yin --- drivers/watchdog/aspeed_wdt.c | 34 ++++++++++++++++++++++++++++++---- 1 file changed, 30 insertions(+), 4 deletions(-) diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c index b4773a6aaf8c..c3c8098c035d 100644 --- a/drivers/watchdog/aspeed_wdt.c +++ b/drivers/watchdog/aspeed_wdt.c @@ -11,10 +11,12 @@ #include #include #include +#include #include #include #include #include +#include #include static bool nowayout = WATCHDOG_NOWAYOUT; @@ -82,6 +84,13 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table); #define WDT_RESET_MASK1 0x1c #define WDT_RESET_MASK2 0x20 +/* + * Ast2600 SCU74 bit1 is External reset flag + * Ast2500 SCU3C bit1 is External reset flag + */ +#define AST2500_SYSTEM_RESET_EVENT 0x3C +#define AST2600_SYSTEM_RESET_EVENT 0x74 +#define EXTERN_RESET_FLAG BIT(1) /* * WDT_RESET_WIDTH controls the characteristics of the external pulse (if * enabled), specifically: @@ -330,6 +339,11 @@ static int aspeed_wdt_probe(struct platform_device *pdev) if (IS_ERR(wdt->base)) return PTR_ERR(wdt->base); + struct regmap *scu_base = syscon_regmap_lookup_by_phandle(dev->of_node, + "aspeed,scu"); + if (IS_ERR(scu_base)) + return PTR_ERR(scu_base); + wdt->wdd.info = &aspeed_wdt_info; if (wdt->cfg->irq_mask) { @@ -459,14 +473,26 @@ static int aspeed_wdt_probe(struct platform_device *pdev) } status = readl(wdt->base + WDT_TIMEOUT_STATUS); - if (status & WDT_TIMEOUT_STATUS_BOOT_SECONDARY) { + if (status & WDT_TIMEOUT_STATUS_EVENT) wdt->wdd.bootstatus = WDIOF_CARDRESET; - if (of_device_is_compatible(np, "aspeed,ast2400-wdt") || - of_device_is_compatible(np, "aspeed,ast2500-wdt")) - wdt->wdd.groups = bswitch_groups; + if (of_device_is_compatible(np, "aspeed,ast2600-wdt")) { + ret = regmap_read(scu_base, + AST2600_SYSTEM_RESET_EVENT, + &status); + } else { + ret = regmap_read(scu_base, + AST2500_SYSTEM_RESET_EVENT, + &status); + wdt->wdd.groups = bswitch_groups; } + /* + * Reset cause by Extern Reset + */ + if (status & EXTERN_RESET_FLAG && !ret) + wdt->wdd.bootstatus |= WDIOF_EXTERN1; + dev_set_drvdata(dev, wdt); return devm_watchdog_register_device(dev, &wdt->wdd);