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Wed, 27 Mar 2024 15:14:06 -0700 (PDT) Received: from vineet-framework.hq.rivosinc.com ([12.44.203.122]) by smtp.gmail.com with ESMTPSA id q10-20020a170902e30a00b001e1153c3047sm24910plc.106.2024.03.27.15.14.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 15:14:06 -0700 (PDT) From: Vineet Gupta To: gcc-patches@gcc.gnu.org Cc: Jeff Law , kito.cheng@gmail.com, Palmer Dabbelt , gnu-toolchain@rivosinc.com, charlie@rivosinc.com, Vineet Gupta Subject: [PATCH] RISC-V: testsuite: ensure vtype is call clobbered Date: Wed, 27 Mar 2024 15:14:04 -0700 Message-Id: <20240327221404.914824-1-vineetg@rivosinc.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-10.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, KAM_SHORT, LIKELY_SPAM_BODY, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Per classic Vector calling convention ABI, vtype is call clobbered, so ensure gcc generates fresh a VSETVLI after a function call or an inline asm which clobbers vtype. ATM gcc seems to be doing the right thing, but a test can never be harmful. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vtype-call-clobbered.c: New Test. Signed-off-by: Vineet Gupta --- .../riscv/rvv/vtype-call-clobbered.c | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vtype-call-clobbered.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vtype-call-clobbered.c b/gcc/testsuite/gcc.target/riscv/rvv/vtype-call-clobbered.c new file mode 100644 index 000000000000..be9f312aa508 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vtype-call-clobbered.c @@ -0,0 +1,47 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64 -O2" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-Os" "-Oz" } } */ + +#include "riscv_vector.h" + +extern void can_clobber_vtype(); + +static inline void v_loop (void * restrict in, void * restrict out, int n) +{ + for (int i = 0; i < n; i++) + { + vuint8mf8_t v = *(vuint8mf8_t*)(in + i); + *(vuint8mf8_t*)(out + i) = v; + } +} + +/* Two V instructions back-back. + Only 1 vsetvli insn. */ +void +vec1 (void * restrict in, void * restrict out1, void * restrict out2, int n) +{ + v_loop(in, out1, n); + v_loop(in, out2, n); +} + +/* Two V instructions seperated by a function call. + Both need to have a corresponding vsetvli insn. */ +void +vec2 (void * restrict in, void * restrict out1, void * restrict out2, int n) +{ + v_loop(in, out1, n); + can_clobber_vtype(); + v_loop(in, out2, n); +} + +/* Two V instructions seperated by an inline asm with vtype clobber. + Both need to have a corresponding vsetvli insn. */ +void +vec3 (void * restrict in, void * restrict out1, void * restrict out2, int n) +{ + v_loop(in, out1, n); + asm volatile("":::"vtype"); + v_loop(in, out2, n); +} + +/* { dg-final { scan-assembler-times {vsetvli} 5 } } */