From patchwork Tue Mar 5 08:10:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 1908079 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=S2EQX+Wm; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45e3:2400::1; helo=sv.mirrors.kernel.org; envelope-from=linux-pci+bounces-4503-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org [IPv6:2604:1380:45e3:2400::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TppLx1FWlz23fC for ; Tue, 5 Mar 2024 19:16:57 +1100 (AEDT) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id C3272281FE7 for ; Tue, 5 Mar 2024 08:16:55 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0D25E81AB3; Tue, 5 Mar 2024 08:14:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="S2EQX+Wm" X-Original-To: linux-pci@vger.kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7249A80BFE; Tue, 5 Mar 2024 08:14:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709626486; cv=none; b=bFO9sqPikphub27YoD1a/o990TBZpUeH8X+dnpDblC8IvL6AqELPJVTbdw/TtiVrH30kcK12TrunSvz71wKjMp6rTTrTQlafrxs0zSpxYmTc+c0uyF8kAxQG3FwBoBI8ANkI8tPa+aO7N+qTNxACA4fmhjGXYtf6kxCmSBVaO+k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709626486; c=relaxed/simple; bh=DQk9lCKuHSluKcrPQ1v0+lTVtvnpI7fwkC/si6tMhYo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aa5FqH2HxnoWtRl4/qN7xVW8QT3SYVE5jjzvOJw/LlFmBjP2+RkVLKRde6YUCdcAzxbfaxWKLvE8oJcZnXifyX2rb0rSAKiCrTIXazbXDy33XMFDlWLtsHtVjc+HQr6nFFwaw/VsYApLjU+aIQ9jq+bSJumI1rlAnPnD1Qn3V00= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=S2EQX+Wm; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id AAF83C43601; Tue, 5 Mar 2024 08:14:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1709626485; bh=DQk9lCKuHSluKcrPQ1v0+lTVtvnpI7fwkC/si6tMhYo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=S2EQX+WmdUT7kERI1AuoPc5sQiTWG9h1kybHRySR06cxllxxIBAxndYRgXj12B5Mk pJiZwNVbK3xuE5v20ER+5tn1WnCaJ+qEv4FXssHSdxZFw6a5KwkikDmPPpP2ILiJYT LpWmpCj6/h1Uf6wjgWouLEAJWcHutLP5oZW4jmYpjjEf05RhB3dwq3ooZG3BU4C7Fq 7sly7H8U5LbWudfCSAZiyeZnMznwQ16KjKBj7fG0O5Coek/MoWbqKWrLgkdbWrgff3 Af7DS7vk3JKZSL56iEKoQ4s6OJv9L/9fcOq7q90FM/AMWR4j5ghnll+zj5ChzxwHiE asz11h/BE7YJw== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1rhPwp-0000000037p-3Gna; Tue, 05 Mar 2024 09:14:51 +0100 From: Johan Hovold To: Bjorn Helgaas , Bjorn Andersson Cc: Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , Krzysztof Kozlowski Subject: [PATCH v3 01/10] dt-bindings: PCI: qcom: Allow 'required-opps' Date: Tue, 5 Mar 2024 09:10:56 +0100 Message-ID: <20240305081105.11912-2-johan+linaro@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240305081105.11912-1-johan+linaro@kernel.org> References: <20240305081105.11912-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Some Qualcomm SoCs require a minimum performance level for the power domain so add 'required-opps' to the binding. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Manivannan Sadhasivam Signed-off-by: Johan Hovold --- Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml | 3 +++ Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 +++ 2 files changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml index 125136176f93..8d570669650a 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml @@ -59,6 +59,9 @@ properties: power-domains: maxItems: 1 + required-opps: + maxItems: 1 + resets: minItems: 1 maxItems: 12 diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index c8f36978a94c..1d7a6a520fef 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -111,6 +111,9 @@ properties: description: GPIO controlled connection to PERST# signal maxItems: 1 + required-opps: + maxItems: 1 + wake-gpios: description: GPIO controlled connection to WAKE# signal maxItems: 1 From patchwork Tue Mar 5 08:10:57 2024 Content-Type: text/plain; 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Note that the current schema fails to detect omissions of the mask property if the internal MSI controller properties are also present. Acked-by: Krzysztof Kozlowski Reviewed-by: Manivannan Sadhasivam Signed-off-by: Johan Hovold --- Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml | 1 - Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 1 - 2 files changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml index 8d570669650a..0d1b23523f62 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml @@ -93,7 +93,6 @@ anyOf: - "#interrupt-cells" - required: - msi-map - - msi-map-mask allOf: - $ref: /schemas/pci/pci-bus.yaml# diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 1d7a6a520fef..efaab5f82b47 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -134,7 +134,6 @@ anyOf: - "#interrupt-cells" - required: - msi-map - - msi-map-mask allOf: - $ref: /schemas/pci/pci-bus.yaml# From patchwork Tue Mar 5 08:10:58 2024 Content-Type: text/plain; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1709626485; bh=CwZ0j6uvyi76UV840KbcFaKTKHb147IOIeSH2KfyiDc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=d8zFR9G9r9p0yXlch7TtAJ69ZM1SutM/kUiiJYtGlzULe89xv20W11jyoqlpP9aXh GbXw5/AkcD4FaZuxmckxTg5At+zPstzt6RZaM54oFG/SeTWNPfZvu4pwYDrb9p39s5 47VdyIx/8wW6dIbcs/u3UYSUZU+odhlzORd4OpvDOpuNSNggPpUSRf/LBiIr/asGBV ZQd/2+T8fvtLHf2850dXSll75oQNq4D8li9Fbx4EpFeVbIAHIvygZYMCAeidKYOGCY x4glPKmFmJEHh5sNH20WH1GhuJvCh678M+I0HLGIsZ96j473k3Axpc5eDVWPakL4+Q 1ZX9U+MvFIE2g== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1rhPwp-0000000037t-41Fy; Tue, 05 Mar 2024 09:14:51 +0100 From: Johan Hovold To: Bjorn Helgaas , Bjorn Andersson Cc: Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 03/10] dt-bindings: PCI: qcom: Allow 'aspm-no-l0s' Date: Tue, 5 Mar 2024 09:10:58 +0100 Message-ID: <20240305081105.11912-4-johan+linaro@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240305081105.11912-1-johan+linaro@kernel.org> References: <20240305081105.11912-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add 'aspm-no-l0s', which can be used to indicate that ASPM L0s is not supported, to the binding. Acked-by: Rob Herring Reviewed-by: Manivannan Sadhasivam Signed-off-by: Johan Hovold --- Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml | 2 ++ Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 ++ 2 files changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml index 0d1b23523f62..40ac5ba81233 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml @@ -78,6 +78,8 @@ properties: description: GPIO controlled connection to WAKE# signal maxItems: 1 + aspm-no-l0s: true + required: - reg - reg-names diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index efaab5f82b47..a23d2cfb86c4 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -118,6 +118,8 @@ properties: description: GPIO controlled connection to WAKE# signal maxItems: 1 + aspm-no-l0s: true + required: - compatible - reg From patchwork Tue Mar 5 08:10:59 2024 Content-Type: text/plain; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1709626485; bh=SZw49HDPW+I9QK3XYA80NnOgMYXXl4SLIPsCVKDM8ec=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LqKr58BB/iYxh02k23Ur3P9fLCPFNjcO6N9217KiQ8oegficJ6en3fvX1T1N9Kjmh MH8jDXtFSNmxhxsQtDBLhpj1wVTtLTQCPW88UT2nJnUn3x6jrQTa944a6Z/vFX1FDW OOkiVyQf7r0l9CA/WdyPJ9kK3JTnrpkcWT8/YTvAwCiWcaWmBjmAnw48E8PbKvE4Ye fyKjbIzV42v4Z8ApuOC9LthatKBT/S5dymfkvsKvWhAU3AsKyPiv5ipir4Y1qpCptS 9ZL1+3GDxW0wcJ+bOcJq+PV6a7OqN8yLukrxZOEldY4ygRWUkzhoy/BbQ9iMf4q+ry Tl5XaaQI119Cw== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1rhPwq-0000000037v-0FO1; Tue, 05 Mar 2024 09:14:52 +0100 From: Johan Hovold To: Bjorn Helgaas , Bjorn Andersson Cc: Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH v3 04/10] PCI: qcom: Add support for disabling ASPM L0s in devicetree Date: Tue, 5 Mar 2024 09:10:59 +0100 Message-ID: <20240305081105.11912-5-johan+linaro@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240305081105.11912-1-johan+linaro@kernel.org> References: <20240305081105.11912-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Commit 9f4f3dfad8cf ("PCI: qcom: Enable ASPM for platforms supporting 1.9.0 ops") started enabling ASPM unconditionally when the hardware claims to support it. This triggers Correctable Errors for some PCIe devices on machines like the Lenovo ThinkPad X13s, which could indicate an incomplete driver ASPM implementation or that the hardware does in fact not support L0s. Add support for disabling ASPM L0s in the devicetree when it is not supported on a particular machine and controller. Note that only the 1.9.0 ops enable ASPM currently. Fixes: 9f4f3dfad8cf ("PCI: qcom: Enable ASPM for platforms supporting 1.9.0 ops") Cc: stable@vger.kernel.org # 6.7 Reviewed-by: Manivannan Sadhasivam Signed-off-by: Johan Hovold --- drivers/pci/controller/dwc/pcie-qcom.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 09d485df34b9..0fb5dc06d2ef 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -273,6 +273,25 @@ static int qcom_pcie_start_link(struct dw_pcie *pci) return 0; } +static void qcom_pcie_clear_aspm_l0s(struct dw_pcie *pci) +{ + u16 offset; + u32 val; + + if (!of_property_read_bool(pci->dev->of_node, "aspm-no-l0s")) + return; + + offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); + + dw_pcie_dbi_ro_wr_en(pci); + + val = readl(pci->dbi_base + offset + PCI_EXP_LNKCAP); + val &= ~PCI_EXP_LNKCAP_ASPM_L0S; + writel(val, pci->dbi_base + offset + PCI_EXP_LNKCAP); + + dw_pcie_dbi_ro_wr_dis(pci); +} + static void qcom_pcie_clear_hpc(struct dw_pcie *pci) { u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); @@ -962,6 +981,7 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie) static int qcom_pcie_post_init_2_7_0(struct qcom_pcie *pcie) { + qcom_pcie_clear_aspm_l0s(pcie->pci); qcom_pcie_clear_hpc(pcie->pci); return 0; From patchwork Tue Mar 5 08:11:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 1908078 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=dcoOjbjL; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=139.178.88.99; helo=sv.mirrors.kernel.org; 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Tue, 5 Mar 2024 08:14:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1709626485; bh=OJHWjk4Xm5Pt54cy7lIhhGCkWvJvBeW3Z7MBRZ4L81c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dcoOjbjLKivx6csYxxcB0bZY3VDVvpXOc9+Im43l9NbUZvfjBPD5lymo+2o+sdRTZ jYM5QOdZ8HWEs9MDWk9R0VfYYMnVXFA9K/62D/aguz0SYUi4vALumoqXe3YC+2EqGV gwG0XQGLmTkwim3B4hERpo74J4I/l8XTV9AX6M8KY3vyTt3+IJivk3L9NyODu0KIYK 9ztuEowuGulqzmyEWv4ESf1k+O2zeKW+H/4wAgZm0VfPTFEllAsKCWKHPjNkM3dBV9 S+fkP86UY5mLtVdVyavKmSHLX+ejEwCdBDa05VCNBFVQvoSoRAEffLlQ2w4K1+31yZ DWPjXat1PyTCA== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1rhPwq-0000000037x-0gOM; Tue, 05 Mar 2024 09:14:52 +0100 From: Johan Hovold To: Bjorn Helgaas , Bjorn Andersson Cc: Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH v3 05/10] arm64: dts: qcom: sc8280xp: add missing PCIe minimum OPP Date: Tue, 5 Mar 2024 09:11:00 +0100 Message-ID: <20240305081105.11912-6-johan+linaro@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240305081105.11912-1-johan+linaro@kernel.org> References: <20240305081105.11912-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the missing PCIe CX performance level votes to avoid relying on other drivers (e.g. USB or UFS) to maintain the nominal performance level required for Gen3 speeds. Fixes: 813e83157001 ("arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodes") Cc: stable@vger.kernel.org # 6.2 Reviewed-by: Konrad Dybcio Reviewed-by: Manivannan Sadhasivam Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index c8e84c53935c..424d143ee26a 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1780,6 +1780,7 @@ pcie4: pcie@1c00000 { reset-names = "pci"; power-domains = <&gcc PCIE_4_GDSC>; + required-opps = <&rpmhpd_opp_nom>; phys = <&pcie4_phy>; phy-names = "pciephy"; @@ -1878,6 +1879,7 @@ pcie3b: pcie@1c08000 { reset-names = "pci"; power-domains = <&gcc PCIE_3B_GDSC>; + required-opps = <&rpmhpd_opp_nom>; phys = <&pcie3b_phy>; phy-names = "pciephy"; @@ -1976,6 +1978,7 @@ pcie3a: pcie@1c10000 { reset-names = "pci"; power-domains = <&gcc PCIE_3A_GDSC>; + required-opps = <&rpmhpd_opp_nom>; phys = <&pcie3a_phy>; phy-names = "pciephy"; @@ -2077,6 +2080,7 @@ pcie2b: pcie@1c18000 { reset-names = "pci"; power-domains = <&gcc PCIE_2B_GDSC>; + required-opps = <&rpmhpd_opp_nom>; phys = <&pcie2b_phy>; phy-names = "pciephy"; @@ -2175,6 +2179,7 @@ pcie2a: pcie@1c20000 { reset-names = "pci"; power-domains = <&gcc PCIE_2A_GDSC>; + required-opps = <&rpmhpd_opp_nom>; phys = <&pcie2a_phy>; phy-names = "pciephy"; From patchwork Tue Mar 5 08:11:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 1908070 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=X/IjcnCa; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.80.249; 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Tue, 05 Mar 2024 09:14:52 +0100 From: Johan Hovold To: Bjorn Helgaas , Bjorn Andersson Cc: Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH v3 06/10] arm64: dts: qcom: sc8280xp-crd: disable ASPM L0s for NVMe Date: Tue, 5 Mar 2024 09:11:01 +0100 Message-ID: <20240305081105.11912-7-johan+linaro@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240305081105.11912-1-johan+linaro@kernel.org> References: <20240305081105.11912-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enabling ASPM L0s on the CRD results in a large amount of Correctable Errors (Timeout) when accessing the NVMe controller so disable it for now. Fixes: 9f4f3dfad8cf ("PCI: qcom: Enable ASPM for platforms supporting 1.9.0 ops") Cc: stable@vger.kernel.org # 6.7 Reviewed-by: Konrad Dybcio Reviewed-by: Manivannan Sadhasivam Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index 41215567b3ae..7e94a68d5d9f 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -525,6 +525,8 @@ keyboard@68 { }; &pcie2a { + aspm-no-l0s; + perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; From patchwork Tue Mar 5 08:11:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 1908072 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Tue, 05 Mar 2024 09:14:52 +0100 From: Johan Hovold To: Bjorn Helgaas , Bjorn Andersson Cc: Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH v3 07/10] arm64: dts: qcom: sc8280xp-crd: disable ASPM L0s for modem and Wi-Fi Date: Tue, 5 Mar 2024 09:11:02 +0100 Message-ID: <20240305081105.11912-8-johan+linaro@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240305081105.11912-1-johan+linaro@kernel.org> References: <20240305081105.11912-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 There are indications that ASPM L0s is not working very well on this machine so disable it also for the modem and Wi-Fi controllers for now. This specifically avoids having the modem and Wi-Fi controllers bounce in an out of L0s when not used (the modem still bounces in and out of L1) as well as intermittent Correctable errors on the Wi-Fi link when not used. Fixes: 9f4f3dfad8cf ("PCI: qcom: Enable ASPM for platforms supporting 1.9.0 ops") Cc: stable@vger.kernel.org # 6.7 Reviewed-by: Manivannan Sadhasivam Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index 7e94a68d5d9f..8fc0380f65a0 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -546,6 +546,8 @@ &pcie2a_phy { }; &pcie3a { + aspm-no-l0s; + perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; @@ -566,6 +568,7 @@ &pcie3a_phy { &pcie4 { max-link-speed = <2>; + aspm-no-l0s; perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>; From patchwork Tue Mar 5 08:11:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 1908081 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Tue, 05 Mar 2024 09:14:52 +0100 From: Johan Hovold To: Bjorn Helgaas , Bjorn Andersson Cc: Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH v3 08/10] arm64: dts: qcom: sc8280xp-x13s: disable ASPM L0s for Wi-Fi Date: Tue, 5 Mar 2024 09:11:03 +0100 Message-ID: <20240305081105.11912-9-johan+linaro@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240305081105.11912-1-johan+linaro@kernel.org> References: <20240305081105.11912-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enabling ASPM L0s on the Lenovo Thinkpad X13s results in Correctable Errors (BadTLP, Timeout) when accessing the Wi-Fi controller so disable it for now. Fixes: 9f4f3dfad8cf ("PCI: qcom: Enable ASPM for platforms supporting 1.9.0 ops") Cc: stable@vger.kernel.org # 6.7 Reviewed-by: Manivannan Sadhasivam Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index eb8a16aa233e..9567b82db9a5 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -734,6 +734,7 @@ &pcie3a_phy { &pcie4 { max-link-speed = <2>; + aspm-no-l0s; perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>; From patchwork Tue Mar 5 08:11:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 1908080 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Tue, 05 Mar 2024 09:14:52 +0100 From: Johan Hovold To: Bjorn Helgaas , Bjorn Andersson Cc: Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH v3 09/10] arm64: dts: qcom: sc8280xp-x13s: disable ASPM L0s for NVMe and modem Date: Tue, 5 Mar 2024 09:11:04 +0100 Message-ID: <20240305081105.11912-10-johan+linaro@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240305081105.11912-1-johan+linaro@kernel.org> References: <20240305081105.11912-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 There are indications that ASPM L0s is not working very well on this machine so disable it also for the NVMe and modem controllers for now. Note that this is done as a precaution based on problems with the Wi-Fi on the X13s as well as the NVMe, modem and Wi-Fi on the sc8280xp-crd reference design (the NVMe controller on my X13s does not support L0s and the machine lacks a modem). Fixes: 9f4f3dfad8cf ("PCI: qcom: Enable ASPM for platforms supporting 1.9.0 ops") Cc: stable@vger.kernel.org # 6.7 Reviewed-by: Manivannan Sadhasivam Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 9567b82db9a5..057e4d9d3c0f 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -695,6 +695,8 @@ keyboard@68 { }; &pcie2a { + aspm-no-l0s; + perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; @@ -714,6 +716,8 @@ &pcie2a_phy { }; &pcie3a { + aspm-no-l0s; + perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; From patchwork Tue Mar 5 08:11:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 1908075 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Tue, 05 Mar 2024 09:14:52 +0100 From: Johan Hovold To: Bjorn Helgaas , Bjorn Andersson Cc: Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 10/10] arm64: dts: qcom: sc8280xp: enable GICv3 ITS for PCIe Date: Tue, 5 Mar 2024 09:11:05 +0100 Message-ID: <20240305081105.11912-11-johan+linaro@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240305081105.11912-1-johan+linaro@kernel.org> References: <20240305081105.11912-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The DWC PCIe controller can be used with its internal MSI controller or with an external one such as the GICv3 Interrupt Translation Service (ITS). Add the msi-map properties needed to use the GIC ITS. This will also make Linux switch to the ITS implementation, which allows for assigning affinity to individual MSIs. Note that using the GIC ITS on SC8280XP will cause Advanced Error Reporting (AER) interrupts to be received on errors unlike when using the internal MSI controller. This will specifically lead to notifications about Correctable Errors being logged for the Wi-Fi controller on the Lenovo ThinkPad X13s when ASPM L0s is enabled. Suggested-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Reviewed-by: Manivannan Sadhasivam Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 424d143ee26a..4708ba28c4d5 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1737,6 +1737,8 @@ pcie4: pcie@1c00000 { linux,pci-domain = <6>; num-lanes = <1>; + msi-map = <0x0 &its 0xe0000 0x10000>; + interrupts = , , , @@ -1838,6 +1840,8 @@ pcie3b: pcie@1c08000 { linux,pci-domain = <5>; num-lanes = <2>; + msi-map = <0x0 &its 0xd0000 0x10000>; + interrupts = , , , @@ -1937,6 +1941,8 @@ pcie3a: pcie@1c10000 { linux,pci-domain = <4>; num-lanes = <4>; + msi-map = <0x0 &its 0xc0000 0x10000>; + interrupts = , , , @@ -2039,6 +2045,8 @@ pcie2b: pcie@1c18000 { linux,pci-domain = <3>; num-lanes = <2>; + msi-map = <0x0 &its 0xb0000 0x10000>; + interrupts = , , , @@ -2138,6 +2146,8 @@ pcie2a: pcie@1c20000 { linux,pci-domain = <2>; num-lanes = <4>; + msi-map = <0x0 &its 0xa0000 0x10000>; + interrupts = , , , @@ -4342,7 +4352,7 @@ intc: interrupt-controller@17a00000 { #size-cells = <2>; ranges; - msi-controller@17a40000 { + its: msi-controller@17a40000 { compatible = "arm,gic-v3-its"; reg = <0 0x17a40000 0 0x20000>; msi-controller;