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Mon, 4 Mar 2024 17:04:26 +0100 (CET) Received: from llp-hahn.hahn.test (172.25.0.11) by Berlix.phytec.de (172.25.0.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.6; Mon, 4 Mar 2024 17:04:26 +0100 From: Benjamin Hahn Date: Mon, 4 Mar 2024 17:04:19 +0100 Subject: [PATCH v2 1/2] board: phytec: common: phytec_som_detection: Add phytec_get_som_type MIME-Version: 1.0 Message-ID: <20240304-pcl-070-patches-v2-1-c534960c4b8b@phytec.de> References: <20240304-pcl-070-patches-v2-0-c534960c4b8b@phytec.de> In-Reply-To: <20240304-pcl-070-patches-v2-0-c534960c4b8b@phytec.de> To: Tom Rini , Teresa Remmet , Fabio Estevam CC: , , Benjamin Hahn X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709568265; l=1801; i=B.Hahn@phytec.de; s=20240126; h=from:subject:message-id; bh=7tEESjFYAC5ycSxDkMcKq6L20ivhlizyLMZyIjGjSbI=; b=YGoKyA7mHKAZeeviDEHr9jeyqnitittxkKG5OQzs1TgtXYTp0lEBm2Qdm7Trh9pUBdd2mvKj+ 9IgmvA0CfDVCveVitsyqNXkeos4KMT66ZV7YfL4x204/MLjkHcjUMFS X-Developer-Key: i=B.Hahn@phytec.de; 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Add an enum for the som_type. Signed-off-by: Benjamin Hahn --- board/phytec/common/phytec_som_detection.c | 10 ++++++++++ board/phytec/common/phytec_som_detection.h | 8 ++++++++ 2 files changed, 18 insertions(+) diff --git a/board/phytec/common/phytec_som_detection.c b/board/phytec/common/phytec_som_detection.c index c73bf9721b2f..f9607b018dea 100644 --- a/board/phytec/common/phytec_som_detection.c +++ b/board/phytec/common/phytec_som_detection.c @@ -203,6 +203,16 @@ u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data) return api2->pcb_rev; } +u8 __maybe_unused phytec_get_som_type(struct phytec_eeprom_data *data) +{ + if (!data) + data = &eeprom_data; + if (data->api_rev < PHYTEC_API_REV2) + return PHYTEC_EEPROM_INVAL; + + return data->data.data_api2.som_type; +} + #else inline int phytec_eeprom_data_setup(struct phytec_eeprom_data *data, diff --git a/board/phytec/common/phytec_som_detection.h b/board/phytec/common/phytec_som_detection.h index 11009240875c..c0f0c57a6123 100644 --- a/board/phytec/common/phytec_som_detection.h +++ b/board/phytec/common/phytec_som_detection.h @@ -19,6 +19,13 @@ enum { PHYTEC_API_REV2, }; +enum phytec_som_type_str { + PCM = 0, + PCL, + KSM, + KSP, +}; + static const char * const phytec_som_type_str[] = { "PCM", "PCL", @@ -67,5 +74,6 @@ void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data *data); char * __maybe_unused phytec_get_opt(struct phytec_eeprom_data *data); u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data); +u8 __maybe_unused phytec_get_som_type(struct phytec_eeprom_data *data); #endif /* _PHYTEC_SOM_DETECTION_H */ From patchwork Mon Mar 4 16:04:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Hahn X-Patchwork-Id: 1907756 X-Patchwork-Delegate: festevam@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=phytec.de header.i=@phytec.de header.a=rsa-sha256 header.s=a4 header.b=h+EsJRzL; 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Mon, 4 Mar 2024 17:04:26 +0100 From: Benjamin Hahn Date: Mon, 4 Mar 2024 17:04:20 +0100 Subject: [PATCH v2 2/2] board: phycore_imx8mp: Use 2GHz RAM timings for PCL-070 from pcb_rev 1 MIME-Version: 1.0 Message-ID: <20240304-pcl-070-patches-v2-2-c534960c4b8b@phytec.de> References: <20240304-pcl-070-patches-v2-0-c534960c4b8b@phytec.de> In-Reply-To: <20240304-pcl-070-patches-v2-0-c534960c4b8b@phytec.de> To: Tom Rini , Teresa Remmet , Fabio Estevam CC: , , Benjamin Hahn X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709568265; l=1011; i=B.Hahn@phytec.de; s=20240126; h=from:subject:message-id; bh=AMo5SyEXxPfRMypYYH8XzbzshnvDBHxNqxnTRJrWnE0=; b=nwuGw5DImfsZgZqIXDTnUzilB41owiqrhClFDUpTvKLeUcvXW9t+qpKkQ057+44PxkQ/OUXpO lhM4XWWB3dAAQ0Ps0l3rEnhbTpg0xsNwUgw2+IK7/m6Uk79H/DVxd1s X-Developer-Key: i=B.Hahn@phytec.de; a=ed25519; pk=r04clMulHz6S6js6elPBA+U+zVdDAqJyEyoNd8I3pSw= X-Originating-IP: [172.25.0.11] X-ClientProxiedBy: Florix.phytec.de (172.25.0.13) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrALMWRmVeSWpSXmKPExsWyRpKBR5fr49NUgykbdSweXvW3mDppM7vF 272d7Bbd79QdWDx2zrrL7vHqwCp2j7N3djB69He3sAawRHHZpKTmZJalFunbJXBlXH7NX/CV vWLX701sDYwn2LoYOTkkBEwkpsx8xNzFyMUhJLCYSaK79QQThPOAUeL7p4+sIFVsAmoSu968 BrNZBFQklrZuBrOFBRIkug8/ZQKxeQUEJU7OfMLSxcjBwSygKbF+lz5ImFlAXmL72znMIGFe ASeJLzfMQMJCQOadbx1gN3AKOEvcvPQDzBYRyJZ41rmFHWJKlMS7iUEgpoSAsMSmnVogh0kI 7GaSuHi9kwkiniix87UcxERZiZvnt0B9JS8x7dxrZgg7VOLIptVMExhFZiE5cxbCmbOQnLmA kXkVo1BuZnJ2alFmtl5BRmVJarJeSuomRlAsiDBw7WDsm+NxiJGJg/EQowQHs5IIb82vJ6lC vCmJlVWpRfnxRaU5qcWHGKU5WJTEeVd3BKcKCaQnlqRmp6YWpBbBZJk4OKUaGNU360Qdqv16 RySSdwOv9oRnExfsej+zSqwmZ2N4iV7RhknGGdddPk/du2/t/e0vVSZOsZu/6+P3F9Md7Sxv Cjv9umOln7WxRUqj9rHzSSehzpkGVxJbJX+F/RZeXXlY9AjTS54iraZDZ28E/DW7rGa60Ta9 yEcu/Gth9FPXoztbSuefviZjmq/EUpyRaKjFXFScCAAFCsr9cwIAAA== X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean We need to differ between PCL-070 and PCM-070. PCL-070 supports 2GHz RAM timings from pcb rev 1 or newer. PCM-070 supports 2GHz RAM timings from pcb rev 3 or newer. Signed-off-by: Benjamin Hahn --- board/phytec/phycore_imx8mp/spl.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c index d38f6368fe36..15a8c75e9982 100644 --- a/board/phytec/phycore_imx8mp/spl.c +++ b/board/phytec/phycore_imx8mp/spl.c @@ -46,8 +46,10 @@ void spl_dram_init(void) if (!ret) phytec_print_som_info(NULL); - ret = phytec_get_rev(NULL); - if (ret >= 3 && ret != PHYTEC_EEPROM_INVAL) { + u8 rev = phytec_get_rev(NULL); + u8 somtyp = phytec_get_som_type(NULL); + + if (rev != PHYTEC_EEPROM_INVAL && (rev >= 3 || (somtyp == PCL && rev >= 1))) { dram_timing.ddrc_cfg[3].val = 0x1323; dram_timing.ddrc_cfg[4].val = 0x1e84800; dram_timing.ddrc_cfg[5].val = 0x7a0118;