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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id 8F59C240002; Fri, 9 Feb 2024 14:31:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707489109; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Aq9MbOqr21Sl0cLKaoBi7IfLbqhaI1zVPu3ITBlSL8o=; b=QgvOrLd4CH0xvBJjh2lbqtPgPCmRxHnDiPDPO54ZMRSb62wQ3AT6wnzDmq+w2Xf1Hcof7n cJBeXqM48r4vthLWHP8MbKcQFeeUXqprkIdIKsQv2YwtUzrWYFvbdiE7rkEvJgFEQ+Y6eg vLx2t/h5u8lwh6HkRY56X5Pi+6iS3lfhed97byLmBwV4nM1HpyLOQKGEScbnkz4FUex8Gz UAr7t02ETmVg9fIyLck3fz+GPlqBbnw7TK3q6KWjUXdxdaEeGxIwtR3Aff57RmzDTuYmxC pht/sVt95GcBJLa6vA4Gn3ye8cthaeKBfmTVKixNwLIYyok4XuahnECr9cNHkA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 09 Feb 2024 15:31:39 +0100 Subject: [PATCH v5 03/13] dt-bindings: clock: mobileye,eyeq5-clk: add bindings Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240209-mbly-clk-v5-3-f094ee5e918a@bootlin.com> References: <20240209-mbly-clk-v5-0-f094ee5e918a@bootlin.com> In-Reply-To: <20240209-mbly-clk-v5-0-f094ee5e918a@bootlin.com> To: Gregory CLEMENT , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Bogendoerfer , Linus Walleij , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Philipp Zabel Cc: Vladimir Kondratiev , linux-mips@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Petazzoni , Tawfik Bayouk , linux-gpio@vger.kernel.org, =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com Add DT schema bindings for the EyeQ5 clock controller driver. Signed-off-by: Théo Lebrun Reviewed-by: Krzysztof Kozlowski --- .../bindings/clock/mobileye,eyeq5-clk.yaml | 52 ++++++++++++++++++++++ MAINTAINERS | 2 + include/dt-bindings/clock/mobileye,eyeq5-clk.h | 22 +++++++++ 3 files changed, 76 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml b/Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml new file mode 100644 index 000000000000..44eff4618ca7 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mobileye,eyeq5-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mobileye EyeQ5 clock controller + +description: + The EyeQ5 clock controller handles 10 read-only PLLs derived from the main + crystal clock. It also exposes one divider clock, a child of one of the PLLs. + Its registers live in a shared region called OLB. + +maintainers: + - Grégory Clement + - Théo Lebrun + - Vladimir Kondratiev + +properties: + compatible: + const: mobileye,eyeq5-clk + + reg: + minItems: 2 + maxItems: 2 + + reg-names: + items: + - const: plls + - const: ospi + + "#clock-cells": + const: 1 + + clocks: + maxItems: 1 + description: + Input parent clock to all PLLs. Expected to be the main crystal. + + clock-names: + items: + - const: ref + +required: + - compatible + - reg + - reg-names + - "#clock-cells" + - clocks + - clock-names + +additionalProperties: false diff --git a/MAINTAINERS b/MAINTAINERS index 35c752dc536b..2143f64e9e15 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14789,10 +14789,12 @@ M: Gregory CLEMENT M: Théo Lebrun L: linux-mips@vger.kernel.org S: Maintained +F: Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml F: Documentation/devicetree/bindings/mips/mobileye.yaml F: arch/mips/boot/dts/mobileye/ F: arch/mips/configs/eyeq5_defconfig F: arch/mips/mobileye/board-epm5.its.S +F: include/dt-bindings/clock/mobileye,eyeq5-clk.h F: include/dt-bindings/soc/mobileye,eyeq5.h MODULE SUPPORT diff --git a/include/dt-bindings/clock/mobileye,eyeq5-clk.h b/include/dt-bindings/clock/mobileye,eyeq5-clk.h new file mode 100644 index 000000000000..26d8930335e4 --- /dev/null +++ b/include/dt-bindings/clock/mobileye,eyeq5-clk.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (C) 2024 Mobileye Vision Technologies Ltd. + */ + +#ifndef _DT_BINDINGS_CLOCK_MOBILEYE_EYEQ5_CLK_H +#define _DT_BINDINGS_CLOCK_MOBILEYE_EYEQ5_CLK_H + +#define EQ5C_PLL_CPU 0 +#define EQ5C_PLL_VMP 1 +#define EQ5C_PLL_PMA 2 +#define EQ5C_PLL_VDI 3 +#define EQ5C_PLL_DDR0 4 +#define EQ5C_PLL_PCI 5 +#define EQ5C_PLL_PER 6 +#define EQ5C_PLL_PMAC 7 +#define EQ5C_PLL_MPC 8 +#define EQ5C_PLL_DDR1 9 + +#define EQ5C_DIV_OSPI 10 + +#endif From patchwork Fri Feb 9 14:31:40 2024 Content-Type: text/plain; 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Signed-off-by: Théo Lebrun Reviewed-by: Krzysztof Kozlowski --- .../bindings/reset/mobileye,eyeq5-reset.yaml | 44 ++++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 45 insertions(+) diff --git a/Documentation/devicetree/bindings/reset/mobileye,eyeq5-reset.yaml b/Documentation/devicetree/bindings/reset/mobileye,eyeq5-reset.yaml new file mode 100644 index 000000000000..6b412f867d0d --- /dev/null +++ b/Documentation/devicetree/bindings/reset/mobileye,eyeq5-reset.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/mobileye,eyeq5-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mobileye EyeQ5 reset controller + +description: + The EyeQ5 reset driver handles three reset domains. Its registers live in a + shared region called OLB. + +maintainers: + - Grégory Clement + - Théo Lebrun + - Vladimir Kondratiev + +properties: + compatible: + const: mobileye,eyeq5-reset + + reg: + minItems: 3 + maxItems: 3 + + reg-names: + items: + - const: d0 + - const: d1 + - const: d2 + + "#reset-cells": + const: 2 + description: + The first cell is the domain (0 to 2 inclusive) and the second one is the + reset index inside that domain. + +required: + - compatible + - reg + - reg-names + - "#reset-cells" + +additionalProperties: false diff --git a/MAINTAINERS b/MAINTAINERS index 2143f64e9e15..d5348fbbace6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14791,6 +14791,7 @@ L: linux-mips@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml F: Documentation/devicetree/bindings/mips/mobileye.yaml +F: Documentation/devicetree/bindings/reset/mobileye,eyeq5-reset.yaml F: arch/mips/boot/dts/mobileye/ F: arch/mips/configs/eyeq5_defconfig F: arch/mips/mobileye/board-epm5.its.S From patchwork Fri Feb 9 14:31:41 2024 Content-Type: text/plain; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id 2A171240010; Fri, 9 Feb 2024 14:31:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707489113; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CQI1tDyU/5DevDA510arVwNDwXyynUTeTAbpUDAxeCQ=; b=bAPxabmHLvUbZ5TfuOyX+Bqd4ho7o2eP2gqdOF6Umr6GhennS38lLy7jJO7p7qZ7A34fhk Be3ps2J5vI51z8vToIwn3CNAWHgKZ9VN5x1LN6ijZt6QhGfHxciiCzhe4r1v0xXB2PC7aO ZWAB2QaKCvnv2eIlIH7Ax1ASFPPOADixmfziuH1HAD6R6J2wSS7/h+EobVBrLM8PmGeps1 8HrZSQns/1iktPgB7yaFO8t7PVgOdr1Ero2eDty+CK4TJ/3JiP53OiEzrpLuyOXpv0NrbL MiyQMEFp2zmy3BMo35ehW0aQ8w+Cx8KekJm48SZMgfy1d12T2rKpPO8KYuqPyw== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 09 Feb 2024 15:31:41 +0100 Subject: [PATCH v5 05/13] dt-bindings: pinctrl: mobileye,eyeq5-pinctrl: add bindings Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240209-mbly-clk-v5-5-f094ee5e918a@bootlin.com> References: <20240209-mbly-clk-v5-0-f094ee5e918a@bootlin.com> In-Reply-To: <20240209-mbly-clk-v5-0-f094ee5e918a@bootlin.com> To: Gregory CLEMENT , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Bogendoerfer , Linus Walleij , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Philipp Zabel Cc: Vladimir Kondratiev , linux-mips@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Petazzoni , Tawfik Bayouk , linux-gpio@vger.kernel.org, =?utf-8?q?Th=C3=A9o_Lebrun?= , Rob Herring X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com Add dt-schema type bindings for the Mobileye EyeQ5 pin controller. Reviewed-by: Rob Herring Signed-off-by: Théo Lebrun --- .../bindings/pinctrl/mobileye,eyeq5-pinctrl.yaml | 242 +++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 243 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/mobileye,eyeq5-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mobileye,eyeq5-pinctrl.yaml new file mode 100644 index 000000000000..5f00604bf48c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/mobileye,eyeq5-pinctrl.yaml @@ -0,0 +1,242 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/mobileye,eyeq5-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mobileye EyeQ5 pin controller + +description: > + The EyeQ5 pin controller handles the two pin banks of the system. It belongs + to a system-controller block called OLB. + + Pin control is about bias (pull-down, pull-up), drive strength and muxing. Pin + muxing supports two functions for each pin: first is GPIO, second is + pin-dependent. + + Pins and groups are bijective. + +maintainers: + - Grégory Clement + - Théo Lebrun + - Vladimir Kondratiev + +$ref: pinctrl.yaml# + +properties: + compatible: + enum: + - mobileye,eyeq5-pinctrl + + reg: + maxItems: 1 + +patternProperties: + "-pins?$": + type: object + description: Pin muxing configuration. + $ref: pinmux-node.yaml# + additionalProperties: false + properties: + pins: true + function: + enum: [gpio, + # Bank A + timer0, timer1, timer2, timer5, uart0, uart1, can0, can1, spi0, + spi1, refclk0, + # Bank B + timer3, timer4, timer6, uart2, can2, spi2, spi3, mclk0] + bias-disable: true + bias-pull-down: true + bias-pull-up: true + drive-strength: true + required: + - pins + - function + allOf: + - if: + properties: + function: + const: gpio + then: + properties: + pins: + items: # PA0 - PA28, PB0 - PB22 + pattern: '^(P(A|B)1?[0-9]|PA2[0-8]|PB2[0-2])$' + - if: + properties: + function: + const: timer0 + then: + properties: + pins: + items: + enum: [PA0, PA1] + - if: + properties: + function: + const: timer1 + then: + properties: + pins: + items: + enum: [PA2, PA3] + - if: + properties: + function: + const: timer2 + then: + properties: + pins: + items: + enum: [PA4, PA5] + - if: + properties: + function: + const: timer5 + then: + properties: + pins: + items: + enum: [PA6, PA7, PA8, PA9] + - if: + properties: + function: + const: uart0 + then: + properties: + pins: + items: + enum: [PA10, PA11] + - if: + properties: + function: + const: uart1 + then: + properties: + pins: + items: + enum: [PA12, PA13] + - if: + properties: + function: + const: can0 + then: + properties: + pins: + items: + enum: [PA14, PA15] + - if: + properties: + function: + const: can1 + then: + properties: + pins: + items: + enum: [PA16, PA17] + - if: + properties: + function: + const: spi0 + then: + properties: + pins: + items: + enum: [PA18, PA19, PA20, PA21, PA22] + - if: + properties: + function: + const: spi1 + then: + properties: + pins: + items: + enum: [PA23, PA24, PA25, PA26, PA27] + - if: + properties: + function: + const: refclk0 + then: + properties: + pins: + items: + enum: [PA28] + - if: + properties: + function: + const: timer3 + then: + properties: + pins: + items: + enum: [PB0, PB1] + - if: + properties: + function: + const: timer4 + then: + properties: + pins: + items: + enum: [PB2, PB3] + - if: + properties: + function: + const: timer6 + then: + properties: + pins: + items: + enum: [PB4, PB5, PB6, PB7] + - if: + properties: + function: + const: uart2 + then: + properties: + pins: + items: + enum: [PB8, PB9] + - if: + properties: + function: + const: can2 + then: + properties: + pins: + items: + enum: [PB10, PB11] + - if: + properties: + function: + const: spi2 + then: + properties: + pins: + items: + enum: [PB12, PB13, PB14, PB15, PB16] + - if: + properties: + function: + const: spi3 + then: + properties: + pins: + items: + enum: [PB17, PB18, PB19, PB20, PB21] + - if: + properties: + function: + const: mclk0 + then: + properties: + pins: + items: + enum: [PB22] + +required: + - compatible + - reg + +additionalProperties: false diff --git a/MAINTAINERS b/MAINTAINERS index d5348fbbace6..a09899acfa6a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14791,6 +14791,7 @@ L: linux-mips@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml F: Documentation/devicetree/bindings/mips/mobileye.yaml +F: Documentation/devicetree/bindings/pinctrl/mobileye,eyeq5-pinctrl.yaml F: Documentation/devicetree/bindings/reset/mobileye,eyeq5-reset.yaml F: arch/mips/boot/dts/mobileye/ F: arch/mips/configs/eyeq5_defconfig From patchwork Fri Feb 9 14:31:42 2024 Content-Type: text/plain; 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Signed-off-by: Théo Lebrun Reviewed-by: Krzysztof Kozlowski --- .../bindings/soc/mobileye/mobileye,eyeq5-olb.yaml | 94 ++++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 95 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/mobileye/mobileye,eyeq5-olb.yaml b/Documentation/devicetree/bindings/soc/mobileye/mobileye,eyeq5-olb.yaml new file mode 100644 index 000000000000..768ff1aa1db7 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/mobileye/mobileye,eyeq5-olb.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/mobileye/mobileye,eyeq5-olb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mobileye EyeQ5 SoC system controller + +maintainers: + - Grégory Clement + - Théo Lebrun + - Vladimir Kondratiev + +description: + OLB ("Other Logic Block") is a hardware block grouping smaller blocks. Clocks, + resets, pinctrl are being handled from here. + +properties: + compatible: + items: + - const: mobileye,eyeq5-olb + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + ranges: true + +patternProperties: + "^clock-controller@[0-9a-f]+$": + $ref: /schemas/clock/mobileye,eyeq5-clk.yaml# + + "^reset-controller@[0-9a-f]+$": + $ref: /schemas/reset/mobileye,eyeq5-reset.yaml# + + "^pinctrl@[0-9a-f]+$": + $ref: /schemas/pinctrl/mobileye,eyeq5-pinctrl.yaml# + +required: + - compatible + - reg + - '#address-cells' + - '#size-cells' + - ranges + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + system-controller@e00000 { + compatible = "mobileye,eyeq5-olb", "syscon", "simple-mfd"; + reg = <0x0 0xe00000 0x0 0x400>; + ranges = <0x0 0x0 0xe00000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + + reset: reset-controller@0 { + compatible = "mobileye,eyeq5-reset"; + reg = <0x000 0x0c>, <0x200 0x34>, <0x120 0x04>; + reg-names = "d0", "d1", "d2"; + #reset-cells = <2>; + }; + + clocks: clock-controller@2c { + compatible = "mobileye,eyeq5-clk"; + reg = <0x02c 0x50>, <0x11c 0x04>; + reg-names = "plls", "ospi"; + #clock-cells = <1>; + clocks = <&xtal>; + clock-names = "ref"; + }; + + pinctrl: pinctrl@b0 { + compatible = "mobileye,eyeq5-pinctrl"; + reg = <0x0b0 0x30>; + + uart2_pins: uart2-pins { + function = "uart2"; + pins = "PB8", "PB9"; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index a09899acfa6a..d6e1dacf1c84 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14793,6 +14793,7 @@ F: Documentation/devicetree/bindings/clock/mobileye,eyeq5-clk.yaml F: Documentation/devicetree/bindings/mips/mobileye.yaml F: Documentation/devicetree/bindings/pinctrl/mobileye,eyeq5-pinctrl.yaml F: Documentation/devicetree/bindings/reset/mobileye,eyeq5-reset.yaml +F: Documentation/devicetree/bindings/soc/mobileye/ F: arch/mips/boot/dts/mobileye/ F: arch/mips/configs/eyeq5_defconfig F: arch/mips/mobileye/board-epm5.its.S