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Mon, 22 Jan 2024 23:11:26 -0800 (PST) Received: from free.home ([2804:7f1:218b:d88:4bd5:3dd7:ea20:12bc]) by smtp.gmail.com with ESMTPSA id r2-20020a056a00216200b006dbdb5946d7sm3589117pff.6.2024.01.22.23.11.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 23:11:26 -0800 (PST) Received: from livre (livre.home [172.31.160.2]) by free.home (8.15.2/8.15.2) with ESMTPS id 40N7BBQT089486 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Tue, 23 Jan 2024 04:11:11 -0300 From: Alexandre Oliva To: gcc-patches@gcc.gnu.org Cc: Richard Earnshaw , Richard Sandiford , Marcus Shawcroft , Kyrylo Tkachov Subject: [PATCH] aarch64: enforce lane checking for intrinsics Organization: Free thinker, does not speak for AdaCore Date: Tue, 23 Jan 2024 04:11:11 -0300 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/27.1 (gnu/linux) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE, WEIRD_QUOTING autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Calling arm_neon.h functions that take lanes as arguments may fail to report malformed values if the intrinsic happens to be optimized away, e.g. because it is pure or const and the result is unused. Adding __AARCH64_LANE_CHECK calls to the always_inline functions would duplicate errors in case the intrinsics are not optimized away; using another preprocessor macro to call either the intrinsic or __builtin_aarch64_im_lane_boundsi moves the error messages to the arm_neon.h header, and may add warnings if we fall off the end of the functions; duplicating the code to avoid the undesirable effect of the macros doesn't seem appealing; separating the checking from alternate no-error-checking core/pure (invisible?) intrinsics in e.g. folding of non-const/pure (user-callable) intrinsics seems ugly and risky. So I propose dropping the pure/const attribute from the intrinsics and builtin declarations, so that gimple passes won't optimize them away. After expand (when errors are detected and reported), we get plain insns rather than calls, and those are dropped if the outputs are unused. It's not ideal, it could be improved, but it's safe enough for this stage. Regstrapped on x86_64-linux-gnu, along with other patches; also tested on aarch64-elf with gcc-13. This addresses the issue first reported at . Ok to install? for gcc/ChangeLog * config/aarch64/aarch64-builtins.cc (aarch64_get_attributes): Add lane_check parm, to rule out pure and const. (aarch64_init_simd_intrinsics): Pass lane_check if any arg has lane index qualifiers. (aarch64_init_simd_builtin_functions): Likewise. --- gcc/config/aarch64/aarch64-builtins.cc | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc index 9b23b6b8c33f1..1268deea28e6c 100644 --- a/gcc/config/aarch64/aarch64-builtins.cc +++ b/gcc/config/aarch64/aarch64-builtins.cc @@ -1258,11 +1258,12 @@ aarch64_add_attribute (const char *name, tree attrs) /* Return the appropriate attributes for a function that has flags F and mode MODE. */ static tree -aarch64_get_attributes (unsigned int f, machine_mode mode) +aarch64_get_attributes (unsigned int f, machine_mode mode, + bool lane_check = false) { tree attrs = NULL_TREE; - if (!aarch64_modifies_global_state_p (f, mode)) + if (!lane_check && !aarch64_modifies_global_state_p (f, mode)) { if (aarch64_reads_global_state_p (f, mode)) attrs = aarch64_add_attribute ("pure", attrs); @@ -1318,6 +1319,7 @@ aarch64_init_simd_intrinsics (void) tree return_type = void_type_node; tree args = void_list_node; + bool lane_check = false; for (int op_num = d->op_count - 1; op_num >= 0; op_num--) { @@ -1330,10 +1332,17 @@ aarch64_init_simd_intrinsics (void) return_type = eltype; else args = tree_cons (NULL_TREE, eltype, args); + + if (qualifiers & (qualifier_lane_index + | qualifier_struct_load_store_lane_index + | qualifier_lane_pair_index + | qualifier_lane_quadtup_index)) + lane_check = true; } tree ftype = build_function_type (return_type, args); - tree attrs = aarch64_get_attributes (d->flags, d->op_modes[0]); + tree attrs = aarch64_get_attributes (d->flags, d->op_modes[0], + lane_check); unsigned int code = (d->fcode << AARCH64_BUILTIN_SHIFT | AARCH64_BUILTIN_GENERAL); tree fndecl = simulate_builtin_function_decl (input_location, d->name, @@ -1400,6 +1409,7 @@ aarch64_init_simd_builtin_functions (bool called_from_pragma) || (!called_from_pragma && struct_mode_args > 0)) continue; + bool lane_check = false; /* Build a function type directly from the insn_data for this builtin. The build_function_type () function takes care of removing duplicates for us. */ @@ -1435,6 +1445,12 @@ aarch64_init_simd_builtin_functions (bool called_from_pragma) return_type = eltype; else args = tree_cons (NULL_TREE, eltype, args); + + if (qualifiers & (qualifier_lane_index + | qualifier_struct_load_store_lane_index + | qualifier_lane_pair_index + | qualifier_lane_quadtup_index)) + lane_check = true; } ftype = build_function_type (return_type, args); @@ -1448,7 +1464,7 @@ aarch64_init_simd_builtin_functions (bool called_from_pragma) snprintf (namebuf, sizeof (namebuf), "__builtin_aarch64_%s", d->name); - tree attrs = aarch64_get_attributes (d->flags, d->mode); + tree attrs = aarch64_get_attributes (d->flags, d->mode, lane_check); if (called_from_pragma) {