From patchwork Mon Apr 16 16:19:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrice Gasnier X-Patchwork-Id: 898762 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40Ptrt3Ql1z9s3R for ; Tue, 17 Apr 2018 02:20:14 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753165AbeDPQUM (ORCPT ); Mon, 16 Apr 2018 12:20:12 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:14885 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751135AbeDPQUL (ORCPT ); Mon, 16 Apr 2018 12:20:11 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3GGETkt003663; Mon, 16 Apr 2018 18:19:34 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hbd6ct8pp-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 16 Apr 2018 18:19:34 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9F68B3D; Mon, 16 Apr 2018 16:19:33 +0000 (GMT) Received: from Webmail-eu.st.com (gpxdag5node6.st.com [10.75.127.79]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 755665147; Mon, 16 Apr 2018 16:19:33 +0000 (GMT) Received: from localhost (10.75.127.116) by GPXDAG5NODE6.st.com (10.75.127.79) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 16 Apr 2018 18:19:32 +0200 From: Fabrice Gasnier To: , CC: , , , , , , , , , , , Subject: [PATCH v4 1/6] dt-bindings: mfd: stm32-timers: add support for dmas Date: Mon, 16 Apr 2018 18:19:16 +0200 Message-ID: <1523895561-4073-2-git-send-email-fabrice.gasnier@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1523895561-4073-1-git-send-email-fabrice.gasnier@st.com> References: <1523895561-4073-1-git-send-email-fabrice.gasnier@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.116] X-ClientProxiedBy: GPXDAG4NODE5.st.com (10.75.127.75) To GPXDAG5NODE6.st.com (10.75.127.79) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-16_08:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support for DMAs to STM32 timers. STM32 Timers can support up to 7 dma requests: up to 4 channels, update, compare and trigger. DMAs may be used to transfer data from pwm capture for instance. DMA support is made optional, PWM capture support is also an option. This is much more wise system-wide to avoid shortage on DMA request lines as there's significant amount of timer instances that can request up to 7 channels. Signed-off-by: Fabrice Gasnier Reviewed-by: Rob Herring Reviewed-by: Benjamin Gaignard --- .../devicetree/bindings/mfd/stm32-timers.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt index 1db6e00..0e900b5 100644 --- a/Documentation/devicetree/bindings/mfd/stm32-timers.txt +++ b/Documentation/devicetree/bindings/mfd/stm32-timers.txt @@ -19,6 +19,11 @@ Required parameters: Optional parameters: - resets: Phandle to the parent reset controller. See ../reset/st,stm32-rcc.txt +- dmas: List of phandle to dma channels that can be used for + this timer instance. There may be up to 7 dma channels. +- dma-names: List of dma names. Must match 'dmas' property. Valid + names are: "ch1", "ch2", "ch3", "ch4", "up", "trig", + "com". Optional subnodes: - pwm: See ../pwm/pwm-stm32.txt @@ -44,3 +49,18 @@ Example: reg = <0>; }; }; + +Example with all dmas: + timer@40010000 { + ... + dmas = <&dmamux1 11 0x400 0x0>, + <&dmamux1 12 0x400 0x0>, + <&dmamux1 13 0x400 0x0>, + <&dmamux1 14 0x400 0x0>, + <&dmamux1 15 0x400 0x0>, + <&dmamux1 16 0x400 0x0>, + <&dmamux1 17 0x400 0x0>; + dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig", "com"; + ... + child nodes... + };