From patchwork Sat Jan 6 05:10:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6ZKf5bGF5ZOy?= X-Patchwork-Id: 1883181 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4T6T5J5z3Cz1yPM for ; Sat, 6 Jan 2024 16:14:12 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id DEE783864841 for ; Sat, 6 Jan 2024 05:14:10 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbg153.qq.com (smtpbg153.qq.com [13.245.218.24]) by sourceware.org (Postfix) with ESMTPS id 3EA1C384DEDC for ; Sat, 6 Jan 2024 05:10:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 3EA1C384DEDC Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 3EA1C384DEDC Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=13.245.218.24 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1704517853; cv=none; b=emv8/fxNsSv9JoEftTw+G6jZPjVuaoRdqJgGw5n7E8VUq8jUidPrhdykPHU6X8EXsJoLxVKZx3G1Dhi5hxEStmut3ikDMJyIKdpxcn/joKgJfMJJZ2hI0TNAAJ4PxpdXKAPdkGcw5c3CInQCrSkqY/frSzdb8eo83Z1tdec9C64= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1704517853; c=relaxed/simple; bh=0YJ0S5z+379QlBYkUaHs2X7ZrH/9+08h+iLpEcmLOL0=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=LM8LDIwDyGVRkYGhzi7/6/9sAe2TFRRfBYJQZZCpEJFXox6MnsfG2y7U+Dn1olp1zTvo/OGld2ex5dgCziv85vBLx1kM3uhDGJe+wEr/pYemGxT9QJEgf3lmxGG3stOsRuPAa32I3hDVNnSi9YlKlEbxW9hMhifzZVaCfn2LtLQ= ARC-Authentication-Results: i=1; server2.sourceware.org X-QQ-mid: bizesmtp78t1704517841tzk0g6hi Received: from rios-cad122.hadoop.rioslab.org ( [58.60.1.26]) by bizesmtp.qq.com (ESMTP) with id ; Sat, 06 Jan 2024 13:10:39 +0800 (CST) X-QQ-SSF: 01400000000000G0V000000A0000000 X-QQ-FEAT: lcLfPgEN3GZohbue+Zs2ijxiYvpSqBVX4IveHMjsLDIiNSB2a4MveVmlS5VsE okDcqRyuwqU3ioM+qtQCIlRIwBtzMcl00Wa8TCesxMctB4RGwyHN5pti0abqC1l0wTz8pHm DWgSo2uDA0qGSYuQKmavD1VHn6XXUpme/RaOOCJnomhExYcAAIw2kDTR6D1GMPgz0JeffuJ bqaxEjDxVn1arEVT8VCCMWBmFBrvtlYJO9xHeLb99LISwnkq6R/ZtsJQ0hDO5RqnOw08Psj ZWu4eobTt8SAJjA4egVLZ2OPR+hItT+YdJhzPKo5mDxdCVTd1GKS6fUe74I17nucUjEiWRS 4KYTxGYC6R157IH60y5W0nkbvCeQlzXZvraVIgmAkzT8vaJDOogz9BkXkDO83I2C29716W7 +uJ/bPzsCII= X-QQ-GoodBg: 2 X-BIZMAIL-ID: 18370241498803675242 From: Juzhe-Zhong To: gcc-patches@gcc.gnu.org Cc: Juzhe-Zhong Subject: [Committed] RISC-V: Update MAX_SEW for available vsevl info[VSETVL PASS] Date: Sat, 6 Jan 2024 13:10:38 +0800 Message-Id: <20240106051038.213211-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-10.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org This patch fixes a bug of VSETVL PASS in this following situation: Ignore curr info since prev info available with it: prev_info: VALID (insn 8, bb 2) Demand fields: demand_ratio_and_ge_sew demand_avl SEW=16, VLMUL=mf4, RATIO=64, MAX_SEW=64 TAIL_POLICY=agnostic, MASK_POLICY=agnostic AVL=(const_int 1 [0x1]) VL=(nil) curr_info: VALID (insn 12, bb 2) Demand fields: demand_ge_sew demand_non_zero_avl SEW=16, VLMUL=m1, RATIO=16, MAX_SEW=32 TAIL_POLICY=agnostic, MASK_POLICY=agnostic AVL=(const_int 1 [0x1]) VL=(nil) We should update prev_info MAX_SEW from 64 into 32. Before this patch: foo: vsetivli zero,1,e64,m1,ta,ma vle64.v v1,0(a1) vmv.s.x v3,a0 vfmv.s.f v2,fa0 vadd.vv v1,v1,v1 ret After this patch: foo: vsetivli zero,1,e16,mf4,ta,ma vle64.v v1,0(a1) vmv.s.x v3,a0 vfmv.s.f v2,fa0 vsetvli zero,zero,e64,m1,ta,ma vadd.vv v1,v1,v1 ret Tested on both RV32 and RV64 no regression. Committed. PR target/113248 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/pr113248.c: New test. --- gcc/config/riscv/riscv-vsetvl.cc | 17 +++++++++++++++++ .../gcc.target/riscv/rvv/vsetvl/pr113248.c | 15 +++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113248.c diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index 3a2ea9ad44a..7d748edc0ef 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -2876,6 +2876,23 @@ pre_vsetvl::fuse_local_vsetvl_info () curr_info.dump (dump_file, " "); fprintf (dump_file, "\n"); } + /* Even though prev_info is available with curr_info, + we need to update the MAX_SEW of prev_info since + we don't check MAX_SEW in available_p check. + + prev_info: + Demand fields: demand_ratio_and_ge_sew demand_avl + SEW=16, VLMUL=mf4, RATIO=64, MAX_SEW=64 + + curr_info: + Demand fields: demand_ge_sew demand_non_zero_avl + SEW=16, VLMUL=m1, RATIO=16, MAX_SEW=32 + + In the example above, prev_info is available with + curr_info, we need to update prev_info MAX_SEW from + 64 into 32. */ + prev_info.set_max_sew ( + MIN (prev_info.get_max_sew (), curr_info.get_max_sew ())); if (!curr_info.vl_used_by_non_rvv_insn_p () && vsetvl_insn_p (curr_info.get_insn ()->rtl ())) m_delete_list.safe_push (curr_info); diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113248.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113248.c new file mode 100644 index 00000000000..b3b506177df --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113248.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-mtune=generic-ooo --param=riscv-autovec-preference=scalable -march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */ + +#include "riscv_vector.h" + +void foo(_Float16 y, int64_t *i64p) +{ + vint64m1_t vx =__riscv_vle64_v_i64m1 (i64p, 1); + vx = __riscv_vadd_vv_i64m1 (vx, vx, 1); + vfloat16m1_t vy =__riscv_vfmv_s_f_f16m1 (y, 1); + asm volatile ("# use %0 %1" : : "vr"(vx), "vr" (vy)); +} + +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*1,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 } } */