From patchwork Tue Jan 2 03:37:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6ZKf5bGF5ZOy?= X-Patchwork-Id: 1881526 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4T3z8v6qFjz20Rq for ; Tue, 2 Jan 2024 14:38:38 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7EB113858C2F for ; Tue, 2 Jan 2024 03:38:35 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbg154.qq.com (smtpbg154.qq.com [15.184.224.54]) by sourceware.org (Postfix) with ESMTPS id E080E3858D1E for ; Tue, 2 Jan 2024 03:37:51 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E080E3858D1E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai ARC-Filter: OpenARC Filter v1.0.0 sourceware.org E080E3858D1E Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=15.184.224.54 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1704166675; cv=none; b=pko083Z/xfmAyqYzRw2/1hsLs6v8Wtf+zDKZwmBxQD5IghGG+L4w0lYOvp5mNdCwC/zfXzKkvY65G1/nB6mykv7nnSet2iFL+YbkU01QcikdK33Ze37hg+NbyVxsZFsO+H8mX5rc9hKTSag5FlKJyEcHRhT4k/9XdBcMKhIROnw= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1704166675; c=relaxed/simple; bh=p7O3lLUAFTRlnNi+evE3CaGwiQX01DhE461VhVSzGgI=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=baIni31IltQcuivgsEO/D0Dn+nW9Fx5cVWyJELzeB/4fo2qV0ozCcJSCI+VNnu+t7ZElCw5BS9s17zzS7DP/65SI668HYlAYNRe73MUw/k6fqZ0IsCTrE50K0kqcOTkqVVa4ONNckapKRW6k1x5Rpzqyo3AEWLFdH1lc6rpCcy0= ARC-Authentication-Results: i=1; server2.sourceware.org X-QQ-mid: bizesmtp75t1704166665t968siex Received: from rios-cad121.hadoop.rioslab.org ( [58.60.1.9]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 02 Jan 2024 11:37:43 +0800 (CST) X-QQ-SSF: 01400000000000G0V000000A0000000 X-QQ-FEAT: BYUemv+qiN0ToX43UBQIXyayOBP6XzlDLYJgj9ZNzGim/ouu47Cu9QnhVexNA LG9CmX3IC9cPF8A7i3mop5jJ53PPDhHgwpnpvQZZvZnQ8Wskm9rfyBbtg3a+J7zLYt7Q9bf 3yEON9+g1kQJMBG0fZF6f3F3x5ZcNZdq58OI7XTOwA2baN8t76PHzTmiyFjY+rNb4ew/iei +ABmGICXQz0Vs4J4oMXUwtHqMRSn+hTnMX1vVXWZaybRUlJxBFDDbXv/7NjY2+Xn/DR4lkw At9BUn0W612G40076E9drW4l5+XtmdKVyAfg1xPTfJdRodhSyx8xHHEO+ZhalQWtqDqGw3s MlwH3zeOA8ViuFrqXJpTcmQciSBXPW/WSN4bVpP83R7OEDaNTwq5+/tz2TgmufdcKDw9LpH mGSU2f2IZfS4cW/dde3oiw== X-QQ-GoodBg: 2 X-BIZMAIL-ID: 16928575432204482591 From: Juzhe-Zhong To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, kito.cheng@sifive.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Juzhe-Zhong Subject: [PATCH] RISC-V: Make liveness be aware of rgroup number of LENS[dynamic LMUL] Date: Tue, 2 Jan 2024 11:37:43 +0800 Message-Id: <20240102033743.2158114-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org This patch fixes the following situation: vl4re16.v v12,0(a5) ... vl4re16.v v16,0(a3) vs4r.v v12,0(a5) ... vl4re16.v v4,0(a0) vs4r.v v16,0(a3) ... vsetvli a3,zero,e16,m4,ta,ma ... vmv.v.x v8,t6 vmsgeu.vv v2,v16,v8 vsub.vv v16,v16,v8 vs4r.v v16,0(a5) ... vs4r.v v4,0(a0) vmsgeu.vv v1,v4,v8 ... vsub.vv v4,v4,v8 slli a6,a4,2 vs4r.v v4,0(a5) ... vsub.vv v4,v12,v8 vmsgeu.vv v3,v12,v8 vs4r.v v4,0(a5) ... There are many spills which are 'vs4r.v'. The root cause is that we don't count vector REG liveness referencing the rgroup controls. _29 = _25->iatom[0]; is transformed into the following vect statement with 4 different loop_len (loop_len_74, loop_len_75, loop_len_76, loop_len_77). vect__29.11_78 = .MASK_LEN_LOAD (vectp_sb.9_72, 32B, { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, loop_len_74, 0); vect__29.12_80 = .MASK_LEN_LOAD (vectp_sb.9_79, 32B, { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, loop_len_75, 0); vect__29.13_82 = .MASK_LEN_LOAD (vectp_sb.9_81, 32B, { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, loop_len_76, 0); vect__29.14_84 = .MASK_LEN_LOAD (vectp_sb.9_83, 32B, { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, loop_len_77, 0); which are the LENS number (LOOP_VINFO_LENS (loop_vinfo).length ()). Count liveness according to LOOP_VINFO_LENS (loop_vinfo).length () to compute liveness more accurately: vsetivli zero,8,e16,m1,ta,ma vmsgeu.vi v19,v14,8 vadd.vi v18,v14,-8 vmsgeu.vi v17,v1,8 vadd.vi v16,v1,-8 vlm.v v15,0(a5) ... Tested no regression, ok for trunk ? PR target/113112 gcc/ChangeLog: * config/riscv/riscv-vector-costs.cc (compute_nregs_for_mode): Add rgroup info. (max_number_of_live_regs): Ditto. (has_unexpected_spills_p): Ditto. gcc/testsuite/ChangeLog: * gcc.dg/vect/costmodel/riscv/rvv/pr113112-5.c: New test. --- gcc/config/riscv/riscv-vector-costs.cc | 34 +++++++++++++++---- .../vect/costmodel/riscv/rvv/pr113112-5.c | 24 +++++++++++++ 2 files changed, 52 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-5.c diff --git a/gcc/config/riscv/riscv-vector-costs.cc b/gcc/config/riscv/riscv-vector-costs.cc index 1199b3af067..12d3b57aff6 100644 --- a/gcc/config/riscv/riscv-vector-costs.cc +++ b/gcc/config/riscv/riscv-vector-costs.cc @@ -373,13 +373,17 @@ compute_local_live_ranges ( E.g. If mode = SImode, biggest_mode = DImode, LMUL = M4. Then return RVVM4SImode (LMUL = 4, element mode = SImode). */ static unsigned int -compute_nregs_for_mode (machine_mode mode, machine_mode biggest_mode, int lmul) +compute_nregs_for_mode (loop_vec_info loop_vinfo, machine_mode mode, + machine_mode biggest_mode, int lmul) { + unsigned int rgroup_size = LOOP_VINFO_LENS (loop_vinfo).is_empty () + ? 1 + : LOOP_VINFO_LENS (loop_vinfo).length (); unsigned int mode_size = GET_MODE_SIZE (mode).to_constant (); unsigned int biggest_size = GET_MODE_SIZE (biggest_mode).to_constant (); gcc_assert (biggest_size >= mode_size); unsigned int ratio = biggest_size / mode_size; - return MAX (lmul / ratio, 1); + return MAX (lmul / ratio, 1) * rgroup_size; } /* This function helps to determine whether current LMUL will cause @@ -393,7 +397,7 @@ compute_nregs_for_mode (machine_mode mode, machine_mode biggest_mode, int lmul) mode. - Third, Return the maximum V_REGs are alive of the loop. */ static unsigned int -max_number_of_live_regs (const basic_block bb, +max_number_of_live_regs (loop_vec_info loop_vinfo, const basic_block bb, const hash_map &live_ranges, unsigned int max_point, machine_mode biggest_mode, int lmul) @@ -412,7 +416,7 @@ max_number_of_live_regs (const basic_block bb, { machine_mode mode = TYPE_MODE (TREE_TYPE (var)); unsigned int nregs - = compute_nregs_for_mode (mode, biggest_mode, lmul); + = compute_nregs_for_mode (loop_vinfo, mode, biggest_mode, lmul); live_vars_vec[i] += nregs; if (live_vars_vec[i] > max_nregs) { @@ -687,6 +691,24 @@ update_local_live_ranges ( dump_printf_loc (MSG_NOTE, vect_location, "Add perm indice %T, start = 0, end = %d\n", sel, max_point); + if (!LOOP_VINFO_LENS (loop_vinfo).is_empty () + && LOOP_VINFO_LENS (loop_vinfo).length () > 1) + { + /* If we are vectorizing a permutation when the rgroup number + > 1, we will need additional mask to shuffle the second + vector. */ + tree mask = build_decl (UNKNOWN_LOCATION, VAR_DECL, + get_identifier ("vect_perm_mask"), + boolean_type_node); + pair &live_range + = live_ranges->get_or_insert (mask, &existed_p); + gcc_assert (!existed_p); + live_range = pair (0, max_point); + if (dump_enabled_p ()) + dump_printf_loc (MSG_NOTE, vect_location, + "Add perm mask %T, start = 0, end = %d\n", + mask, max_point); + } } } } @@ -730,8 +752,8 @@ has_unexpected_spills_p (loop_vec_info loop_vinfo) continue; /* We prefer larger LMUL unless it causes register spillings. */ unsigned int nregs - = max_number_of_live_regs (bb, (*iter).second, max_point, - biggest_mode, lmul); + = max_number_of_live_regs (loop_vinfo, bb, (*iter).second, + max_point, biggest_mode, lmul); if (nregs > max_nregs) max_nregs = nregs; } diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-5.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-5.c new file mode 100644 index 00000000000..117d54f68f9 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-5.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic --param riscv-autovec-preference=fixed-vlmax -fno-schedule-insns -fno-schedule-insns2" } */ + +typedef struct { + int iatom[3]; + int blocknr; +} t_sortblock; + +#define DIM 3 + +void foo (int ncons, t_sortblock *sb, int *iatom) +{ + int i, m; + + for(i=0; (i