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[88.10.53.141]) by smtp.gmail.com with ESMTPSA id v6-20020a05600c444600b0040c4886f254sm6009578wmn.13.2023.12.12.01.34.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Dec 2023 01:34:45 -0800 (PST) From: Sergio Paracuellos To: devicetree@vger.kernel.org Cc: tglx@linutronix.de, daniel.lezcano@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linux-kernel@vger.kernel.org, Rob Herring Subject: [RESEND PATCH v2] dt-bindings: timer: add Ralink SoCs system tick counter Date: Tue, 12 Dec 2023 10:34:43 +0100 Message-Id: <20231212093443.1898591-1-sergio.paracuellos@gmail.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add YAML doc for the system tick counter which is present on Ralink SoCs. cc: Daniel Lezcano Reviewed-by: Rob Herring Signed-off-by: Sergio Paracuellos --- Changes in v2 RESEND: - Add Daniel Lezcano to CC in the patch itself. Changes in v2: - Add Rob's Reviewed-by tag. v1: https://lore.kernel.org/lkml/CAMhs-H_9kAdOfR-RaJWqAq6d3S3DXtKJqWy-EWCu0-ZjWKB9Sw@mail.gmail.com/T/#re9225265416ca8463c5f06d736f9834ae75efe0c I am sending this with Rob's RB added since I ping for the v1 multiple times without response. So I can be missing something or the patch is lost for any reason. Thanks! .../bindings/timer/ralink,cevt-systick.yaml | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml diff --git a/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml b/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml new file mode 100644 index 000000000000..59d97feddf4e --- /dev/null +++ b/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/ralink,cevt-systick.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: System tick counter present in Ralink family SoCs + +maintainers: + - Sergio Paracuellos + +properties: + compatible: + const: ralink,cevt-systick + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + systick@d00 { + compatible = "ralink,cevt-systick"; + reg = <0xd00 0x10>; + + interrupt-parent = <&cpuintc>; + interrupts = <7>; + }; +...