From patchwork Fri Nov 17 05:10:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Hongtao" X-Patchwork-Id: 1864932 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=NmBkEw+v; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4SWlRQ4RP3z1yS7 for ; Fri, 17 Nov 2023 16:13:22 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 772423857340 for ; Fri, 17 Nov 2023 05:13:18 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by sourceware.org (Postfix) with ESMTPS id DC72E3858D20 for ; Fri, 17 Nov 2023 05:13:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org DC72E3858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org DC72E3858D20 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=134.134.136.24 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700197984; cv=none; b=H81hYF6Zmz94A8AAp8YJWPWviSlwN7/uh+ND2Nb+VcExLrZxyVJ2Aax8TrYLd43HpxaFFL9z2R/nZS9wDQy4sWMNPIDMRbGmscZdsNPwfzvXtoq/2T8P6lorM/93ihEDf0SgVsPYvsU/1TDkQ+mHSi7p54V3n9C29lvlgbAsWXM= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700197984; c=relaxed/simple; bh=a0HjFcL+8iBIKZhyNIPQhvgDutQ+higrVfI5+udfJ4U=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=sZ7agy77xF64sEz6JY2HNY5iZ2CPIEbLzYtue6vntdh+tHAZG4+mQ+JL+KFmoPi6hT+brEBfKokGf7K7IKAClx0I5CQAXB3889gstYVJHhMzuLbbFPboX2hqS2sykhzthoAQNTtEzBdSN5Z4SdMg6F8mmW9vpqDS9lDzrtMVSnw= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700197983; x=1731733983; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=a0HjFcL+8iBIKZhyNIPQhvgDutQ+higrVfI5+udfJ4U=; b=NmBkEw+vE9QvJof8lBauI7hVmMmzV+PbDLjrdUB1LmJTdCsuEKmebJxs BUYs58SvKCXPRKPE5kKA4RKfipwx4pGj/I5aUGFGONxFfDpeY3me6GDHd BRLZ9JJPfbljZrXTDDdwiRynZs+yPY9gz5KDvJDKEJvAuPrfqDbFuIwSL SJlgHSWNfHUB5Aw/1vW+Kc0LtuS/rOb4IEtwVrObeSBFhY/ibmgqfhhQc s89UitGgDr0x+kxjnI26mulOvwMaSqtjW6ClmPQItVkLh8ffviAP+xmKy S+hoa7jBDAtuEVEzzVhZS9SxBEqKDcJsSWgCSrzV+ex9eb/ujh55nuYVC A==; X-IronPort-AV: E=McAfee;i="6600,9927,10896"; a="394088893" X-IronPort-AV: E=Sophos;i="6.04,206,1695711600"; d="scan'208";a="394088893" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Nov 2023 21:13:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.04,206,1695711600"; d="scan'208";a="13365405" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orviesa001.jf.intel.com with ESMTP; 16 Nov 2023 21:13:00 -0800 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id E1300100567F; Fri, 17 Nov 2023 13:12:58 +0800 (CST) From: liuhongt To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com Subject: [PATCH] Support cbranchm for Vector HI/QImode. Date: Fri, 17 Nov 2023 13:10:58 +0800 Message-Id: <20231117051058.535141-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org The missing cbranchv*{hi,qi}4 maybe needed by early break vectorization. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ready push to trunk. gcc/ChangeLog: * config/i386/sse.md (cbranch4): Extend to Vector HI/QImode. --- gcc/config/i386/sse.md | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index d250a6cb802..3659660a616 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -514,6 +514,12 @@ (define_mode_iterator VI_AVX2 (V16SI "TARGET_AVX512F && TARGET_EVEX512") (V8SI "TARGET_AVX2") V4SI (V8DI "TARGET_AVX512F && TARGET_EVEX512") (V4DI "TARGET_AVX2") V2DI]) +(define_mode_iterator VI_AVX_AVX512F + [(V64QI "TARGET_AVX512F && TARGET_EVEX512") (V32QI "TARGET_AVX") V16QI + (V32HI "TARGET_AVX512F && TARGET_EVEX512") (V16HI "TARGET_AVX") V8HI + (V16SI "TARGET_AVX512F && TARGET_EVEX512") (V8SI "TARGET_AVX") V4SI + (V8DI "TARGET_AVX512F && TARGET_EVEX512") (V4DI "TARGET_AVX") V2DI]) + ;; All QImode vector integer modes (define_mode_iterator VI1 [(V32QI "TARGET_AVX") V16QI]) @@ -27868,8 +27874,8 @@ (define_insn "_store_mask" (define_expand "cbranch4" [(set (reg:CC FLAGS_REG) - (compare:CC (match_operand:VI48_AVX_AVX512F 1 "register_operand") - (match_operand:VI48_AVX_AVX512F 2 "nonimmediate_operand"))) + (compare:CC (match_operand:VI_AVX_AVX512F 1 "register_operand") + (match_operand:VI_AVX_AVX512F 2 "nonimmediate_operand"))) (set (pc) (if_then_else (match_operator 0 "bt_comparison_operator" [(reg:CC FLAGS_REG) (const_int 0)])