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[46.223.203.173]) by smtp.gmail.com with ESMTPSA id m5-20020a056000180500b0031c6581d55esm2226307wrh.91.2023.10.18.07.19.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 18 Oct 2023 07:19:22 -0700 (PDT) Message-ID: Date: Wed, 18 Oct 2023 16:19:22 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Cc: rdapp.gcc@gmail.com, Richard Biener , "juzhe.zhong@rivai.ai" Content-Language: en-US To: gcc-patches From: Robin Dapp Subject: [PATCH] vect: Allow same precision for bit-precision conversions. X-Spam-Status: No, score=-9.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Hi, even though there was no full conclusion yet I took the liberty of just posting this as a patch in case of further discussion. In PR/111794 we miss a vectorization because on riscv type precision and mode precision differ for mask types. We can still vectorize when allowing assignments with the same precision for dest and source which is what this patch does. Bootstrapped and regtested on x86, aarch64 and power10. No new failures on riscv. Regards Robin gcc/ChangeLog: PR/111794 * tree-vect-stmts.cc (vectorizable_assignment): Add same-precision exception for dest and source. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/slp-mask-1.c: New test. * gcc.target/riscv/rvv/autovec/slp-mask-run-1.c: New test. --- .../gcc.target/riscv/rvv/autovec/slp-mask-1.c | 18 +++++++++++ .../riscv/rvv/autovec/slp-mask-run-1.c | 31 +++++++++++++++++++ gcc/tree-vect-stmts.cc | 12 ++++--- 3 files changed, 56 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-1.c new file mode 100644 index 00000000000..ee1baa58d63 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-std=gnu99 -O3 -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=scalable -fdump-tree-slp-details" } */ + +void +__attribute__ ((noipa)) +f (int *restrict x, short *restrict y, int *restrict res) +{ + res[0] = x[0] == 1 & y[0] == 2; + res[1] = x[1] == 1 & y[1] == 2; + res[2] = x[2] == 1 & y[2] == 2; + res[3] = x[3] == 1 & y[3] == 2; + res[4] = x[4] == 1 & y[4] == 2; + res[5] = x[5] == 1 & y[5] == 2; + res[6] = x[6] == 1 & y[6] == 2; + res[7] = x[7] == 1 & y[7] == 2; +} + +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "slp2" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c new file mode 100644 index 00000000000..b3469c41c87 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c @@ -0,0 +1,31 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=gnu99 -O3 -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=scalable" } */ + +#include +#include + +#include "slp-mask-1.c" + +#define SZ 8 + +__attribute__ ((optimize ("1"))) +int main () +{ + int *a = malloc (SZ * sizeof (*a)); + short *b = malloc (SZ * sizeof (*b)); + int *res = malloc (SZ * sizeof (*res)); + int *ref = malloc (SZ * sizeof (*ref)); + + for (int i = 0; i < SZ; i++) + { + a[i] = i & 1; + b[i] = 2; + ref[i] = a[i] == 1 & b[i] == 2; + } + + f (a, b, res); + + for (int i = 0; i < SZ; i++) + if (res[i] != ref[i]) + __builtin_abort (); +} diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc index cd7c1090d88..e612da6c492 100644 --- a/gcc/tree-vect-stmts.cc +++ b/gcc/tree-vect-stmts.cc @@ -6084,14 +6084,16 @@ vectorizable_assignment (vec_info *vinfo, /* But a conversion that does not change the bit-pattern is ok. */ && !(INTEGRAL_TYPE_P (TREE_TYPE (scalar_dest)) && INTEGRAL_TYPE_P (TREE_TYPE (op)) - && (TYPE_PRECISION (TREE_TYPE (scalar_dest)) + && (((TYPE_PRECISION (TREE_TYPE (scalar_dest)) > TYPE_PRECISION (TREE_TYPE (op))) - && TYPE_UNSIGNED (TREE_TYPE (op)))) + && TYPE_UNSIGNED (TREE_TYPE (op))) + || (TYPE_PRECISION (TREE_TYPE (scalar_dest)) + == TYPE_PRECISION (TREE_TYPE (op)))))) { if (dump_enabled_p ()) - dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location, - "type conversion to/from bit-precision " - "unsupported.\n"); + dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location, + "type conversion to/from bit-precision " + "unsupported.\n"); return false; }