From patchwork Fri Oct 13 09:43:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philip Oberfichtner X-Patchwork-Id: 1848188 X-Patchwork-Delegate: hs@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=zrUJOhSk; dkim=pass (2048-bit key) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=SSK4zGw+; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4S6M7Q4ck9z1yqn for ; Fri, 13 Oct 2023 20:45:22 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 67B1C86EB8; Fri, 13 Oct 2023 11:45:13 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1697190313; bh=gWtfIdk85uv0I6J5nNLzwKEcUNmrspna1v4qVKP2svg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=zrUJOhSkR3L8T0ofh4I7Di3g+j0qdwZuUsCCcTU9p+7Bhmtj7FeccKJv/Yg6cSazA mT8OR595I3HUW/L54rB/+if+Rzp+Gn1fMijsrfqrixcE4bS1HJvVj/ommjzF0e6rsB KUhxzD1P9jaop2fhwfHLkj3Q/Jai86Kfsv4X7oRVbydtDoXgsHjKyxgRcfOBlqpTKj iOZd1BFW6vw6eDy5M9aaQxn194IgKTDlKuh3k9Yeb7TaWjCBjY1VhuHj5qcrzNlsMN qVg59eVhMqthdBs6l5kYbGoP/7/li0Ex4rgIE8UXpUNdt7A4lKDmYNfY6HwowwBnUr agYkBbfID39aw== Received: from localhost (unknown [IPv6:2a01:cb18:989:a700:7e7a:91ff:feeb:a1bd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: pro@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 0540486ECB; Fri, 13 Oct 2023 11:45:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1697190301; bh=gWtfIdk85uv0I6J5nNLzwKEcUNmrspna1v4qVKP2svg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SSK4zGw+rOl9jkjiLILjL/5wIsA3V2eSVfji5PY9zHvyy65qMbVcd0H6m+twbGXy+ 3atzCWbRBO4usJVzQ1n3yKyweYLk+ffEXHyKlRmfSPo8FhblZ7MAgzZ/GTJyrsxu4i 5Wp93AZlzvXClNkWkjBhkJBK0q2D41weZasCBR9E4vRYqdiF2r4+imVnIAtZuU9QkZ V9AWm5Oq/MBY39cFiZ/JSR4nN63DtiVPWvtDP72V1xxmahgr0mD70SoiJ0UpSxZVf6 w9z1CxQIR40Xxie/M5iT9jshJyWkgeGmGV1n2ExEJ9bCZhzJsC0dpyfZvxTTL/hAdh 12lRpdkOWoj7g== From: Philip Richard Oberfichtner To: u-boot@lists.denx.de Cc: hs@denx.de, sjg@chromium.org, trini@konsulko.com, Philip Richard Oberfichtner Subject: [PATCH 1/2] bootcount: Remove legacy I2C driver Date: Fri, 13 Oct 2023 11:43:01 +0200 Message-ID: <20231013094302.28944-2-pro@denx.de> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231013094302.28944-1-pro@denx.de> References: <20231013094302.28944-1-pro@denx.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The legacy I2C bootcounter will hereby be removed and eventually be replaced by a driver model implementation in the follow-up commit. The legacy driver has the following drawbacks: - It's not adhering to the driver model - Settings are grabbed from Kconfig rather than device tree - i2c_{read,write} are being used instead of dm_i2c_{read,write} Signed-off-by: Philip Richard Oberfichtner --- drivers/bootcount/Kconfig | 24 +++-------------- drivers/bootcount/Makefile | 1 - drivers/bootcount/bootcount_i2c.c | 43 ------------------------------- 3 files changed, 3 insertions(+), 65 deletions(-) delete mode 100644 drivers/bootcount/bootcount_i2c.c diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 570252d186..7a2548ace2 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -79,14 +79,6 @@ config BOOTCOUNT_RAM Store the bootcount in DRAM protected against bit errors due to short power loss or holding a system in RESET. -config BOOTCOUNT_I2C - bool "Boot counter on I2C device" - help - Enable support for the bootcounter on an i2c (like RTC) device. - CFG_SYS_I2C_RTC_ADDR = i2c chip address - CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for - the bootcounter. - config BOOTCOUNT_AT91 bool "Boot counter for Atmel AT91SAM9XE" depends on AT91SAM9XE @@ -175,14 +167,6 @@ config BOOTCOUNT_BOOTLIMIT counter being cleared. If set to 0, do not set a boot limit in the environment. -config BOOTCOUNT_ALEN - int "I2C address length" - default 1 - depends on BOOTCOUNT_I2C - help - Length of the the I2C address at SYS_BOOTCOUNT_ADDR for storing - the boot counter. - config SYS_BOOTCOUNT_SINGLEWORD bool "Use single word to pack boot count and magic value" depends on BOOTCOUNT_GENERIC @@ -218,7 +202,7 @@ config SYS_BOOTCOUNT_ADDR default 0x44E3E000 if BOOTCOUNT_AM33XX || BOOTCOUNT_AM33XX_NVMEM default 0xE0115FF8 if ARCH_LS1043A || ARCH_LS1021A depends on BOOTCOUNT_AM33XX || BOOTCOUNT_GENERIC || BOOTCOUNT_EXT || \ - BOOTCOUNT_I2C || BOOTCOUNT_AM33XX_NVMEM + BOOTCOUNT_AM33XX_NVMEM help Set the address used for reading and writing the boot counter. @@ -226,13 +210,11 @@ config SYS_BOOTCOUNT_MAGIC hex "Magic value for the boot counter" default 0xB001C041 if BOOTCOUNT_GENERIC || BOOTCOUNT_EXT || \ BOOTCOUNT_AM33XX || BOOTCOUNT_ENV || \ - BOOTCOUNT_RAM || BOOTCOUNT_I2C || \ - BOOTCOUNT_AT91 || DM_BOOTCOUNT + BOOTCOUNT_RAM || BOOTCOUNT_AT91 || DM_BOOTCOUNT default 0xB0 if BOOTCOUNT_AM33XX_NVMEM depends on BOOTCOUNT_GENERIC || BOOTCOUNT_EXT || \ BOOTCOUNT_AM33XX || BOOTCOUNT_ENV || \ - BOOTCOUNT_RAM || BOOTCOUNT_I2C || \ - BOOTCOUNT_AT91 || DM_BOOTCOUNT || \ + BOOTCOUNT_RAM || BOOTCOUNT_AT91 || DM_BOOTCOUNT || \ BOOTCOUNT_AM33XX_NVMEM help Set the magic value used for the boot counter. diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile index b65959a384..d6d2389c16 100644 --- a/drivers/bootcount/Makefile +++ b/drivers/bootcount/Makefile @@ -6,7 +6,6 @@ obj-$(CONFIG_BOOTCOUNT_AT91) += bootcount_at91.o obj-$(CONFIG_BOOTCOUNT_AM33XX) += bootcount_davinci.o obj-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o obj-$(CONFIG_BOOTCOUNT_ENV) += bootcount_env.o -obj-$(CONFIG_BOOTCOUNT_I2C) += bootcount_i2c.o obj-$(CONFIG_BOOTCOUNT_EXT) += bootcount_ext.o obj-$(CONFIG_BOOTCOUNT_AM33XX_NVMEM) += bootcount_nvmem.o diff --git a/drivers/bootcount/bootcount_i2c.c b/drivers/bootcount/bootcount_i2c.c deleted file mode 100644 index b3ac67ea35..0000000000 --- a/drivers/bootcount/bootcount_i2c.c +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2013 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - */ - -#include -#include -#include - -#define BC_MAGIC 0xbc - -void bootcount_store(ulong a) -{ - unsigned char buf[3]; - int ret; - - buf[0] = BC_MAGIC; - buf[1] = (a & 0xff); - ret = i2c_write(CFG_SYS_I2C_RTC_ADDR, CONFIG_SYS_BOOTCOUNT_ADDR, - CONFIG_BOOTCOUNT_ALEN, buf, 2); - if (ret != 0) - puts("Error writing bootcount\n"); -} - -ulong bootcount_load(void) -{ - unsigned char buf[3]; - int ret; - - ret = i2c_read(CFG_SYS_I2C_RTC_ADDR, CONFIG_SYS_BOOTCOUNT_ADDR, - CONFIG_BOOTCOUNT_ALEN, buf, 2); - if (ret != 0) { - puts("Error loading bootcount\n"); - return 0; - } - if (buf[0] == BC_MAGIC) - return buf[1]; - - bootcount_store(0); - - return 0; -} From patchwork Fri Oct 13 09:43:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philip Oberfichtner X-Patchwork-Id: 1848189 X-Patchwork-Delegate: hs@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=uiYP5rXd; dkim=pass (2048-bit key) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=QLj4Cyqh; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4S6M8S4S7fz1yqn for ; Fri, 13 Oct 2023 20:46:16 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3CBC186E9F; Fri, 13 Oct 2023 11:46:14 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1697190374; bh=XNADUS9k94LYp2SrkVKSwamsCIPmclxT03t+hxxyV1M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=uiYP5rXd2ci+CrF02WsudQjK9QWX9AsP32nY/MiS4icxvIKyK98i/L2FYcaMui2Pz eYjO0yZe1KkTvZdkC2qIcLWYfSTaoRMf1u9MK+UQIgpQvOxDTSDqdK9eSIs+anV/MH EOllMsGmv5m6V+HwZInC6T7NbMkWvYJDst0EgOZxxMgTRbPyUqvnLRd0CkW524y5Zj fICsTEKvTXJ5dN9P0+fFaN8XDcYAcOUHewWNUY/8NT2D/W9szOjvUGY0LBEOQ9AoNE sSrFfp6uc6fmtvVBSnbTR0Tkw/ykZBV1EZG7glIs1Qs08fohtkwd7ZJNWe3E6QpEtC 1neiSshvaRBoQ== Received: from localhost (unknown [IPv6:2a01:cb18:989:a700:7e7a:91ff:feeb:a1bd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: pro@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 50535868BF; Fri, 13 Oct 2023 11:45:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1697190313; bh=XNADUS9k94LYp2SrkVKSwamsCIPmclxT03t+hxxyV1M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QLj4CyqhXmZcByYml4UNVwHFv17Uov6mtfuN6k4D2HqN3yXgZZvi0YoCNOAYdTqxs YzuDAGbRuhQxA5SGBaE5Fn2zmvNXQul9Mqy0jz4K8ABT6XuMRchZhGjVGfJmrFMP77 0mNcCMw1dqXmQQ7jCPPZ1GiHvGHKf/EEJ7tUmO9+xmPLMNWa0E1ARlRnK6fzMAccX8 anVgKGAKeeMLGh+z7gjNKRs+ZQ1Ggaiy3YbLbyV3ViiiR2Hv/L1yfglPAcIaSEYDDz mEmS7+6N4KKQq4qyxOAzqDevBQEUDxnwewhnBftzAJwhDWK5tQegN/oxQhTeExeg3P uysJL743fGgkQ== From: Philip Richard Oberfichtner To: u-boot@lists.denx.de Cc: hs@denx.de, sjg@chromium.org, trini@konsulko.com, Philip Richard Oberfichtner Subject: [PATCH 2/2] bootcount: Add driver model I2C driver Date: Fri, 13 Oct 2023 11:43:02 +0200 Message-ID: <20231013094302.28944-3-pro@denx.de> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231013094302.28944-1-pro@denx.de> References: <20231013094302.28944-1-pro@denx.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This adds a generic I2C bootcounter adhering to driver model to replace the previously removed legacy implementation. There is no change in functionality, it can be used on any I2C device. The device tree configuration may look like this for example: bootcount { compatible = "u-boot,bootcount-i2c"; i2c-bus = <&i2c1>; address = <0x52>; offset = <0x11>; }; Signed-off-by: Philip Richard Oberfichtner --- drivers/bootcount/Kconfig | 10 +++ drivers/bootcount/Makefile | 1 + drivers/bootcount/bootcount_dm_i2c.c | 126 +++++++++++++++++++++++++++ 3 files changed, 137 insertions(+) create mode 100644 drivers/bootcount/bootcount_dm_i2c.c diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 7a2548ace2..1cf1de2b6d 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -109,6 +109,16 @@ config DM_BOOTCOUNT_RTC Accesses to the backing store are performed using the write16 and read16 ops of DM RTC devices. +config DM_BOOTCOUNT_I2C + bool "Driver Model boot counter on I2C device" + depends on DM_I2C + help + Enable support for the bootcounter on a generic i2c device, like a + RTC or PMIC. This requires an 'i2c-bus', the i2c chip 'address' and + the 'offset' to read to and write from. All of the three settings are + defined as device tree properties using the "u-boot,bootcount-i2c" + compatible string. + config DM_BOOTCOUNT_I2C_EEPROM bool "Support i2c eeprom devices as a backing store for bootcount" depends on I2C_EEPROM diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile index d6d2389c16..e7771f5b36 100644 --- a/drivers/bootcount/Makefile +++ b/drivers/bootcount/Makefile @@ -13,5 +13,6 @@ obj-$(CONFIG_DM_BOOTCOUNT) += bootcount-uclass.o obj-$(CONFIG_DM_BOOTCOUNT_PMIC_PFUZE100) += pmic_pfuze100.o obj-$(CONFIG_DM_BOOTCOUNT_RTC) += rtc.o obj-$(CONFIG_DM_BOOTCOUNT_I2C_EEPROM) += i2c-eeprom.o +obj-$(CONFIG_DM_BOOTCOUNT_I2C) += bootcount_dm_i2c.o obj-$(CONFIG_DM_BOOTCOUNT_SPI_FLASH) += spi-flash.o obj-$(CONFIG_DM_BOOTCOUNT_SYSCON) += bootcount_syscon.o diff --git a/drivers/bootcount/bootcount_dm_i2c.c b/drivers/bootcount/bootcount_dm_i2c.c new file mode 100644 index 0000000000..227641f77e --- /dev/null +++ b/drivers/bootcount/bootcount_dm_i2c.c @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2023 + * Philip Richard Oberfichtner + * + * Based on previous work from Heiko Schocher (legacy bootcount_i2c.c driver) + */ + +#include +#include +#include +#include + +#define BC_MAGIC 0x55 + +struct bootcount_i2c_priv { + struct udevice *chip; + unsigned int offset; +}; + +static int bootcount_i2c_set(struct udevice *dev, const u32 val) +{ + int ret; + struct bootcount_i2c_priv *priv = dev_get_priv(dev); + + ret = dm_i2c_reg_write(priv->chip, priv->offset, BC_MAGIC); + if (ret < 0) + goto err_exit; + + ret = dm_i2c_reg_write(priv->chip, priv->offset + 1, val & 0xff); + if (ret < 0) + goto err_exit; + + return 0; + +err_exit: + log_debug("%s: Error writing to I2C device (%d)\n", __func__, ret); + return ret; +} + +static int bootcount_i2c_get(struct udevice *dev, u32 *val) +{ + int ret; + struct bootcount_i2c_priv *priv = dev_get_priv(dev); + + ret = dm_i2c_reg_read(priv->chip, priv->offset); + if (ret < 0) + goto err_exit; + + if ((ret & 0xff) != BC_MAGIC) { + log_debug("%s: Invalid Magic, reset bootcounter.\n", __func__); + *val = 0; + return bootcount_i2c_set(dev, 0); + } + + ret = dm_i2c_reg_read(priv->chip, priv->offset + 1); + if (ret < 0) + goto err_exit; + + *val = ret; + return 0; + +err_exit: + log_debug("%s: Error reading from I2C device (%d)\n", __func__, ret); + return ret; +} + +static int bootcount_i2c_probe(struct udevice *dev) +{ + struct bootcount_i2c_priv *priv = dev_get_priv(dev); + struct ofnode_phandle_args phandle_args; + struct udevice *bus; + unsigned int addr; + int ret; + + ret = dev_read_u32(dev, "offset", &priv->offset); + if (ret) { + log_debug("%s: Unable to get offset\n", __func__); + return ret; + } + + ret = dev_read_u32(dev, "address", &addr); + if (ret) { + log_debug("%s: Unable to get chip address\n", __func__); + return ret; + } + + ret = dev_read_phandle_with_args(dev, "i2c-bus", NULL, 0, 0, &phandle_args); + if (ret) { + log_debug("%s: Unable to get phandle\n", __func__); + return ret; + } + + ret = uclass_get_device_by_ofnode(UCLASS_I2C, phandle_args.node, &bus); + if (ret) { + log_debug("%s: Unable to get i2c bus\n", __func__); + return ret; + } + + ret = i2c_get_chip(bus, addr, 1, &priv->chip); + if (ret) { + log_debug("%s: Unable to get i2c chip\n", __func__); + return ret; + } + + return 0; +} + +static const struct bootcount_ops bootcount_i2c_ops = { + .get = bootcount_i2c_get, + .set = bootcount_i2c_set, +}; + +static const struct udevice_id bootcount_i2c_ids[] = { + { .compatible = "u-boot,bootcount-i2c" }, + { } +}; + +U_BOOT_DRIVER(bootcount_i2c) = { + .name = "bootcount-i2c", + .id = UCLASS_BOOTCOUNT, + .priv_auto = sizeof(struct bootcount_i2c_priv), + .probe = bootcount_i2c_probe, + .of_match = bootcount_i2c_ids, + .ops = &bootcount_i2c_ops, +};