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([103.97.165.210]) by smtp.googlemail.com with ESMTPSA id k128-20020a633d86000000b0056ae1af610asm12556243pga.58.2023.09.07.04.49.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Sep 2023 04:49:59 -0700 (PDT) From: Mayuresh Chitale To: opensbi@lists.infradead.org Cc: Mayuresh Chitale , Anup Patel , Atish Patra Subject: [PATCH v1 1/7] include: sbi_domain: Fix permission test macros Date: Thu, 7 Sep 2023 17:19:41 +0530 Message-Id: <20230907114947.1705425-2-mchitale@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230907114947.1705425-1-mchitale@ventanamicro.com> References: <20230907114947.1705425-1-mchitale@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230907_045000_687622_4C9EA76D X-CRM114-Status: UNSURE ( 8.65 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.6 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: The macros to test permissions must perform an exact match of all the bits in the input with the desired permission bits. Otherwise, the check returns false positives in those cases where only some of [...] Content analysis details: (0.6 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:431 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.8 UPPERCASE_50_75 message body is 50-75% uppercase X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The macros to test permissions must perform an exact match of all the bits in the input with the desired permission bits. Otherwise, the check returns false positives in those cases where only some of the desired permissions are set in the input. Fixes: 6c202c5 ("include: sbi: Add Smepmp specific access flags for PMP entries") Signed-off-by: Mayuresh Chitale --- include/sbi/sbi_domain.h | 34 +++++++++++++++------------------- 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h index da2a65a..8bd999a 100644 --- a/include/sbi/sbi_domain.h +++ b/include/sbi/sbi_domain.h @@ -74,33 +74,29 @@ struct sbi_domain_memregion { SBI_DOMAIN_MEMREGION_SU_READABLE) /* Shared read-only region between M and SU mode */ -#define SBI_DOMAIN_MEMREGION_IS_SUR_MR(__flags) \ - ((__flags & SBI_DOMAIN_MEMREGION_M_READABLE) && \ - (__flags & SBI_DOMAIN_MEMREGION_SU_READABLE)) +#define SBI_DOMAIN_MEMREGION_IS_SUR_MR(__flags) \ + ((__flags & SBI_DOMAIN_MEMREGION_ACCESS_MASK) == \ + SBI_DOMAIN_MEMREGION_SHARED_RDONLY) /* Shared region: SU execute-only and M read/execute */ -#define SBI_DOMAIN_MEMREGION_IS_SUX_MRX(__flags) \ - ((__flags & SBI_DOMAIN_MEMREGION_M_READABLE) && \ - (__flags & SBI_DOMAIN_MEMREGION_M_EXECUTABLE) && \ - (__flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)) +#define SBI_DOMAIN_MEMREGION_IS_SUX_MRX(__flags) \ + ((__flags & SBI_DOMAIN_MEMREGION_ACCESS_MASK) == \ + SBI_DOMAIN_MEMREGION_SHARED_SUX_MRX) /* Shared region: SU and M execute-only */ -#define SBI_DOMAIN_MEMREGION_IS_SUX_MX(__flags) \ - ((__flags & SBI_DOMAIN_MEMREGION_M_EXECUTABLE) && \ - (__flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)) +#define SBI_DOMAIN_MEMREGION_IS_SUX_MX(__flags) \ + ((__flags & SBI_DOMAIN_MEMREGION_ACCESS_MASK) == \ + SBI_DOMAIN_MEMREGION_SHARED_SUX_MX) /* Shared region: SU and M read/write */ -#define SBI_DOMAIN_MEMREGION_IS_SURW_MRW(__flags) \ - ((__flags & SBI_DOMAIN_MEMREGION_M_READABLE) && \ - (__flags & SBI_DOMAIN_MEMREGION_M_WRITABLE) && \ - (__flags & SBI_DOMAIN_MEMREGION_SU_READABLE) & \ - (__flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE)) +#define SBI_DOMAIN_MEMREGION_IS_SURW_MRW(__flags) \ + ((__flags & SBI_DOMAIN_MEMREGION_ACCESS_MASK) == \ + SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW) /* Shared region: SU read-only and M read/write */ -#define SBI_DOMAIN_MEMREGION_IS_SUR_MRW(__flags) \ - ((__flags & SBI_DOMAIN_MEMREGION_M_READABLE) && \ - (__flags & SBI_DOMAIN_MEMREGION_M_WRITABLE) && \ - (__flags & SBI_DOMAIN_MEMREGION_SU_READABLE)) +#define SBI_DOMAIN_MEMREGION_IS_SUR_MRW(__flags) \ + ((__flags & SBI_DOMAIN_MEMREGION_ACCESS_MASK) == \ + SBI_DOMAIN_MEMREGION_SHARED_SUR_MRW) /* * Check if region flags match with any of the above From patchwork Thu Sep 7 11:49:42 2023 Content-Type: text/plain; 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([103.97.165.210]) by smtp.googlemail.com with ESMTPSA id k128-20020a633d86000000b0056ae1af610asm12556243pga.58.2023.09.07.04.49.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Sep 2023 04:50:02 -0700 (PDT) From: Mayuresh Chitale To: opensbi@lists.infradead.org Cc: Anup Patel , Anup Patel , Atish Patra , Mayuresh Chitale Subject: [PATCH v1 2/7] lib: sbi: Factor-out Smepmp configuration as separate function Date: Thu, 7 Sep 2023 17:19:42 +0530 Message-Id: <20230907114947.1705425-3-mchitale@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230907114947.1705425-1-mchitale@ventanamicro.com> References: <20230907114947.1705425-1-mchitale@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230907_045006_258174_C48008D2 X-CRM114-Status: GOOD ( 19.60 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Anup Patel Let us factor-out Smepmp configuaration as separate function so that code is more readable. Signed-off-by: Anup Patel Signed-off-by: Mayuresh Chitale --- lib/sbi/sbi_hart.c | 180 +++++++++++++++++++++++++++ 1 file change [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:536 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Anup Patel Let us factor-out Smepmp configuaration as separate function so that code is more readable. Signed-off-by: Anup Patel Signed-off-by: Mayuresh Chitale --- lib/sbi/sbi_hart.c | 180 +++++++++++++++++++++++++++------------------ 1 file changed, 110 insertions(+), 70 deletions(-) diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index f7cefe4..48784c8 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -288,9 +288,9 @@ unsigned int sbi_hart_mhpm_bits(struct sbi_scratch *scratch) /* * Returns Smepmp flags for a given domain and region based on permissions. */ -unsigned int sbi_hart_get_smepmp_flags(struct sbi_scratch *scratch, - struct sbi_domain *dom, - struct sbi_domain_memregion *reg) +static unsigned int sbi_hart_get_smepmp_flags(struct sbi_scratch *scratch, + struct sbi_domain *dom, + struct sbi_domain_memregion *reg) { unsigned int pmp_flags = 0; @@ -348,6 +348,103 @@ unsigned int sbi_hart_get_smepmp_flags(struct sbi_scratch *scratch, return pmp_flags; } +static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch, + unsigned int pmp_count, + unsigned int pmp_gran_log2, + unsigned long pmp_addr_max) +{ + struct sbi_domain_memregion *reg; + struct sbi_domain *dom = sbi_domain_thishart_ptr(); + unsigned int pmp_idx = 0; + unsigned int pmp_flags; + unsigned long pmp_addr; + + /* + * Set the RLB and clear MML so that, we can write to + * entries without enforcement even if some entries + * are locked. + */ + csr_set(CSR_MSECCFG, MSECCFG_RLB); + csr_clear(CSR_MSECCFG, MSECCFG_MML); + + /* Disable the reserved entry */ + pmp_disable(SBI_SMEPMP_RESV_ENTRY); + + sbi_domain_for_each_memregion(dom, reg) { + if (pmp_idx == SBI_SMEPMP_RESV_ENTRY) + pmp_idx++; + if (pmp_count <= pmp_idx) + break; + + pmp_flags = sbi_hart_get_smepmp_flags(scratch, dom, reg); + if (pmp_flags == 0) + return 0; + + pmp_addr = reg->base >> PMP_SHIFT; + if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) { + pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order); + } else { + sbi_printf("Can not configure pmp for domain %s because" + " memory region address 0x%lx or size 0x%lx " + "is not in range.\n", dom->name, reg->base, + reg->order); + } + } + + /* + * All entries are programmed. Enable MML bit. + * Keep the RLB bit so that dynamic mappings can be done. + */ + csr_set(CSR_MSECCFG, (MSECCFG_RLB | MSECCFG_MML)); + + return 0; +} + +static int sbi_hart_oldpmp_configure(struct sbi_scratch *scratch, + unsigned int pmp_count, + unsigned int pmp_gran_log2, + unsigned long pmp_addr_max) +{ + struct sbi_domain_memregion *reg; + struct sbi_domain *dom = sbi_domain_thishart_ptr(); + unsigned int pmp_idx = 0; + unsigned int pmp_flags; + unsigned long pmp_addr; + + sbi_domain_for_each_memregion(dom, reg) { + if (pmp_count <= pmp_idx) + break; + + pmp_flags = 0; + + /* + * If permissions are to be enforced for all modes on + * this region, the lock bit should be set. + */ + if (reg->flags & SBI_DOMAIN_MEMREGION_ENF_PERMISSIONS) + pmp_flags |= PMP_L; + + if (reg->flags & SBI_DOMAIN_MEMREGION_SU_READABLE) + pmp_flags |= PMP_R; + if (reg->flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE) + pmp_flags |= PMP_W; + if (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE) + pmp_flags |= PMP_X; + + pmp_addr = reg->base >> PMP_SHIFT; + if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) { + pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order); + } else { + sbi_printf("Can not configure pmp for domain %s because" + " memory region address 0x%lx or size 0x%lx " + "is not in range.\n", dom->name, reg->base, + reg->order); + } + } + + return 0; +} + int sbi_hart_map_saddr(unsigned long addr, unsigned long size) { /* shared R/W access for M and S/U mode */ @@ -392,12 +489,10 @@ int sbi_hart_unmap_saddr(void) int sbi_hart_pmp_configure(struct sbi_scratch *scratch) { - struct sbi_domain_memregion *reg; - struct sbi_domain *dom = sbi_domain_thishart_ptr(); - unsigned int pmp_idx = 0; - unsigned int pmp_flags, pmp_bits, pmp_gran_log2; + int rc; + unsigned int pmp_bits, pmp_gran_log2; unsigned int pmp_count = sbi_hart_pmp_count(scratch); - unsigned long pmp_addr = 0, pmp_addr_max = 0; + unsigned long pmp_addr_max; if (!pmp_count) return 0; @@ -406,67 +501,12 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch) pmp_bits = sbi_hart_pmp_addrbits(scratch) - 1; pmp_addr_max = (1UL << pmp_bits) | ((1UL << pmp_bits) - 1); - if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP)) { - /* Reserve first entry for dynamic shared mappings */ - pmp_idx = SBI_SMEPMP_RESV_ENTRY + 1; - - /* - * Set the RLB and clear MML so that, we can write to - * entries without enforcement even if some entries - * are locked. - */ - csr_set(CSR_MSECCFG, MSECCFG_RLB); - csr_clear(CSR_MSECCFG, MSECCFG_MML); - - /* Disable the reserved entry */ - pmp_disable(SBI_SMEPMP_RESV_ENTRY); - } - - sbi_domain_for_each_memregion(dom, reg) { - if (pmp_count <= pmp_idx) - break; - - pmp_flags = 0; - - if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP)) { - pmp_flags = sbi_hart_get_smepmp_flags(scratch, dom, reg); - - if (pmp_flags == 0) - return 0; - } else { - /* - * If permissions are to be enforced for all modes on - * this region, the lock bit should be set. - */ - if (reg->flags & SBI_DOMAIN_MEMREGION_ENF_PERMISSIONS) - pmp_flags |= PMP_L; - - if (reg->flags & SBI_DOMAIN_MEMREGION_SU_READABLE) - pmp_flags |= PMP_R; - if (reg->flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE) - pmp_flags |= PMP_W; - if (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE) - pmp_flags |= PMP_X; - } - - pmp_addr = reg->base >> PMP_SHIFT; - if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) { - pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order); - } else { - sbi_printf("Can not configure pmp for domain %s because" - " memory region address 0x%lx or size 0x%lx " - "is not in range.\n", dom->name, reg->base, - reg->order); - } - } - - if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP)) { - /* - * All entries are programmed. Enable MML bit. - * Keep the RLB bit so that dynamic mappings can be done. - */ - csr_set(CSR_MSECCFG, (MSECCFG_RLB | MSECCFG_MML)); - } + if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP)) + rc = sbi_hart_smepmp_configure(scratch, pmp_count, + pmp_gran_log2, pmp_addr_max); + else + rc = sbi_hart_oldpmp_configure(scratch, pmp_count, + pmp_gran_log2, pmp_addr_max); /* * As per section 3.7.2 of privileged specification v1.12, @@ -489,7 +529,7 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch) __sbi_hfence_gvma_all(); } - return 0; + return rc; } int sbi_hart_priv_version(struct sbi_scratch *scratch) From patchwork Thu Sep 7 11:49:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mayuresh Chitale X-Patchwork-Id: 1830852 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=ABg15ZNF; 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([103.97.165.210]) by smtp.googlemail.com with ESMTPSA id k128-20020a633d86000000b0056ae1af610asm12556243pga.58.2023.09.07.04.50.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Sep 2023 04:50:06 -0700 (PDT) From: Mayuresh Chitale To: opensbi@lists.infradead.org Cc: Anup Patel , Anup Patel , Atish Patra , Mayuresh Chitale Subject: [PATCH v1 3/7] lib: sbi: Don't clear mseccfg.MML bit in sbi_hart_smepmp_configure() Date: Thu, 7 Sep 2023 17:19:43 +0530 Message-Id: <20230907114947.1705425-4-mchitale@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230907114947.1705425-1-mchitale@ventanamicro.com> References: <20230907114947.1705425-1-mchitale@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230907_045007_793516_0654AE45 X-CRM114-Status: GOOD ( 10.83 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Anup Patel The mseccfg.MML bit is a sticky bit which remains unchanged once set so no need to clear it in sbi_hart_smepmp_configure(). Signed-off-by: Anup Patel Signed-off-by: Mayuresh Chitale --- lib/sbi/sbi_hart.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:22d listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Anup Patel The mseccfg.MML bit is a sticky bit which remains unchanged once set so no need to clear it in sbi_hart_smepmp_configure(). Signed-off-by: Anup Patel Signed-off-by: Mayuresh Chitale --- lib/sbi/sbi_hart.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 48784c8..6320ea6 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -360,12 +360,10 @@ static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch, unsigned long pmp_addr; /* - * Set the RLB and clear MML so that, we can write to - * entries without enforcement even if some entries - * are locked. + * Set the RLB so that, we can write to PMP entries without + * enforcement even if some entries are locked. */ csr_set(CSR_MSECCFG, MSECCFG_RLB); - csr_clear(CSR_MSECCFG, MSECCFG_MML); /* Disable the reserved entry */ pmp_disable(SBI_SMEPMP_RESV_ENTRY); From patchwork Thu Sep 7 11:49:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mayuresh Chitale X-Patchwork-Id: 1830853 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Anup Patel The Smepmp read-only shared region must have pmpcfg.L, pmpcfg.R, pmpcfg.W, and pmpcfg.X bits set so sbi_hart_get_smepmp_flags() must return pmp_flags accordingly. Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2001:4860:4864:20:0:0:0:32 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Anup Patel The Smepmp read-only shared region must have pmpcfg.L, pmpcfg.R, pmpcfg.W, and pmpcfg.X bits set so sbi_hart_get_smepmp_flags() must return pmp_flags accordingly. Signed-off-by: Anup Patel Signed-off-by: Mayuresh Chitale --- lib/sbi/sbi_hart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 6320ea6..c8aa342 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -297,7 +297,7 @@ static unsigned int sbi_hart_get_smepmp_flags(struct sbi_scratch *scratch, if (SBI_DOMAIN_MEMREGION_IS_SHARED(reg->flags)) { /* Read only for both M and SU modes */ if (SBI_DOMAIN_MEMREGION_IS_SUR_MR(reg->flags)) - pmp_flags = (PMP_R | PMP_W | PMP_X); + pmp_flags = (PMP_L | PMP_R | PMP_W | PMP_X); /* Execute for SU but Read/Execute for M mode */ else if (SBI_DOMAIN_MEMREGION_IS_SUX_MRX(reg->flags)) From patchwork Thu Sep 7 11:49:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mayuresh Chitale X-Patchwork-Id: 1830854 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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([103.97.165.210]) by smtp.googlemail.com with ESMTPSA id k128-20020a633d86000000b0056ae1af610asm12556243pga.58.2023.09.07.04.50.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Sep 2023 04:50:13 -0700 (PDT) From: Mayuresh Chitale To: opensbi@lists.infradead.org Cc: Anup Patel , Anup Patel , Atish Patra , Mayuresh Chitale Subject: [PATCH v1 5/7] lib: sbi: Populate M-only Smepmp entries before setting mseccfg.MML Date: Thu, 7 Sep 2023 17:19:45 +0530 Message-Id: <20230907114947.1705425-6-mchitale@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230907114947.1705425-1-mchitale@ventanamicro.com> References: <20230907114947.1705425-1-mchitale@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230907_045015_188266_CC5AB1F5 X-CRM114-Status: GOOD ( 16.22 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Anup Patel Based on sections 4.c and 4.d in Ch.2 of the Smepmp spec the PMP entries must be programmed as below: 1. Program M-only entries 2. Enable mseccfg.MML 3. Program shared-region entries 4. Program SU-onl [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2001:4860:4864:20:0:0:0:30 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Anup Patel Based on sections 4.c and 4.d in Ch.2 of the Smepmp spec the PMP entries must be programmed as below: 1. Program M-only entries 2. Enable mseccfg.MML 3. Program shared-region entries 4. Program SU-only entries Co-developed-by: Mayuresh Chitale Signed-off-by: Mayuresh Chitale Signed-off-by: Anup Patel --- lib/sbi/sbi_hart.c | 69 ++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 57 insertions(+), 12 deletions(-) diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index c8aa342..435411e 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -348,6 +348,26 @@ static unsigned int sbi_hart_get_smepmp_flags(struct sbi_scratch *scratch, return pmp_flags; } +static void sbi_hart_smepmp_set(struct sbi_scratch *scratch, + struct sbi_domain *dom, + struct sbi_domain_memregion *reg, + unsigned int pmp_idx, + unsigned int pmp_flags, + unsigned int pmp_gran_log2, + unsigned long pmp_addr_max) +{ + unsigned long pmp_addr = reg->base >> PMP_SHIFT; + + if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) { + pmp_set(pmp_idx, pmp_flags, reg->base, reg->order); + } else { + sbi_printf("Can not configure pmp for domain %s because" + " memory region address 0x%lx or size 0x%lx " + "is not in range.\n", dom->name, reg->base, + reg->order); + } +} + static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch, unsigned int pmp_count, unsigned int pmp_gran_log2, @@ -357,7 +377,6 @@ static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch, struct sbi_domain *dom = sbi_domain_thishart_ptr(); unsigned int pmp_idx = 0; unsigned int pmp_flags; - unsigned long pmp_addr; /* * Set the RLB so that, we can write to PMP entries without @@ -368,32 +387,58 @@ static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch, /* Disable the reserved entry */ pmp_disable(SBI_SMEPMP_RESV_ENTRY); + /* Program M-only regions when MML is not set. */ sbi_domain_for_each_memregion(dom, reg) { + /* Skip reserved entry */ if (pmp_idx == SBI_SMEPMP_RESV_ENTRY) pmp_idx++; if (pmp_count <= pmp_idx) break; + /* Skip shared and SU-only regions */ + if (!SBI_DOMAIN_MEMREGION_M_ONLY_ACCESS(reg->flags)) { + pmp_idx++; + continue; + } + pmp_flags = sbi_hart_get_smepmp_flags(scratch, dom, reg); - if (pmp_flags == 0) + if (!pmp_flags) return 0; - pmp_addr = reg->base >> PMP_SHIFT; - if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) { - pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order); - } else { - sbi_printf("Can not configure pmp for domain %s because" - " memory region address 0x%lx or size 0x%lx " - "is not in range.\n", dom->name, reg->base, - reg->order); + sbi_hart_smepmp_set(scratch, dom, reg, pmp_idx++, pmp_flags, + pmp_gran_log2, pmp_addr_max); + } + + pmp_idx=0; + /* Set the MML to enforce new encoding */ + csr_set(CSR_MSECCFG, MSECCFG_MML); + + /* Program shared and SU-only regions */ + sbi_domain_for_each_memregion(dom, reg) { + /* Skip reserved entry */ + if (pmp_idx == SBI_SMEPMP_RESV_ENTRY) + pmp_idx++; + if (pmp_count <= pmp_idx) + break; + + /* Skip M-only regions */ + if (SBI_DOMAIN_MEMREGION_M_ONLY_ACCESS(reg->flags)) { + pmp_idx++; + continue; } + + pmp_flags = sbi_hart_get_smepmp_flags(scratch, dom, reg); + if (!pmp_flags) + return 0; + + sbi_hart_smepmp_set(scratch, dom, reg, pmp_idx++, pmp_flags, + pmp_gran_log2, pmp_addr_max); } /* - * All entries are programmed. Enable MML bit. + * All entries are programmed. * Keep the RLB bit so that dynamic mappings can be done. */ - csr_set(CSR_MSECCFG, (MSECCFG_RLB | MSECCFG_MML)); return 0; } From patchwork Thu Sep 7 11:49:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mayuresh Chitale X-Patchwork-Id: 1830855 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=orSZ8Kdm; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=PAeEI4Eu; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4RhHcX6GHpz1yh5 for ; Thu, 7 Sep 2023 21:50:36 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=toj17CA4iwMl2f7sH27aBG02jml5E3RAgw19oP1xObc=; b=orSZ8KdmuXXtce 2h+NqsY9XijgJ1E+Wo5PKIqEUZOAUaiVr3v0fc17Gw3Vyv2fWqUQIh0XDxZJuUssl1GJSuP7uaQXn 21ZF+UeILl2GWG72CWKfMtuUicPmqeJK2fPi8n0LNeZAoTs3S32ocQi2O+vnLPB5txks+T0XtpltP HZD9tLVlkWf7kZewQhbXxY3/gwFdzh/3l34PF7vXitO+app2E//UM06qJTCPEna+bXYqXCMo/U3oi UkGM1M22Aw+kmaLnjpAjZpcpXIq1cyeRYONgFnRmcRjJgQg6JJxew8B1YPSSj7O0nRQwMoIKK4ten YE/DfnTvyguo6cAaBbZw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qeDWf-00C1bI-11; Thu, 07 Sep 2023 11:50:21 +0000 Received: from mail-pf1-x42b.google.com ([2607:f8b0:4864:20::42b]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qeDWd-00C1Zd-0t for opensbi@lists.infradead.org; Thu, 07 Sep 2023 11:50:20 +0000 Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-68e369ba5f8so690233b3a.2 for ; Thu, 07 Sep 2023 04:50:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1694087417; x=1694692217; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oAnMWpijzvnFBiKjcASXOqEh3ZlhKKpOVFiJKbL45PA=; b=PAeEI4EukBHwkc80DrL+tRPYwCFbK2Lfmke/zwm3DL1yWYIsHbLZh1Sa/M79TvxlBb rCfnC7eKDEqp+NWh/ax65E8qVCNPYpbThgDONJc4giqenh9EpVasdJTk0mFfJB7D7Z37 ohoZp92G3vS3Yt08MDGeN5nlzDbFdaJ0eGJu68PI6QTbsbpGPORPc7opMkBFv1XZaiE2 v4dsZ2XU4OOMS9pYLusPseUHocJjOfpCdi2LVQ/rUL/62tOGqWuWg1QH8FSVpiWUdBOr 2quPjBljSvuFLkniv2OSvMOfciUarosfuw0KEq6SlbFMEP9/NZ9alMJt+aKVRMupdfdX lMiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1694087417; x=1694692217; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oAnMWpijzvnFBiKjcASXOqEh3ZlhKKpOVFiJKbL45PA=; b=c9BVdDrRxBbK1P2MOQ12R0QZ/D/dsMUmJdvCbwqqfqUNJ/22xeOz+s9kkn4abxOZod oAlDE/yTmbGIMoV+GJWflAD+iTk1k+AREpCKtc2bNDXoqxXrzmWSzTh2hBLLd/HrlTdu tODir8c5UEOwetrM0u42o5HbHVui7KRNLqxg2M323/MgGMCMq/KzV67byaLUB32t9GYf gmogEzTRWQ1kvvFlHq1f+CrOCpItqcO06cl06ROYD0GwljsUa7UsPUtpRy9FNkS+OJuh 78rqD8bMhvQv0Sxr3XJWhtep8anG+RQYoL0l9wLnzJyfzIyxSXmVxDDIfWLEkmCdIhTM P2Yw== X-Gm-Message-State: AOJu0YycmyTnXGVKZatXGoKIm5o1v5X5EyCx4/5oI4lOsaA6n7vi+qDr xBwfnE78C/w0qjX0sUYyWJh50oHx5N9koidi9+CkyzIe7DY= X-Google-Smtp-Source: AGHT+IGN2u8cEn+pyEMIOptrbO4fM+2G7PIO+SSaNGGYGhQ0NOCRMcn/AFu4Z/wzWGuFtZ/sryk0Jg== X-Received: by 2002:a05:6a20:8e01:b0:140:6fa9:7001 with SMTP id y1-20020a056a208e0100b001406fa97001mr21537088pzj.40.1694087417426; Thu, 07 Sep 2023 04:50:17 -0700 (PDT) Received: from mchitale-vm.. ([103.97.165.210]) by smtp.googlemail.com with ESMTPSA id k128-20020a633d86000000b0056ae1af610asm12556243pga.58.2023.09.07.04.50.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Sep 2023 04:50:17 -0700 (PDT) From: Mayuresh Chitale To: opensbi@lists.infradead.org Cc: Mayuresh Chitale , Anup Patel , Atish Patra , Anup Patel Subject: [PATCH v1 6/7] lib: utils/serial: Add shared regions for serial drivers Date: Thu, 7 Sep 2023 17:19:46 +0530 Message-Id: <20230907114947.1705425-7-mchitale@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230907114947.1705425-1-mchitale@ventanamicro.com> References: <20230907114947.1705425-1-mchitale@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230907_045019_313234_A1BD3DC9 X-CRM114-Status: GOOD ( 13.38 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. 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Content preview: The serial driver regions used by OpenSBI should be marked as a shared read-write regions between M-mode and SU-mode as those are accessed by earlycon and the corresponding tty serial drivers running [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:42b listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The serial driver regions used by OpenSBI should be marked as a shared read-write regions between M-mode and SU-mode as those are accessed by earlycon and the corresponding tty serial drivers running in 'S' mode. When the smepmp extension is enabled, PMP entries for these shared regions will get programmed. Signed-off-by: Mayuresh Chitale Signed-off-by: Anup Patel --- lib/utils/serial/cadence-uart.c | 6 +++++- lib/utils/serial/fdt_serial_htif.c | 10 ++++++++++ lib/utils/serial/uart8250.c | 7 ++++++- 3 files changed, 21 insertions(+), 2 deletions(-) diff --git a/lib/utils/serial/cadence-uart.c b/lib/utils/serial/cadence-uart.c index 8a2b6ba..30fbb95 100644 --- a/lib/utils/serial/cadence-uart.c +++ b/lib/utils/serial/cadence-uart.c @@ -6,6 +6,8 @@ * Author: Jun Liang Tan */ +#include +#include #include #include #include @@ -124,5 +126,7 @@ int cadence_uart_init(unsigned long base, u32 in_freq, u32 baudrate) sbi_console_set_device(&cadence_console); - return 0; + return sbi_domain_root_add_memrange(base, PAGE_SIZE, PAGE_SIZE, + (SBI_DOMAIN_MEMREGION_MMIO | + SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW)); } diff --git a/lib/utils/serial/fdt_serial_htif.c b/lib/utils/serial/fdt_serial_htif.c index 61f66d6..631d01f 100644 --- a/lib/utils/serial/fdt_serial_htif.c +++ b/lib/utils/serial/fdt_serial_htif.c @@ -7,6 +7,8 @@ * Anup Patel */ +#include +#include #include #include #include @@ -19,6 +21,7 @@ static const struct fdt_match serial_htif_match[] = { static int serial_htif_init(void *fdt, int nodeoff, const struct fdt_match *match) { + int rc; bool custom = false; uint64_t fromhost_addr = 0, tohost_addr = 0; @@ -29,6 +32,13 @@ static int serial_htif_init(void *fdt, int nodeoff, fdt_get_node_addr_size(fdt, nodeoff, 1, &tohost_addr, NULL); + rc = sbi_domain_root_add_memrange(fromhost_addr, PAGE_SIZE, PAGE_SIZE, + (SBI_DOMAIN_MEMREGION_MMIO | + SBI_DOMAIN_MEMREGION_ENF_READABLE | + SBI_DOMAIN_MEMREGION_ENF_WRITABLE)); + if (rc) + return rc; + return htif_serial_init(custom, fromhost_addr, tohost_addr); } diff --git a/lib/utils/serial/uart8250.c b/lib/utils/serial/uart8250.c index 99bf1bf..4d158d3 100644 --- a/lib/utils/serial/uart8250.c +++ b/lib/utils/serial/uart8250.c @@ -7,8 +7,10 @@ * Anup Patel */ +#include #include #include +#include #include /* clang-format off */ @@ -133,5 +135,8 @@ int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift, sbi_console_set_device(&uart8250_console); - return 0; + return sbi_domain_root_add_memrange(base + reg_offset, PAGE_SIZE, + PAGE_SIZE, + (SBI_DOMAIN_MEMREGION_MMIO | + SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW)); 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([103.97.165.210]) by smtp.googlemail.com with ESMTPSA id k128-20020a633d86000000b0056ae1af610asm12556243pga.58.2023.09.07.04.50.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Sep 2023 04:50:21 -0700 (PDT) From: Mayuresh Chitale To: opensbi@lists.infradead.org Cc: Anup Patel , Anup Patel , Atish Patra , Mayuresh Chitale Subject: [PATCH v1 7/7] lib: utils/regmap: Mark syscon region as shared read-write Date: Thu, 7 Sep 2023 17:19:47 +0530 Message-Id: <20230907114947.1705425-8-mchitale@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230907114947.1705425-1-mchitale@ventanamicro.com> References: <20230907114947.1705425-1-mchitale@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230907_045022_752985_DB55BAD9 X-CRM114-Status: GOOD ( 10.00 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Anup Patel The syscon region used by OpenSBI should be marked as a shared read-write region between M-mode and SU-mode. Signed-off-by: Anup Patel Signed-off-by: Mayuresh Chitale --- lib/utils/regmap/fdt_regmap_syscon.c | 7 +++++++ 1 file changed, 7 insertions(+) Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:42d listed in] [list.dnswl.org] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Anup Patel The syscon region used by OpenSBI should be marked as a shared read-write region between M-mode and SU-mode. Signed-off-by: Anup Patel Signed-off-by: Mayuresh Chitale --- lib/utils/regmap/fdt_regmap_syscon.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/lib/utils/regmap/fdt_regmap_syscon.c b/lib/utils/regmap/fdt_regmap_syscon.c index 29263dd..d87b6e0 100644 --- a/lib/utils/regmap/fdt_regmap_syscon.c +++ b/lib/utils/regmap/fdt_regmap_syscon.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include @@ -240,6 +241,12 @@ static int regmap_syscon_init(void *fdt, int nodeoff, u32 phandle, goto fail_free_syscon; } + rc = sbi_domain_root_add_memrange(addr, size, PAGE_SIZE, + (SBI_DOMAIN_MEMREGION_MMIO | + SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW)); + if (rc) + goto fail_free_syscon; + rc = regmap_add(&srm->rmap); if (rc) goto fail_free_syscon;