From patchwork Thu Sep 7 02:17:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 1830688 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=a6r5Bb4Q; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Rh2vg0TsKz1yh1 for ; Thu, 7 Sep 2023 12:17:51 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1748E3858022 for ; Thu, 7 Sep 2023 02:17:49 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1748E3858022 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1694053069; bh=M21h9VyQLTHlLGooPPy6AAL7cWnEj6aRjsa6j9dHBJc=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=a6r5Bb4QBbXlbQq0Zk+qQ1CfTg3W5qt5gJ0wvo0tgBNKgNkBsXBpubhiTddFOmh07 XQ+gsusaSEmRSjMygTaRrnSoLOG97Hn5dYqZ6yHIjweOqF2qbetp+W8ygJEw9l+LHq J89zv4JYpUv7NozcwXJ+Pul+aaIbTdB13w/+jmHw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id D8C4C385842A for ; Thu, 7 Sep 2023 02:17:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D8C4C385842A Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 14BF5300089; Thu, 7 Sep 2023 02:17:21 +0000 (UTC) To: Tsukasa OI , Kito Cheng , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Jeff Law Cc: gcc-patches@gcc.gnu.org Subject: [RFC PATCH 1/2] RISC-V: Make bit manipulation value / round number and shift amount types for builtins unsigned Date: Thu, 7 Sep 2023 02:17:01 +0000 Message-ID: <3cd2b31959d83e13803f993da85fa67728d609fe.1694053004.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_MANYTO, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, UPPERCASE_50_75 autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gcc-patches From: Tsukasa OI Reply-To: Tsukasa OI Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" From: Tsukasa OI For bit manipulation operations, inputs and the manipulated output are better to be unsigned like other target-independent builtins like __builtin_bswap32 and __builtin_popcount. Although this is not completely compatible as before (as the type changes), most code will run normally, even without warnings (with -Wall -Wextra). Round numbers and shift amount on the scalar crypto instructions are changed to unsigned in parity with LLVM 17 commit 599421ae36c3 ("[RISCV] Use unsigned instead of signed types for Zk* and Zb* builtins."). gcc/ChangeLog: * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for uint8_t. (RISCV_ATYPE_UHI): New for uint16_t. (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI): Removed as no longer used. (RISCV_ATYPE_UDI): New for uint64_t. * config/riscv/riscv-cmo.def: Make types unsigned for not working "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin argument/return types. * config/riscv/riscv-ftypes.def: Make bit manipulation, round number and shift amount types unsigned. * config/riscv/riscv-scalar-crypto.def: Ditto. --- gcc/config/riscv/riscv-builtins.cc | 7 +- gcc/config/riscv/riscv-cmo.def | 16 ++-- gcc/config/riscv/riscv-ftypes.def | 24 +++--- gcc/config/riscv/riscv-scalar-crypto.def | 104 +++++++++++------------ 4 files changed, 75 insertions(+), 76 deletions(-) diff --git a/gcc/config/riscv/riscv-builtins.cc b/gcc/config/riscv/riscv-builtins.cc index 8afe7b7e97d3..f6b06b3c16ac 100644 --- a/gcc/config/riscv/riscv-builtins.cc +++ b/gcc/config/riscv/riscv-builtins.cc @@ -155,11 +155,10 @@ AVAIL (hint_pause, (!0)) /* Argument types. */ #define RISCV_ATYPE_VOID void_type_node +#define RISCV_ATYPE_UQI unsigned_intQI_type_node +#define RISCV_ATYPE_UHI unsigned_intHI_type_node #define RISCV_ATYPE_USI unsigned_intSI_type_node -#define RISCV_ATYPE_QI intQI_type_node -#define RISCV_ATYPE_HI intHI_type_node -#define RISCV_ATYPE_SI intSI_type_node -#define RISCV_ATYPE_DI intDI_type_node +#define RISCV_ATYPE_UDI unsigned_intDI_type_node #define RISCV_ATYPE_VOID_PTR ptr_type_node /* RISCV_FTYPE_ATYPESN takes N RISCV_FTYPES-like type codes and lists diff --git a/gcc/config/riscv/riscv-cmo.def b/gcc/config/riscv/riscv-cmo.def index b92044dc6ff9..ff713b78e19e 100644 --- a/gcc/config/riscv/riscv-cmo.def +++ b/gcc/config/riscv/riscv-cmo.def @@ -13,15 +13,15 @@ RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, zero64), // zicbop -RISCV_BUILTIN (prefetchi_si, "zicbop_cbo_prefetchi", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, prefetchi32), -RISCV_BUILTIN (prefetchi_di, "zicbop_cbo_prefetchi", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI, prefetchi64), +RISCV_BUILTIN (prefetchi_si, "zicbop_cbo_prefetchi", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI, prefetchi32), +RISCV_BUILTIN (prefetchi_di, "zicbop_cbo_prefetchi", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI, prefetchi64), // zbkc or zbc -RISCV_BUILTIN (clmul_si, "clmul", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI, clmul_zbkc32_or_zbc32), -RISCV_BUILTIN (clmul_di, "clmul", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_DI, clmul_zbkc64_or_zbc64), -RISCV_BUILTIN (clmulh_si, "clmulh", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI, clmul_zbkc32_or_zbc32), -RISCV_BUILTIN (clmulh_di, "clmulh", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_DI, clmul_zbkc64_or_zbc64), +RISCV_BUILTIN (clmul_si, "clmul", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_USI, clmul_zbkc32_or_zbc32), +RISCV_BUILTIN (clmul_di, "clmul", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI_UDI, clmul_zbkc64_or_zbc64), +RISCV_BUILTIN (clmulh_si, "clmulh", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_USI, clmul_zbkc32_or_zbc32), +RISCV_BUILTIN (clmulh_di, "clmulh", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI_UDI, clmul_zbkc64_or_zbc64), // zbc -RISCV_BUILTIN (clmulr_si, "clmulr", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI, clmulr_zbc32), -RISCV_BUILTIN (clmulr_di, "clmulr", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_DI, clmulr_zbc64), +RISCV_BUILTIN (clmulr_si, "clmulr", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_USI, clmulr_zbc32), +RISCV_BUILTIN (clmulr_di, "clmulr", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI_UDI, clmulr_zbc64), diff --git a/gcc/config/riscv/riscv-ftypes.def b/gcc/config/riscv/riscv-ftypes.def index 3b518195a29c..366861ce640e 100644 --- a/gcc/config/riscv/riscv-ftypes.def +++ b/gcc/config/riscv/riscv-ftypes.def @@ -30,15 +30,15 @@ DEF_RISCV_FTYPE (0, (USI)) DEF_RISCV_FTYPE (0, (VOID)) DEF_RISCV_FTYPE (1, (VOID, USI)) DEF_RISCV_FTYPE (1, (VOID, VOID_PTR)) -DEF_RISCV_FTYPE (1, (SI, SI)) -DEF_RISCV_FTYPE (1, (DI, DI)) -DEF_RISCV_FTYPE (2, (SI, QI, QI)) -DEF_RISCV_FTYPE (2, (SI, HI, HI)) -DEF_RISCV_FTYPE (2, (SI, SI, SI)) -DEF_RISCV_FTYPE (2, (DI, QI, QI)) -DEF_RISCV_FTYPE (2, (DI, HI, HI)) -DEF_RISCV_FTYPE (2, (DI, SI, SI)) -DEF_RISCV_FTYPE (2, (DI, DI, SI)) -DEF_RISCV_FTYPE (2, (DI, DI, DI)) -DEF_RISCV_FTYPE (3, (SI, SI, SI, SI)) -DEF_RISCV_FTYPE (3, (DI, DI, DI, SI)) +DEF_RISCV_FTYPE (1, (USI, USI)) +DEF_RISCV_FTYPE (1, (UDI, UDI)) +DEF_RISCV_FTYPE (2, (USI, UQI, UQI)) +DEF_RISCV_FTYPE (2, (USI, UHI, UHI)) +DEF_RISCV_FTYPE (2, (USI, USI, USI)) +DEF_RISCV_FTYPE (2, (UDI, UQI, UQI)) +DEF_RISCV_FTYPE (2, (UDI, UHI, UHI)) +DEF_RISCV_FTYPE (2, (UDI, USI, USI)) +DEF_RISCV_FTYPE (2, (UDI, UDI, USI)) +DEF_RISCV_FTYPE (2, (UDI, UDI, UDI)) +DEF_RISCV_FTYPE (3, (USI, USI, USI, USI)) +DEF_RISCV_FTYPE (3, (UDI, UDI, UDI, USI)) diff --git a/gcc/config/riscv/riscv-scalar-crypto.def b/gcc/config/riscv/riscv-scalar-crypto.def index c2caed5151db..db86ec9fd78a 100644 --- a/gcc/config/riscv/riscv-scalar-crypto.def +++ b/gcc/config/riscv/riscv-scalar-crypto.def @@ -18,71 +18,71 @@ along with GCC; see the file COPYING3. If not see . */ // ZBKB -RISCV_BUILTIN (pack_sihi, "pack", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_HI_HI, crypto_zbkb32), -RISCV_BUILTIN (pack_disi, "pack", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_SI_SI, crypto_zbkb64), +RISCV_BUILTIN (pack_sihi, "pack", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_UHI_UHI, crypto_zbkb32), +RISCV_BUILTIN (pack_disi, "pack", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_USI_USI, crypto_zbkb64), -RISCV_BUILTIN (packh_si, "packh", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_QI_QI, crypto_zbkb32), -RISCV_BUILTIN (packh_di, "packh", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_QI_QI, crypto_zbkb64), +RISCV_BUILTIN (packh_si, "packh", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_UQI_UQI, crypto_zbkb32), +RISCV_BUILTIN (packh_di, "packh", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UQI_UQI, crypto_zbkb64), -RISCV_BUILTIN (packw, "packw", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_HI_HI, crypto_zbkb64), +RISCV_BUILTIN (packw, "packw", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UHI_UHI, crypto_zbkb64), -RISCV_BUILTIN (zip, "zip", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, crypto_zbkb32), -RISCV_BUILTIN (unzip, "unzip", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, crypto_zbkb32), +RISCV_BUILTIN (zip, "zip", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI, crypto_zbkb32), +RISCV_BUILTIN (unzip, "unzip", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI, crypto_zbkb32), -RISCV_BUILTIN (brev8_si, "brev8", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, crypto_zbkb32), -RISCV_BUILTIN (brev8_di, "brev8", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI, crypto_zbkb64), +RISCV_BUILTIN (brev8_si, "brev8", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI, crypto_zbkb32), +RISCV_BUILTIN (brev8_di, "brev8", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI, crypto_zbkb64), // ZBKX -RISCV_BUILTIN (xperm4_si, "xperm4", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI, crypto_zbkx32), -RISCV_BUILTIN (xperm4_di, "xperm4", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_DI, crypto_zbkx64), -RISCV_BUILTIN (xperm8_si, "xperm8", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI, crypto_zbkx32), -RISCV_BUILTIN (xperm8_di, "xperm8", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_DI, crypto_zbkx64), +RISCV_BUILTIN (xperm4_si, "xperm4", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_USI, crypto_zbkx32), +RISCV_BUILTIN (xperm4_di, "xperm4", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI_UDI, crypto_zbkx64), +RISCV_BUILTIN (xperm8_si, "xperm8", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_USI, crypto_zbkx32), +RISCV_BUILTIN (xperm8_di, "xperm8", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI_UDI, crypto_zbkx64), // ZKND -DIRECT_BUILTIN (aes32dsi, RISCV_SI_FTYPE_SI_SI_SI, crypto_zknd32), -DIRECT_BUILTIN (aes32dsmi, RISCV_SI_FTYPE_SI_SI_SI, crypto_zknd32), -DIRECT_BUILTIN (aes64ds, RISCV_DI_FTYPE_DI_DI, crypto_zknd64), -DIRECT_BUILTIN (aes64dsm, RISCV_DI_FTYPE_DI_DI, crypto_zknd64), -DIRECT_BUILTIN (aes64im, RISCV_DI_FTYPE_DI, crypto_zknd64), -DIRECT_BUILTIN (aes64ks1i, RISCV_DI_FTYPE_DI_SI, crypto_zkne_or_zknd), -DIRECT_BUILTIN (aes64ks2, RISCV_DI_FTYPE_DI_DI, crypto_zkne_or_zknd), +DIRECT_BUILTIN (aes32dsi, RISCV_USI_FTYPE_USI_USI_USI, crypto_zknd32), +DIRECT_BUILTIN (aes32dsmi, RISCV_USI_FTYPE_USI_USI_USI, crypto_zknd32), +DIRECT_BUILTIN (aes64ds, RISCV_UDI_FTYPE_UDI_UDI, crypto_zknd64), +DIRECT_BUILTIN (aes64dsm, RISCV_UDI_FTYPE_UDI_UDI, crypto_zknd64), +DIRECT_BUILTIN (aes64im, RISCV_UDI_FTYPE_UDI, crypto_zknd64), +DIRECT_BUILTIN (aes64ks1i, RISCV_UDI_FTYPE_UDI_USI, crypto_zkne_or_zknd), +DIRECT_BUILTIN (aes64ks2, RISCV_UDI_FTYPE_UDI_UDI, crypto_zkne_or_zknd), // ZKNE -DIRECT_BUILTIN (aes32esi, RISCV_SI_FTYPE_SI_SI_SI, crypto_zkne32), -DIRECT_BUILTIN (aes32esmi, RISCV_SI_FTYPE_SI_SI_SI, crypto_zkne32), -DIRECT_BUILTIN (aes64es, RISCV_DI_FTYPE_DI_DI, crypto_zkne64), -DIRECT_BUILTIN (aes64esm, RISCV_DI_FTYPE_DI_DI, crypto_zkne64), +DIRECT_BUILTIN (aes32esi, RISCV_USI_FTYPE_USI_USI_USI, crypto_zkne32), +DIRECT_BUILTIN (aes32esmi, RISCV_USI_FTYPE_USI_USI_USI, crypto_zkne32), +DIRECT_BUILTIN (aes64es, RISCV_UDI_FTYPE_UDI_UDI, crypto_zkne64), +DIRECT_BUILTIN (aes64esm, RISCV_UDI_FTYPE_UDI_UDI, crypto_zkne64), // ZKNH -RISCV_BUILTIN (sha256sig0_si, "sha256sig0", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, crypto_zknh32), -RISCV_BUILTIN (sha256sig0_di, "sha256sig0", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI, crypto_zknh64), -RISCV_BUILTIN (sha256sig1_si, "sha256sig1", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, crypto_zknh32), -RISCV_BUILTIN (sha256sig1_di, "sha256sig1", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI, crypto_zknh64), -RISCV_BUILTIN (sha256sum0_si, "sha256sum0", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, crypto_zknh32), -RISCV_BUILTIN (sha256sum0_di, "sha256sum0", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI, crypto_zknh64), -RISCV_BUILTIN (sha256sum1_si, "sha256sum1", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, crypto_zknh32), -RISCV_BUILTIN (sha256sum1_di, "sha256sum1", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI, crypto_zknh64), - -DIRECT_BUILTIN (sha512sig0h, RISCV_SI_FTYPE_SI_SI, crypto_zknh32), -DIRECT_BUILTIN (sha512sig0l, RISCV_SI_FTYPE_SI_SI, crypto_zknh32), -DIRECT_BUILTIN (sha512sig1h, RISCV_SI_FTYPE_SI_SI, crypto_zknh32), -DIRECT_BUILTIN (sha512sig1l, RISCV_SI_FTYPE_SI_SI, crypto_zknh32), -DIRECT_BUILTIN (sha512sum0r, RISCV_SI_FTYPE_SI_SI, crypto_zknh32), -DIRECT_BUILTIN (sha512sum1r, RISCV_SI_FTYPE_SI_SI, crypto_zknh32), - -DIRECT_BUILTIN (sha512sig0, RISCV_DI_FTYPE_DI, crypto_zknh64), -DIRECT_BUILTIN (sha512sig1, RISCV_DI_FTYPE_DI, crypto_zknh64), -DIRECT_BUILTIN (sha512sum0, RISCV_DI_FTYPE_DI, crypto_zknh64), -DIRECT_BUILTIN (sha512sum1, RISCV_DI_FTYPE_DI, crypto_zknh64), +RISCV_BUILTIN (sha256sig0_si, "sha256sig0", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI, crypto_zknh32), +RISCV_BUILTIN (sha256sig0_di, "sha256sig0", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI, crypto_zknh64), +RISCV_BUILTIN (sha256sig1_si, "sha256sig1", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI, crypto_zknh32), +RISCV_BUILTIN (sha256sig1_di, "sha256sig1", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI, crypto_zknh64), +RISCV_BUILTIN (sha256sum0_si, "sha256sum0", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI, crypto_zknh32), +RISCV_BUILTIN (sha256sum0_di, "sha256sum0", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI, crypto_zknh64), +RISCV_BUILTIN (sha256sum1_si, "sha256sum1", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI, crypto_zknh32), +RISCV_BUILTIN (sha256sum1_di, "sha256sum1", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI, crypto_zknh64), + +DIRECT_BUILTIN (sha512sig0h, RISCV_USI_FTYPE_USI_USI, crypto_zknh32), +DIRECT_BUILTIN (sha512sig0l, RISCV_USI_FTYPE_USI_USI, crypto_zknh32), +DIRECT_BUILTIN (sha512sig1h, RISCV_USI_FTYPE_USI_USI, crypto_zknh32), +DIRECT_BUILTIN (sha512sig1l, RISCV_USI_FTYPE_USI_USI, crypto_zknh32), +DIRECT_BUILTIN (sha512sum0r, RISCV_USI_FTYPE_USI_USI, crypto_zknh32), +DIRECT_BUILTIN (sha512sum1r, RISCV_USI_FTYPE_USI_USI, crypto_zknh32), + +DIRECT_BUILTIN (sha512sig0, RISCV_UDI_FTYPE_UDI, crypto_zknh64), +DIRECT_BUILTIN (sha512sig1, RISCV_UDI_FTYPE_UDI, crypto_zknh64), +DIRECT_BUILTIN (sha512sum0, RISCV_UDI_FTYPE_UDI, crypto_zknh64), +DIRECT_BUILTIN (sha512sum1, RISCV_UDI_FTYPE_UDI, crypto_zknh64), // ZKSH -RISCV_BUILTIN (sm3p0_si, "sm3p0", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, crypto_zksh32), -RISCV_BUILTIN (sm3p0_di, "sm3p0", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI, crypto_zksh64), -RISCV_BUILTIN (sm3p1_si, "sm3p1", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, crypto_zksh32), -RISCV_BUILTIN (sm3p1_di, "sm3p1", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI, crypto_zksh64), +RISCV_BUILTIN (sm3p0_si, "sm3p0", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI, crypto_zksh32), +RISCV_BUILTIN (sm3p0_di, "sm3p0", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI, crypto_zksh64), +RISCV_BUILTIN (sm3p1_si, "sm3p1", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI, crypto_zksh32), +RISCV_BUILTIN (sm3p1_di, "sm3p1", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI, crypto_zksh64), // ZKSED -RISCV_BUILTIN (sm4ed_si, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI_SI, crypto_zksed32), -RISCV_BUILTIN (sm4ed_di, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_DI_SI, crypto_zksed64), -RISCV_BUILTIN (sm4ks_si, "sm4ks", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI_SI, crypto_zksed32), -RISCV_BUILTIN (sm4ks_di, "sm4ks", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_DI_SI, crypto_zksed64), +RISCV_BUILTIN (sm4ed_si, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_USI_USI, crypto_zksed32), +RISCV_BUILTIN (sm4ed_di, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI_UDI_USI, crypto_zksed64), +RISCV_BUILTIN (sm4ks_si, "sm4ks", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_USI_USI, crypto_zksed32), +RISCV_BUILTIN (sm4ks_di, "sm4ks", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI_UDI_USI, crypto_zksed64), From patchwork Thu Sep 7 02:17:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 1830689 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Cheng , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Jeff Law Cc: gcc-patches@gcc.gnu.org Subject: [RFC PATCH 2/2] RISC-V: Update testsuite for type-changed builtins Date: Thu, 7 Sep 2023 02:17:02 +0000 Message-ID: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_MANYTO, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gcc-patches From: Tsukasa OI Reply-To: Tsukasa OI Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" From: Tsukasa OI This commit replaces the type of the builtin used in the testsuite. Even without this commit, it won't cause any test failures but changed so that no confusion occurs. gcc/testsuite/ChangeLog: * gcc.target/riscv/zbc32.c: Make signed type to unsigned. * gcc.target/riscv/zbc64.c: Ditto. * gcc.target/riscv/zbkb32.c: Ditto. * gcc.target/riscv/zbkb64.c: Ditto. * gcc.target/riscv/zbkc32.c: Ditto. * gcc.target/riscv/zbkc64.c: Ditto. * gcc.target/riscv/zbkx32.c: Ditto. * gcc.target/riscv/zbkx64.c: Ditto. * gcc.target/riscv/zknd32.c: Ditto. * gcc.target/riscv/zknd64.c: Ditto. * gcc.target/riscv/zkne32.c: Ditto. * gcc.target/riscv/zkne64.c: Ditto. * gcc.target/riscv/zknh-sha256.c: Ditto. * gcc.target/riscv/zknh-sha512-32.c: Ditto. * gcc.target/riscv/zknh-sha512-64.c: Ditto. * gcc.target/riscv/zksed32.c: Ditto. * gcc.target/riscv/zksed64.c: Ditto. * gcc.target/riscv/zksh32.c: Ditto. * gcc.target/riscv/zksh64.c: Ditto. --- gcc/testsuite/gcc.target/riscv/zbc32.c | 6 +++--- gcc/testsuite/gcc.target/riscv/zbc64.c | 6 +++--- gcc/testsuite/gcc.target/riscv/zbkb32.c | 10 +++++----- gcc/testsuite/gcc.target/riscv/zbkb64.c | 8 ++++---- gcc/testsuite/gcc.target/riscv/zbkc32.c | 4 ++-- gcc/testsuite/gcc.target/riscv/zbkc64.c | 4 ++-- gcc/testsuite/gcc.target/riscv/zbkx32.c | 4 ++-- gcc/testsuite/gcc.target/riscv/zbkx64.c | 4 ++-- gcc/testsuite/gcc.target/riscv/zknd32.c | 4 ++-- gcc/testsuite/gcc.target/riscv/zknd64.c | 10 +++++----- gcc/testsuite/gcc.target/riscv/zkne32.c | 4 ++-- gcc/testsuite/gcc.target/riscv/zkne64.c | 8 ++++---- gcc/testsuite/gcc.target/riscv/zknh-sha256.c | 8 ++++---- gcc/testsuite/gcc.target/riscv/zknh-sha512-32.c | 12 ++++++------ gcc/testsuite/gcc.target/riscv/zknh-sha512-64.c | 8 ++++---- gcc/testsuite/gcc.target/riscv/zksed32.c | 4 ++-- gcc/testsuite/gcc.target/riscv/zksed64.c | 4 ++-- gcc/testsuite/gcc.target/riscv/zksh32.c | 4 ++-- gcc/testsuite/gcc.target/riscv/zksh64.c | 4 ++-- 19 files changed, 58 insertions(+), 58 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/zbc32.c b/gcc/testsuite/gcc.target/riscv/zbc32.c index 08705c4a687e..f3fb2238f7f4 100644 --- a/gcc/testsuite/gcc.target/riscv/zbc32.c +++ b/gcc/testsuite/gcc.target/riscv/zbc32.c @@ -3,17 +3,17 @@ /* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */ #include -int32_t foo1(int32_t rs1, int32_t rs2) +uint32_t foo1(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_clmul(rs1, rs2); } -int32_t foo2(int32_t rs1, int32_t rs2) +uint32_t foo2(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_clmulh(rs1, rs2); } -int32_t foo3(int32_t rs1, int32_t rs2) +uint32_t foo3(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_clmulr(rs1, rs2); } diff --git a/gcc/testsuite/gcc.target/riscv/zbc64.c b/gcc/testsuite/gcc.target/riscv/zbc64.c index a19f42b2883f..841a0aa7847d 100644 --- a/gcc/testsuite/gcc.target/riscv/zbc64.c +++ b/gcc/testsuite/gcc.target/riscv/zbc64.c @@ -3,17 +3,17 @@ /* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */ #include -int64_t foo1(int64_t rs1, int64_t rs2) +uint64_t foo1(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_clmul(rs1, rs2); } -int64_t foo2(int64_t rs1, int64_t rs2) +uint64_t foo2(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_clmulh(rs1, rs2); } -int64_t foo3(int64_t rs1, int64_t rs2) +uint64_t foo3(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_clmulr(rs1, rs2); } diff --git a/gcc/testsuite/gcc.target/riscv/zbkb32.c b/gcc/testsuite/gcc.target/riscv/zbkb32.c index dd45b8b9dc72..b2e442dc49d8 100644 --- a/gcc/testsuite/gcc.target/riscv/zbkb32.c +++ b/gcc/testsuite/gcc.target/riscv/zbkb32.c @@ -4,27 +4,27 @@ #include -int32_t foo1(int16_t rs1, int16_t rs2) +uint32_t foo1(uint16_t rs1, uint16_t rs2) { return __builtin_riscv_pack(rs1, rs2); } -int32_t foo2(int8_t rs1, int8_t rs2) +uint32_t foo2(uint8_t rs1, uint8_t rs2) { return __builtin_riscv_packh(rs1, rs2); } -int32_t foo3(int32_t rs1) +uint32_t foo3(uint32_t rs1) { return __builtin_riscv_brev8(rs1); } -int32_t foo4(int32_t rs1) +uint32_t foo4(uint32_t rs1) { return __builtin_riscv_zip(rs1); } -int32_t foo5(int32_t rs1) +uint32_t foo5(uint32_t rs1) { return __builtin_riscv_unzip(rs1); } diff --git a/gcc/testsuite/gcc.target/riscv/zbkb64.c b/gcc/testsuite/gcc.target/riscv/zbkb64.c index 960a2ae30ed6..08ac9c2a9f00 100644 --- a/gcc/testsuite/gcc.target/riscv/zbkb64.c +++ b/gcc/testsuite/gcc.target/riscv/zbkb64.c @@ -3,22 +3,22 @@ /* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */ #include -int64_t foo1(int32_t rs1, int32_t rs2) +uint64_t foo1(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_pack(rs1, rs2); } -int64_t foo2(int8_t rs1, int8_t rs2) +uint64_t foo2(uint8_t rs1, uint8_t rs2) { return __builtin_riscv_packh(rs1, rs2); } -int64_t foo3(int16_t rs1, int16_t rs2) +uint64_t foo3(uint16_t rs1, uint16_t rs2) { return __builtin_riscv_packw(rs1, rs2); } -int64_t foo4(int64_t rs1, int64_t rs2) +uint64_t foo4(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_brev8(rs1); } diff --git a/gcc/testsuite/gcc.target/riscv/zbkc32.c b/gcc/testsuite/gcc.target/riscv/zbkc32.c index a8e29200250b..29f0d624a7d7 100644 --- a/gcc/testsuite/gcc.target/riscv/zbkc32.c +++ b/gcc/testsuite/gcc.target/riscv/zbkc32.c @@ -3,12 +3,12 @@ /* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */ #include -int32_t foo1(int32_t rs1, int32_t rs2) +uint32_t foo1(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_clmul(rs1, rs2); } -int32_t foo2(int32_t rs1, int32_t rs2) +uint32_t foo2(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_clmulh(rs1, rs2); } diff --git a/gcc/testsuite/gcc.target/riscv/zbkc64.c b/gcc/testsuite/gcc.target/riscv/zbkc64.c index 728f8baf099d..53e6ac215ed3 100644 --- a/gcc/testsuite/gcc.target/riscv/zbkc64.c +++ b/gcc/testsuite/gcc.target/riscv/zbkc64.c @@ -3,12 +3,12 @@ /* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */ #include -int64_t foo1(int64_t rs1, int64_t rs2) +uint64_t foo1(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_clmul(rs1, rs2); } -int64_t foo2(int64_t rs1, int64_t rs2) +uint64_t foo2(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_clmulh(rs1, rs2); } diff --git a/gcc/testsuite/gcc.target/riscv/zbkx32.c b/gcc/testsuite/gcc.target/riscv/zbkx32.c index bd95524f548b..b8b822a7c499 100644 --- a/gcc/testsuite/gcc.target/riscv/zbkx32.c +++ b/gcc/testsuite/gcc.target/riscv/zbkx32.c @@ -4,12 +4,12 @@ #include -int32_t foo3(int32_t rs1, int32_t rs2) +uint32_t foo3(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_xperm8(rs1, rs2); } -int32_t foo4(int32_t rs1, int32_t rs2) +uint32_t foo4(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_xperm4(rs1, rs2); } diff --git a/gcc/testsuite/gcc.target/riscv/zbkx64.c b/gcc/testsuite/gcc.target/riscv/zbkx64.c index 2a04a94b86c4..732436701b33 100644 --- a/gcc/testsuite/gcc.target/riscv/zbkx64.c +++ b/gcc/testsuite/gcc.target/riscv/zbkx64.c @@ -4,12 +4,12 @@ #include -int64_t foo1(int64_t rs1, int64_t rs2) +uint64_t foo1(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_xperm8(rs1, rs2); } -int64_t foo2(int64_t rs1, int64_t rs2) +uint64_t foo2(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_xperm4(rs1, rs2); } diff --git a/gcc/testsuite/gcc.target/riscv/zknd32.c b/gcc/testsuite/gcc.target/riscv/zknd32.c index 5fcc66da9015..e60c027e0911 100644 --- a/gcc/testsuite/gcc.target/riscv/zknd32.c +++ b/gcc/testsuite/gcc.target/riscv/zknd32.c @@ -4,12 +4,12 @@ #include -int32_t foo1(int32_t rs1, int32_t rs2, int bs) +uint32_t foo1(uint32_t rs1, uint32_t rs2, int bs) { return __builtin_riscv_aes32dsi(rs1,rs2,bs); } -int32_t foo2(int32_t rs1, int32_t rs2, int bs) +uint32_t foo2(uint32_t rs1, uint32_t rs2, int bs) { return __builtin_riscv_aes32dsmi(rs1,rs2,bs); } diff --git a/gcc/testsuite/gcc.target/riscv/zknd64.c b/gcc/testsuite/gcc.target/riscv/zknd64.c index b1dff98f7e21..910b91c6ed88 100644 --- a/gcc/testsuite/gcc.target/riscv/zknd64.c +++ b/gcc/testsuite/gcc.target/riscv/zknd64.c @@ -4,27 +4,27 @@ #include -int64_t foo1(int64_t rs1, int64_t rs2) +uint64_t foo1(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_aes64ds(rs1,rs2); } -int64_t foo2(int64_t rs1, int64_t rs2) +uint64_t foo2(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_aes64dsm(rs1,rs2); } -int64_t foo3(int64_t rs1, int rnum) +uint64_t foo3(uint64_t rs1, unsigned rnum) { return __builtin_riscv_aes64ks1i(rs1,rnum); } -int64_t foo4(int64_t rs1, int64_t rs2) +uint64_t foo4(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_aes64ks2(rs1,rs2); } -int64_t foo5(int64_t rs1) +uint64_t foo5(uint64_t rs1) { return __builtin_riscv_aes64im(rs1); } diff --git a/gcc/testsuite/gcc.target/riscv/zkne32.c b/gcc/testsuite/gcc.target/riscv/zkne32.c index c131c9a6bbb1..252e9ffa43b3 100644 --- a/gcc/testsuite/gcc.target/riscv/zkne32.c +++ b/gcc/testsuite/gcc.target/riscv/zkne32.c @@ -4,12 +4,12 @@ #include -int32_t foo1(int32_t rs1, int32_t rs2, int bs) +uint32_t foo1(uint32_t rs1, uint32_t rs2, unsigned bs) { return __builtin_riscv_aes32esi(rs1, rs2, bs); } -int32_t foo2(int32_t rs1, int32_t rs2, int bs) +uint32_t foo2(uint32_t rs1, uint32_t rs2, unsigned bs) { return __builtin_riscv_aes32esmi(rs1, rs2, bs); } diff --git a/gcc/testsuite/gcc.target/riscv/zkne64.c b/gcc/testsuite/gcc.target/riscv/zkne64.c index 7d82b5a5d411..b25f6b5c29ac 100644 --- a/gcc/testsuite/gcc.target/riscv/zkne64.c +++ b/gcc/testsuite/gcc.target/riscv/zkne64.c @@ -4,22 +4,22 @@ #include -int64_t foo1(int64_t rs1, int64_t rs2) +uint64_t foo1(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_aes64es(rs1,rs2); } -int64_t foo2(int64_t rs1, int64_t rs2) +uint64_t foo2(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_aes64esm(rs1,rs2); } -int64_t foo3(int64_t rs1, int rnum) +uint64_t foo3(uint64_t rs1, unsigned rnum) { return __builtin_riscv_aes64ks1i(rs1,rnum); } -int64_t foo4(int64_t rs1, int64_t rs2) +uint64_t foo4(uint64_t rs1, uint64_t rs2) { return __builtin_riscv_aes64ks2(rs1,rs2); } diff --git a/gcc/testsuite/gcc.target/riscv/zknh-sha256.c b/gcc/testsuite/gcc.target/riscv/zknh-sha256.c index 54329aa6af2e..952d611cd0b9 100644 --- a/gcc/testsuite/gcc.target/riscv/zknh-sha256.c +++ b/gcc/testsuite/gcc.target/riscv/zknh-sha256.c @@ -2,22 +2,22 @@ /* { dg-options "-O2 -march=rv64gc_zknh -mabi=lp64" } */ /* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */ -long foo1(long rs1) +unsigned long foo1(unsigned long rs1) { return __builtin_riscv_sha256sig0(rs1); } -long foo2(long rs1) +unsigned long foo2(unsigned long rs1) { return __builtin_riscv_sha256sig1(rs1); } -long foo3(long rs1) +unsigned long foo3(unsigned long rs1) { return __builtin_riscv_sha256sum0(rs1); } -long foo4(long rs1) +unsigned long foo4(unsigned long rs1) { return __builtin_riscv_sha256sum1(rs1); } diff --git a/gcc/testsuite/gcc.target/riscv/zknh-sha512-32.c b/gcc/testsuite/gcc.target/riscv/zknh-sha512-32.c index 4ebc470f8ab7..f2bcae36a1f2 100644 --- a/gcc/testsuite/gcc.target/riscv/zknh-sha512-32.c +++ b/gcc/testsuite/gcc.target/riscv/zknh-sha512-32.c @@ -4,32 +4,32 @@ #include -int32_t foo1(int32_t rs1, int32_t rs2) +uint32_t foo1(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_sha512sig0h(rs1,rs2); } -int32_t foo2(int32_t rs1, int32_t rs2) +uint32_t foo2(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_sha512sig0l(rs1,rs2); } -int32_t foo3(int32_t rs1, int32_t rs2) +uint32_t foo3(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_sha512sig1h(rs1,rs2); } -int32_t foo4(int32_t rs1, int32_t rs2) +uint32_t foo4(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_sha512sig1l(rs1,rs2); } -int32_t foo5(int32_t rs1, int32_t rs2) +uint32_t foo5(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_sha512sum0r(rs1,rs2); } -int32_t foo6(int32_t rs1, int32_t rs2) +uint32_t foo6(uint32_t rs1, uint32_t rs2) { return __builtin_riscv_sha512sum1r(rs1,rs2); } diff --git a/gcc/testsuite/gcc.target/riscv/zknh-sha512-64.c b/gcc/testsuite/gcc.target/riscv/zknh-sha512-64.c index 0fb5c75b9ce6..4f248575e66e 100644 --- a/gcc/testsuite/gcc.target/riscv/zknh-sha512-64.c +++ b/gcc/testsuite/gcc.target/riscv/zknh-sha512-64.c @@ -4,22 +4,22 @@ #include -int64_t foo1(int64_t rs1) +uint64_t foo1(uint64_t rs1) { return __builtin_riscv_sha512sig0(rs1); } -int64_t foo2(int64_t rs1) +uint64_t foo2(uint64_t rs1) { return __builtin_riscv_sha512sig1(rs1); } -int64_t foo3(int64_t rs1) +uint64_t foo3(uint64_t rs1) { return __builtin_riscv_sha512sum0(rs1); } -int64_t foo4(int64_t rs1) +uint64_t foo4(uint64_t rs1) { return __builtin_riscv_sha512sum1(rs1); } diff --git a/gcc/testsuite/gcc.target/riscv/zksed32.c b/gcc/testsuite/gcc.target/riscv/zksed32.c index 9548d007cb22..7df04147e05c 100644 --- a/gcc/testsuite/gcc.target/riscv/zksed32.c +++ b/gcc/testsuite/gcc.target/riscv/zksed32.c @@ -4,12 +4,12 @@ #include -int32_t foo1(int32_t rs1, int32_t rs2, int bs) +uint32_t foo1(uint32_t rs1, uint32_t rs2, unsigned bs) { return __builtin_riscv_sm4ks(rs1,rs2,bs); } -int32_t foo2(int32_t rs1, int32_t rs2, int bs) +uint32_t foo2(uint32_t rs1, uint32_t rs2, unsigned bs) { return __builtin_riscv_sm4ed(rs1,rs2,bs); } diff --git a/gcc/testsuite/gcc.target/riscv/zksed64.c b/gcc/testsuite/gcc.target/riscv/zksed64.c index 190a654151db..3485adf9cd88 100644 --- a/gcc/testsuite/gcc.target/riscv/zksed64.c +++ b/gcc/testsuite/gcc.target/riscv/zksed64.c @@ -4,12 +4,12 @@ #include -int64_t foo1(int64_t rs1, int64_t rs2, int bs) +uint64_t foo1(uint64_t rs1, uint64_t rs2, unsigned bs) { return __builtin_riscv_sm4ks(rs1,rs2,bs); } -int64_t foo2(int64_t rs1, int64_t rs2, int bs) +uint64_t foo2(uint64_t rs1, uint64_t rs2, unsigned bs) { return __builtin_riscv_sm4ed(rs1,rs2,bs); } diff --git a/gcc/testsuite/gcc.target/riscv/zksh32.c b/gcc/testsuite/gcc.target/riscv/zksh32.c index 50370b58b7a9..20513f986f88 100644 --- a/gcc/testsuite/gcc.target/riscv/zksh32.c +++ b/gcc/testsuite/gcc.target/riscv/zksh32.c @@ -4,12 +4,12 @@ #include -int32_t foo1(int32_t rs1) +uint32_t foo1(uint32_t rs1) { return __builtin_riscv_sm3p0(rs1); } -int32_t foo2(int32_t rs1) +uint32_t foo2(uint32_t rs1) { return __builtin_riscv_sm3p1(rs1); } diff --git a/gcc/testsuite/gcc.target/riscv/zksh64.c b/gcc/testsuite/gcc.target/riscv/zksh64.c index 69847f3df359..bdd137872785 100644 --- a/gcc/testsuite/gcc.target/riscv/zksh64.c +++ b/gcc/testsuite/gcc.target/riscv/zksh64.c @@ -4,12 +4,12 @@ #include -int64_t foo1(int64_t rs1) +uint64_t foo1(uint64_t rs1) { return __builtin_riscv_sm3p0(rs1); } -int64_t foo2(int64_t rs1) +uint64_t foo2(uint64_t rs1) { return __builtin_riscv_sm3p1(rs1); }