From patchwork Tue Aug 15 22:35:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 1821608 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org (client-ip=2605:bc80:3010::136; helo=smtp3.osuosl.org; envelope-from=intel-wired-lan-bounces@osuosl.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256 header.s=default header.b=TAq+zzXH; dkim-atps=neutral Received: from smtp3.osuosl.org (smtp3.osuosl.org [IPv6:2605:bc80:3010::136]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4RQR1z49dKz1yfd for ; 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Tue, 15 Aug 2023 22:35:57 +0000 (UTC) DKIM-Filter: OpenDKIM Filter v2.11.0 smtp2.osuosl.org BFBD64149A X-IronPort-AV: E=McAfee;i="6600,9927,10803"; a="352718849" X-IronPort-AV: E=Sophos;i="6.01,175,1684825200"; d="scan'208";a="352718849" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2023 15:35:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10803"; a="710905980" X-IronPort-AV: E=Sophos;i="6.01,175,1684825200"; d="scan'208";a="710905980" Received: from jekeller-desk.amr.corp.intel.com (HELO jekeller-desk.jekeller.internal) ([10.166.241.1]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2023 15:35:56 -0700 From: Jacob Keller To: Intel Wired LAN Date: Tue, 15 Aug 2023 15:35:43 -0700 Message-ID: <20230815223551.1238091-2-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.41.0.1.g9857a21e0017.dirty In-Reply-To: <20230815223551.1238091-1-jacob.e.keller@intel.com> References: <20230815223551.1238091-1-jacob.e.keller@intel.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1692138957; x=1723674957; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=syVLLL2YIkCivctCpVnmrNaHUSbAWALFm6l4frRtSFI=; b=c5GHmiBhMTHfMvkk7BtvxJUv12zp1YQ+x8Q9/FseWMdKDZbfBv6PNMze oNteW8uBb4Fd2lfToqFGeaepEMvX6egUZ/eWt7eWyF8gO1zJFur40ZSxK L8xy4mfFyPW/2m6/fB44exTsB3NtJm4DoHsj8YkB4qwffGN1EipyWVzuJ la1hW/lVLQenYtpLoZxGBfjRMrHc9Wd+EiEF84I47DWmoMQPPzsZTD2/p 3SfkGMgsigdqONsZAzEvWVw4hoMNg+MxfCnDQIRfnyw1rR92TfAmyVWBp AHGgpFbxldTVJNq9AwCHD+72BosU089Dhvc3pfurhyXXHEESdERpVQg3t A==; X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=c5GHmiBh Subject: [Intel-wired-lan] [PATCH iwl-next 1/4] ice: remove ICE_F_PTP_EXTTS feature flag X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Karol Kolacinski , Anthony Nguyen Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" The ICE_F_PTP_EXTTS feature flag is ostensibly intended to support checking whether the device supports external timestamp pins. It is only checked in E810-specific code flows, and is enabled for all E810-based devices. E822 and E823 flows unconditionally enable external timestamp support. This makes the feature flag meaningless, as it is always enabled. Just unconditionally enable support for external timestamp pins and remove this unnecessary flag. Signed-off-by: Jacob Keller --- drivers/net/ethernet/intel/ice/ice.h | 1 - drivers/net/ethernet/intel/ice/ice_lib.c | 1 - drivers/net/ethernet/intel/ice/ice_ptp.c | 4 +--- 3 files changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h index 5d307bacf7c6..013ea8970fbc 100644 --- a/drivers/net/ethernet/intel/ice/ice.h +++ b/drivers/net/ethernet/intel/ice/ice.h @@ -199,7 +199,6 @@ enum ice_feature { ICE_F_DSCP, - ICE_F_PTP_EXTTS, ICE_F_SMA_CTRL, ICE_F_GNSS, ICE_F_ROCE_LAG, diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c index 201570cd2e0b..5dfcb824f817 100644 --- a/drivers/net/ethernet/intel/ice/ice_lib.c +++ b/drivers/net/ethernet/intel/ice/ice_lib.c @@ -3986,7 +3986,6 @@ void ice_init_feature_support(struct ice_pf *pf) case ICE_DEV_ID_E810C_QSFP: case ICE_DEV_ID_E810C_SFP: ice_set_feature_support(pf, ICE_F_DSCP); - ice_set_feature_support(pf, ICE_F_PTP_EXTTS); if (ice_is_e810t(&pf->hw)) { ice_set_feature_support(pf, ICE_F_SMA_CTRL); if (ice_gnss_is_gps_present(&pf->hw)) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index 97b8581ae931..9524fcea9ae9 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -2205,9 +2205,7 @@ static void ice_ptp_setup_pins_e810(struct ice_pf *pf, struct ptp_clock_info *info) { info->n_per_out = N_PER_OUT_E810; - - if (ice_is_feature_supported(pf, ICE_F_PTP_EXTTS)) - info->n_ext_ts = N_EXT_TS_E810; + info->n_ext_ts = N_EXT_TS_E810; if (ice_is_feature_supported(pf, ICE_F_SMA_CTRL)) { info->n_ext_ts = N_EXT_TS_E810; From patchwork Tue Aug 15 22:35:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 1821609 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org (client-ip=140.211.166.136; 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X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=dPZUb8GH Subject: [Intel-wired-lan] [PATCH iwl-next 2/4] ice: don't enable PTP related capabilities on non-owner PFs X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Karol Kolacinski , Anthony Nguyen Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" The ice driver currently sets feature flags for certain PTP related capabilities based on whether the device has support for the feature. Avoid enabling these capabilities except on the ports which own the timer. This ensures that the driver never attempts to access the features except on the ports designated as controlling the main timer functionality. Signed-off-by: Jacob Keller --- drivers/net/ethernet/intel/ice/ice_lib.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c index 5dfcb824f817..f29ff54383b5 100644 --- a/drivers/net/ethernet/intel/ice/ice_lib.c +++ b/drivers/net/ethernet/intel/ice/ice_lib.c @@ -3986,6 +3986,9 @@ void ice_init_feature_support(struct ice_pf *pf) case ICE_DEV_ID_E810C_QSFP: case ICE_DEV_ID_E810C_SFP: ice_set_feature_support(pf, ICE_F_DSCP); + /* If we don't own the timer - don't enable other caps */ + if (!ice_pf_src_tmr_owned(pf)) + break; if (ice_is_e810t(&pf->hw)) { ice_set_feature_support(pf, ICE_F_SMA_CTRL); if (ice_gnss_is_gps_present(&pf->hw)) From patchwork Tue Aug 15 22:35:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 1821611 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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a="710905985" X-IronPort-AV: E=Sophos;i="6.01,175,1684825200"; d="scan'208";a="710905985" Received: from jekeller-desk.amr.corp.intel.com (HELO jekeller-desk.jekeller.internal) ([10.166.241.1]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2023 15:35:56 -0700 From: Jacob Keller To: Intel Wired LAN Date: Tue, 15 Aug 2023 15:35:45 -0700 Message-ID: <20230815223551.1238091-4-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.41.0.1.g9857a21e0017.dirty In-Reply-To: <20230815223551.1238091-1-jacob.e.keller@intel.com> References: <20230815223551.1238091-1-jacob.e.keller@intel.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1692138958; x=1723674958; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BBMMYeRK5I/hXjyakFRZ4+JxA+9BUgIdpNrxGmNyUoc=; b=JF1kNAgHns4qHTUxTRxlZgcq4jyA5j7KSY/GfF9blcZNRgz0PXHQmZhJ tYksYIc/dUZuzJlOObokzEHKK02fv2fFdhxpVnGF0I0v5Vux/Fmp+8hwz QJxL3fk3YoDW1d+tQn1UoISyMol7iHiFvn2E1eQ1Tne2IavOqShPoDgEg u8f0/o8DocG6iyp7yxs3PdWMPjk31VN/9iDQ9KdHXrZgOiweUyZsEGmOA Z6bKgiU+sVfmH4hiyFgRM6UcsRi+/URSZsUXFnnNAG7+FEu/IOXfMeHql FxKCSnS0GHA0IckQ5Z/mHD1VuMVxY+b1coCICU1RzUwI6DxT16YsByCt3 g==; X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=JF1kNAgH Subject: [Intel-wired-lan] [PATCH iwl-next 3/4] ice: check the netlist before enabling ICE_F_SMA_CTRL X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Karol Kolacinski , Anthony Nguyen Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" Currently, the ice driver unconditionally enables ICE_F_SMA_CTRL for all E810-T based devices. In some cases, the SMA control access is not available in the netlist firmware component. In such a case, the driver will fail to setup the SMA pins. When this happens, the driver prints "Failed to configure E810-T SMA pin control" and forcibly disables all PTP pin configuration support. This results in failure to use even the fixed pin capabilities of standard E810 devices, resulting in reduced functionality. To avoid this, check the netlist for the SMA control module before enabling the ICE_F_SMA_CTRL feature. If the netlist lacks this module, then the feature will not be enabled. In this case, the driver flow for enabling periodic outputs and external timestamps will fall back to the standard fixed pin configuration. This allows supporting the software defined pins on a wider array of platforms. Signed-off-by: Jacob Keller --- .../net/ethernet/intel/ice/ice_adminq_cmd.h | 6 ++- drivers/net/ethernet/intel/ice/ice_common.c | 46 +++++++++++++++++++ drivers/net/ethernet/intel/ice/ice_common.h | 3 ++ drivers/net/ethernet/intel/ice/ice_lib.c | 3 +- drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 16 +++++++ drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 1 + 6 files changed, 72 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h index 90616750e779..82c4daf0a825 100644 --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h @@ -1367,6 +1367,7 @@ struct ice_aqc_link_topo_params { #define ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE 6 #define ICE_AQC_LINK_TOPO_NODE_TYPE_MEZZ 7 #define ICE_AQC_LINK_TOPO_NODE_TYPE_ID_EEPROM 8 +#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX 10 #define ICE_AQC_LINK_TOPO_NODE_CTX_S 4 #define ICE_AQC_LINK_TOPO_NODE_CTX_M \ (0xF << ICE_AQC_LINK_TOPO_NODE_CTX_S) @@ -1403,8 +1404,9 @@ struct ice_aqc_link_topo_addr { struct ice_aqc_get_link_topo { struct ice_aqc_link_topo_addr addr; u8 node_part_num; -#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 -#define ICE_AQC_GET_LINK_TOPO_NODE_NR_C827 0x31 +#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 +#define ICE_AQC_GET_LINK_TOPO_NODE_NR_C827 0x31 +#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX 0x47 u8 rsvd[9]; }; diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c index 2652e4f5c4a2..9eeda3f5aa75 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.c +++ b/drivers/net/ethernet/intel/ice/ice_common.c @@ -2503,6 +2503,52 @@ bool ice_is_pf_c827(struct ice_hw *hw) return false; } +#define MAX_NETLIST_SIZE 10 +/** + * ice_find_netlist_node + * @hw: pointer to the hw struct + * @node_type_ctx: type of netlist node to look for + * @node_part_number: node part number to look for + * @node_handle: output parameter if node found - optional + * + * Find and return the node handle for a given node type and part number in the + * netlist. When found 0 is returned, -ENOENT otherwise. If + * node_handle provided, it would be set to found node handle. + */ +int +ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, + u16 *node_handle) +{ + struct ice_aqc_get_link_topo cmd; + u8 rec_node_part_number; + u16 rec_node_handle; + u8 idx; + + for (idx = 0; idx < MAX_NETLIST_SIZE; idx++) { + int status; + + memset(&cmd, 0, sizeof(cmd)); + + cmd.addr.topo_params.node_type_ctx = + (node_type_ctx << ICE_AQC_LINK_TOPO_NODE_TYPE_S); + cmd.addr.topo_params.index = idx; + + status = ice_aq_get_netlist_node(hw, &cmd, + &rec_node_part_number, + &rec_node_handle); + if (status) + return status; + + if (rec_node_part_number == node_part_number) { + if (node_handle) + *node_handle = rec_node_handle; + return 0; + } + } + + return -ENOENT; +} + /** * ice_aq_list_caps - query function/device capabilities * @hw: pointer to the HW struct diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h index 2250a9c5f61e..f7178a5686a5 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.h +++ b/drivers/net/ethernet/intel/ice/ice_common.h @@ -94,6 +94,9 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, struct ice_sq_cd *cd); bool ice_is_pf_c827(struct ice_hw *hw); int +ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, + u16 *node_handle); +int ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count, enum ice_adminq_opc opc, struct ice_sq_cd *cd); int diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c index f29ff54383b5..4ac8998cb964 100644 --- a/drivers/net/ethernet/intel/ice/ice_lib.c +++ b/drivers/net/ethernet/intel/ice/ice_lib.c @@ -3989,8 +3989,9 @@ void ice_init_feature_support(struct ice_pf *pf) /* If we don't own the timer - don't enable other caps */ if (!ice_pf_src_tmr_owned(pf)) break; - if (ice_is_e810t(&pf->hw)) { + if (ice_is_clock_mux_present_e810t(&pf->hw)) ice_set_feature_support(pf, ICE_F_SMA_CTRL); + if (ice_is_e810t(&pf->hw)) { if (ice_gnss_is_gps_present(&pf->hw)) ice_set_feature_support(pf, ICE_F_GNSS); } diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c index fd19afaf9c85..bd3f32bfbc78 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c @@ -3018,6 +3018,22 @@ ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle) return 0; } +/** + * ice_is_clock_mux_present_e810t + * @hw: pointer to the hw struct + * + * Check if the Clock Multiplexer device is present in the netlist + */ +bool ice_is_clock_mux_present_e810t(struct ice_hw *hw) +{ + if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX, + ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX, + NULL)) + return false; + + return true; +} + /** * ice_read_sma_ctrl_e810t * @hw: pointer to the hw struct diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h index 4e3c1382c477..3768e7a01920 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h @@ -195,6 +195,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port); int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port); /* E810 family functions */ +bool ice_is_clock_mux_present_e810t(struct ice_hw *hw); int ice_ptp_init_phy_e810(struct ice_hw *hw); int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data); int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data); From patchwork Tue Aug 15 22:35:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 1821612 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org (client-ip=2605:bc80:3010::136; helo=smtp3.osuosl.org; envelope-from=intel-wired-lan-bounces@osuosl.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256 header.s=default header.b=JS+SKdPE; dkim-atps=neutral Received: from smtp3.osuosl.org (smtp3.osuosl.org [IPv6:2605:bc80:3010::136]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4RQR2N20QWz1yfd for ; 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Tue, 15 Aug 2023 22:35:58 +0000 (UTC) DKIM-Filter: OpenDKIM Filter v2.11.0 smtp2.osuosl.org 3C07D414A1 X-IronPort-AV: E=McAfee;i="6600,9927,10803"; a="352718852" X-IronPort-AV: E=Sophos;i="6.01,175,1684825200"; d="scan'208";a="352718852" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2023 15:35:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10803"; a="710905989" X-IronPort-AV: E=Sophos;i="6.01,175,1684825200"; d="scan'208";a="710905989" Received: from jekeller-desk.amr.corp.intel.com (HELO jekeller-desk.jekeller.internal) ([10.166.241.1]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2023 15:35:56 -0700 From: Jacob Keller To: Intel Wired LAN Date: Tue, 15 Aug 2023 15:35:46 -0700 Message-ID: <20230815223551.1238091-5-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.41.0.1.g9857a21e0017.dirty In-Reply-To: <20230815223551.1238091-1-jacob.e.keller@intel.com> References: <20230815223551.1238091-1-jacob.e.keller@intel.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1692138958; x=1723674958; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MKFpsnEAMO12UVWNR442QHxKlhZ8digcQnoMc/YOjKQ=; b=LzG6Sj0uw8f2Tb2d5O6Xl+shvv4v+zETOrwnEjwwyLvrTSANYNN0psRI napubadlITPewnZ0kgA4SeFkZN5NNfTGsi0i9zJhEiVBLCGVb4nnu8EqB QtSNa90V2fhkYwmdEwFa71092708mdKiH/D/vLPED+PPrI0dcmSq8yZHx 418gMer4Q+apY/zG9Jyr4TbQDEmbhuMUXqBXFtvN/+QKWxp+7EyFrAEm3 1RO4g+BhI5Xn+Q5qe/RmCOnkwTWnvkNM/1UjIOvhY6APMlSX18KLCYkwm SeCpZQ/RmCrRJQitGgLiRTblfLVdXNbCdQ4fSFcCBREWuZ+mBoHR4rrva g==; X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=LzG6Sj0u Subject: [Intel-wired-lan] [PATCH iwl-next 4/4] ice: check netlist before enabling ICE_F_GNSS X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Karol Kolacinski , Anthony Nguyen Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" Similar to the change made for ICE_F_SMA_CTRL, check the netlist before enabling support for ICE_F_GNSS. This ensures that the driver only enables the GNSS feature on devices which actually have the feature enabled in the firmware device configuration. Signed-off-by: Jacob Keller --- drivers/net/ethernet/intel/ice/ice_adminq_cmd.h | 2 ++ drivers/net/ethernet/intel/ice/ice_lib.c | 7 +++---- drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 15 +++++++++++++++ drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 1 + 4 files changed, 21 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h index 82c4daf0a825..2f0d4bffe210 100644 --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h @@ -1368,6 +1368,7 @@ struct ice_aqc_link_topo_params { #define ICE_AQC_LINK_TOPO_NODE_TYPE_MEZZ 7 #define ICE_AQC_LINK_TOPO_NODE_TYPE_ID_EEPROM 8 #define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX 10 +#define ICE_AQC_LINK_TOPO_NODE_TYPE_GPS 11 #define ICE_AQC_LINK_TOPO_NODE_CTX_S 4 #define ICE_AQC_LINK_TOPO_NODE_CTX_M \ (0xF << ICE_AQC_LINK_TOPO_NODE_CTX_S) @@ -1407,6 +1408,7 @@ struct ice_aqc_get_link_topo { #define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 #define ICE_AQC_GET_LINK_TOPO_NODE_NR_C827 0x31 #define ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX 0x47 +#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_GPS 0x48 u8 rsvd[9]; }; diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c index 4ac8998cb964..24a30b55c7ff 100644 --- a/drivers/net/ethernet/intel/ice/ice_lib.c +++ b/drivers/net/ethernet/intel/ice/ice_lib.c @@ -3991,10 +3991,9 @@ void ice_init_feature_support(struct ice_pf *pf) break; if (ice_is_clock_mux_present_e810t(&pf->hw)) ice_set_feature_support(pf, ICE_F_SMA_CTRL); - if (ice_is_e810t(&pf->hw)) { - if (ice_gnss_is_gps_present(&pf->hw)) - ice_set_feature_support(pf, ICE_F_GNSS); - } + if (ice_is_gps_present_e810t(&pf->hw) && + ice_gnss_is_gps_present(&pf->hw)) + ice_set_feature_support(pf, ICE_F_GNSS); break; default: break; diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c index bd3f32bfbc78..455d7a15de26 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c @@ -3034,6 +3034,21 @@ bool ice_is_clock_mux_present_e810t(struct ice_hw *hw) return true; } +/** + * ice_is_gps_present_e810t + * @hw: pointer to the hw struct + * + * Check if the GPS generic device is present in the netlist + */ +bool ice_is_gps_present_e810t(struct ice_hw *hw) +{ + if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_GPS, + ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_GPS, NULL)) + return false; + + return true; +} + /** * ice_read_sma_ctrl_e810t * @hw: pointer to the hw struct diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h index 3768e7a01920..4399338b7347 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h @@ -196,6 +196,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port); /* E810 family functions */ bool ice_is_clock_mux_present_e810t(struct ice_hw *hw); +bool ice_is_gps_present_e810t(struct ice_hw *hw); int ice_ptp_init_phy_e810(struct ice_hw *hw); int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data); int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data);