From patchwork Sun Jun 18 10:22:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 1796227 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nextmovesoftware.com header.i=@nextmovesoftware.com header.a=rsa-sha256 header.s=default header.b=nUlPOHiD; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4QkTVw3T0zz20Wg for ; Sun, 18 Jun 2023 20:23:03 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 00CF43857719 for ; Sun, 18 Jun 2023 10:23:01 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id D19083858D28 for ; Sun, 18 Jun 2023 10:22:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D19083858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:To:From:Sender:Reply-To:Cc:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=7DBrjqakudpRag+e3p5AYWvCl6858tx1lf6xzKqcp/c=; b=nUlPOHiD8G9SWWyvyseB1yIomp 8bZbSt9BR7v4MwbwuAWqnaZ0iRwrSxoyvuElA7ESj2odnEQH0GDKecHX/ZcWH7nBw6P70U7Aj4DTu oglys3uHfaowHRK6nOOem7nOItCYls5vWSb7gTAxm/FE5yR5IWymaJ3d7xdxHapiDqsm5YTXNUhzT sO9VGAQ168slrEPtmlX3q3KeUxWBlGwEI68g71DSx0oZJnQ2N67v6tt8e660nJtPgp3YyxFpcoMsG adnmSgQT+fY/SPxIQp/mh28ZynKr5lhJ/JWngXiFmV4symJkfFinPOyPvGwMk7TFvy1qe+ZTqh+p1 x0hI/FMw==; Received: from host86-169-41-81.range86-169.btcentralplus.com ([86.169.41.81]:56710 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1qApYW-00012h-0W for gcc-patches@gcc.gnu.org; Sun, 18 Jun 2023 06:22:48 -0400 From: "Roger Sayle" To: Subject: [PATCH] Improved SUBREG simplifications in simplify-rtx.cc's simplify_subreg. Date: Sun, 18 Jun 2023 11:22:46 +0100 Message-ID: <008401d9a1ce$d46257d0$7d270770$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdmhzmpiPXUz2JTIQhmrdMJ8OTaDgQ== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_BARRACUDACENTRAL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" An x86 backend improvement that I'm working results in combine attempting to recognize: (set (reg:DI 87 [ xD.2846 ]) (ior:DI (subreg:DI (ashift:TI (zero_extend:TI (reg:DI 92)) (const_int 64 [0x40])) 0) (reg:DI 91))) where the lowpart SUBREG has difficulty seeing through the (hi<<64) that the lowpart must be zero. Rather than workaround this in the backend, the better fix is to teach simplify-rtx that lowpart((hi<<64)|lo) -> lo and highpart((hi<<64)|lo) -> hi, so that all backends benefit. Reducing the number of places where the middle-end generates a SUBREG of something other than REG is a good thing. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures, except for pr78904-1b.c, for which a backend solution has just been proposed. Ok for mainline? 2023-06-18 Roger Sayle gcc/ChangeLog * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs of ASHIFT to const0_rtx with sufficiently large shift count. Optimize highpart SUBREGs of ASHIFT as the shift operand when the shift count is the correct offset. Optimize SUBREGs of multi-word logic operations if the SUBREGs of both operands can be simplified. Thanks in advance, Roger diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc index 21b7eb4..6715247 100644 --- a/gcc/simplify-rtx.cc +++ b/gcc/simplify-rtx.cc @@ -7746,6 +7746,38 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op, return CONST0_RTX (outermode); } + /* Optimize SUBREGS of scalar integral ASHIFT by a valid constant. */ + if (GET_CODE (op) == ASHIFT + && SCALAR_INT_MODE_P (innermode) + && CONST_INT_P (XEXP (op, 1)) + && INTVAL (XEXP (op, 1)) > 0 + && known_gt (GET_MODE_BITSIZE (innermode), INTVAL (XEXP (op, 1)))) + { + HOST_WIDE_INT val = INTVAL (XEXP (op, 1)); + /* A lowpart SUBREG of a ASHIFT by a constant may fold to zero. */ + if (known_eq (subreg_lowpart_offset (outermode, innermode), byte) + && known_le (GET_MODE_BITSIZE (outermode), val)) + return CONST0_RTX (outermode); + /* Optimize the highpart SUBREG of a suitable ASHIFT (ZERO_EXTEND). */ + if (GET_CODE (XEXP (op, 0)) == ZERO_EXTEND + && GET_MODE (XEXP (XEXP (op, 0), 0)) == outermode + && known_eq (GET_MODE_BITSIZE (outermode), val) + && known_eq (GET_MODE_BITSIZE (innermode), 2 * val) + && known_eq (subreg_highpart_offset (outermode, innermode), byte)) + return XEXP (XEXP (op, 0), 0); + } + + /* Attempt to simplify WORD_MODE SUBREGs of bitwise expressions. */ + if (outermode == word_mode + && (GET_CODE (op) == IOR || GET_CODE (op) == XOR || GET_CODE (op) == AND) + && SCALAR_INT_MODE_P (innermode)) + { + rtx op0 = simplify_subreg (outermode, XEXP (op, 0), innermode, byte); + rtx op1 = simplify_subreg (outermode, XEXP (op, 1), innermode, byte); + if (op0 && op1) + return simplify_gen_binary (GET_CODE (op), outermode, op0, op1); + } + scalar_int_mode int_outermode, int_innermode; if (is_a (outermode, &int_outermode) && is_a (innermode, &int_innermode)