From patchwork Wed Jun 7 20:53:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 1791915 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=collabora.com header.i=@collabora.com header.a=rsa-sha256 header.s=mail header.b=ZoCpR01I; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Qc06F1Z1pz20Wn for ; Thu, 8 Jun 2023 06:57:41 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235527AbjFGU5j (ORCPT ); Wed, 7 Jun 2023 16:57:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235606AbjFGU5i (ORCPT ); Wed, 7 Jun 2023 16:57:38 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C7111FE6; Wed, 7 Jun 2023 13:57:33 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id DD4C76606F00; Wed, 7 Jun 2023 21:57:29 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1686171452; bh=OSgUrJ7XnUuJOY6k3BmTBADMqdJYSB09ILd9ph+D5lE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZoCpR01I/0R63kwknASWo9HkeihEglI6ha5K2F0IfG4lDIRNVq8s1J0muHQkLfqMM nhJDPKpRq5vZ3/OFa+XMblXobraKAVNKWQz0CJasqSM4hCWmSBMgg/+PwBlDmv05UH +1OlaiEk0mR0MEATFRH+K+YlAFDG1o+INV35/3ho0vrZ+VvNy2aMcDzreDCfpFNrPX vmG855GkbUB2AwxnMHiS+AYtddOmrM242yQ2yodpfKbY//pb5mfm1JYHEZzrA0tT2L EZDg36wzc3Q5sveBDJq5ql5YSVxQDNq7pxolxOWQ5WJfXazmyYLyviNi5aQTj0GHdu Zhm3d4lIQYNCg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: kernel@collabora.com, AngeloGioacchino Del Regno , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Conor Dooley , Krzysztof Kozlowski , Mauro Carvalho Chehab , Rob Herring , Tiffany Lin , Yunfei Dong , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 1/5] media: dt-bindings: mediatek,vcodec: Don't require assigned-clocks Date: Wed, 7 Jun 2023 16:53:38 -0400 Message-ID: <20230607205714.510012-2-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230607205714.510012-1-nfraprado@collabora.com> References: <20230607205714.510012-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On MT8183 it's not necessary to configure the parent for the clocks. Remove the assigned-clocks and assigned-clock-parents from the required list. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski Reviewed-by: Alexandre Mergnat --- (no changes since v1) .../devicetree/bindings/media/mediatek,vcodec-decoder.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml index fad59b486d5d..63be42560948 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml @@ -73,8 +73,6 @@ required: - clocks - clock-names - iommus - - assigned-clocks - - assigned-clock-parents allOf: - if: From patchwork Wed Jun 7 20:53:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 1791918 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=collabora.com header.i=@collabora.com header.a=rsa-sha256 header.s=mail header.b=Qprx3F0+; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Qc06b4HJwz20Wn for ; Thu, 8 Jun 2023 06:57:59 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235709AbjFGU55 (ORCPT ); Wed, 7 Jun 2023 16:57:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235662AbjFGU5y (ORCPT ); Wed, 7 Jun 2023 16:57:54 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BC142113; Wed, 7 Jun 2023 13:57:36 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 95F0D6606F08; Wed, 7 Jun 2023 21:57:32 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1686171454; bh=p/U679O+aC/H7H+CqRcp2tK9NBFgpymNdt1qg5tXhR0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Qprx3F0+l6LD4cltZLZV0ciBVQ/u2OvCFwQpiknLGaVxcKthB1EVzOCkm8Cj/5xEu pDGxNi2JrjK3TopSoRVL4p6LPQaDMk08urVEm8zxJcUEXR081L76orRRBwWNgMECbD 3Z5GoVcvACdO5QARlrPqfLNYT81gCnld2oEqwqi1hXhKugJst/47ztOWDIRapFBl+w 94LSoET34wMHWtBnMA9fzcev4RKN0A143IsJseGsL9dIjq5Y9HwGtfvrDhQkWr2RSl Bl5+JgQkgFRG55z8OVrikywtttnO9d0fq4RkukevUnCurLsan/XMq19nJFY1Kh0Ghf rsR9ybQexDRTQ== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: kernel@collabora.com, AngeloGioacchino Del Regno , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Conor Dooley , Krzysztof Kozlowski , Mauro Carvalho Chehab , Rob Herring , Tiffany Lin , Yunfei Dong , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 2/5] media: dt-bindings: mediatek,vcodec: Remove VDEC_SYS for mt8183 Date: Wed, 7 Jun 2023 16:53:39 -0400 Message-ID: <20230607205714.510012-3-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230607205714.510012-1-nfraprado@collabora.com> References: <20230607205714.510012-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The binding expects the first register space to be VDEC_SYS. But on mt8183, which uses the stateless decoders, this space is used only for controlling clocks and resets, which are better described as separate clock-controller and reset-controller nodes. In fact, in mt8173's devicetree there are already such separate clock-controller nodes, which cause duplicate addresses between the vdecsys node and the vcodec node. But for this SoC, since the stateful decoder code makes other uses of the VDEC_SYS register space, it's not straightforward to remove it. In order to avoid the same address conflict to happen on mt8183, since the only current use of the VDEC_SYS register space in the driver is to read the status of a clock that indicates the hardware is active, remove the VDEC_SYS register space from the binding and describe an extra clock that will be used to directly check the hardware status. While adding the active clock, split the mt8183 clocks since there are less of them than in mt8173. This is done in this same commit to avoid changing the number of clocks twice. Also add reg-names to be able to tell that this new register schema is used, so the driver can keep backward compatibility. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Conor Dooley --- Changes in v2: - Merged with patch 1 (media: dt-bindings: mediatek,vcodec: Allow single clock for mt8183) to avoid changing number of clocks twice - Added maxItems to reg-names - Constrained clocks for each compatible - Reordered properties for each compatible .../media/mediatek,vcodec-decoder.yaml | 63 ++++++++++++++++--- 1 file changed, 54 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml index 63be42560948..2b29748b1d22 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml @@ -21,24 +21,23 @@ properties: - mediatek,mt8183-vcodec-dec reg: + minItems: 11 maxItems: 12 + reg-names: + minItems: 11 + maxItems: 11 + interrupts: maxItems: 1 clocks: + minItems: 2 maxItems: 8 clock-names: - items: - - const: vcodecpll - - const: univpll_d2 - - const: clk_cci400_sel - - const: vdec_sel - - const: vdecpll - - const: vencpll - - const: venc_lt_sel - - const: vdec_bus_clk_src + minItems: 2 + maxItems: 8 assigned-clocks: true @@ -86,6 +85,33 @@ allOf: required: - mediatek,scp + properties: + reg: + maxItems: 11 + + reg-names: + items: + - const: misc + - const: ld + - const: top + - const: cm + - const: ad + - const: av + - const: pp + - const: hwd + - const: hwq + - const: hwb + - const: hwg + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: vdec + - const: active + - if: properties: compatible: @@ -97,6 +123,25 @@ allOf: required: - mediatek,vpu + properties: + reg: + minItems: 12 + + clocks: + minItems: 8 + maxItems: 8 + + clock-names: + items: + - const: vcodecpll + - const: univpll_d2 + - const: clk_cci400_sel + - const: vdec_sel + - const: vdecpll + - const: vencpll + - const: venc_lt_sel + - const: vdec_bus_clk_src + additionalProperties: false examples: From patchwork Wed Jun 7 20:53:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 1791919 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=collabora.com header.i=@collabora.com header.a=rsa-sha256 header.s=mail header.b=O52Eho0T; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Qc06d0Wwpz20Ty for ; Thu, 8 Jun 2023 06:58:01 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235659AbjFGU57 (ORCPT ); Wed, 7 Jun 2023 16:57:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235693AbjFGU5z (ORCPT ); Wed, 7 Jun 2023 16:57:55 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 23D3E2134; Wed, 7 Jun 2023 13:57:41 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 98E276606F0D; Wed, 7 Jun 2023 21:57:37 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1686171459; bh=IHu+5VHbpn9tYN0aeoiKy2zTGue/frX6mQhuF4Dk/XE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=O52Eho0T3yp7+0mui4z26cOHabKuCSsXrF2DqF5Rb3n1rZ/OJlP0F4Ip8oondaYoB bsAbsRrlpt1YddHdvHdksMQmjr7XfcXKUGtK4pdK3W+3qmNh/NjgKDMjxYq3WRZ5ni F88pQ6/PYBGb/08S+pr4ZinFmBYzZPHTKO1PlerLK6ynyiH0RD5olnAeWrthRovhfx lQqRVsiPQT4kLx/1sbzgOB1enepQ6Ja1/BzC6hGJ261RipK+A8Xi71WsFN07BHQMAI 9Rquy2Y0VC1xXkh97Lpw7x31kfXrkCCPOU90qpH7l+Q49yQjORGanfMoDS2ouaIQW6 mxI2GpseKK2jA== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: kernel@collabora.com, AngeloGioacchino Del Regno , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Chen-Yu Tsai , Conor Dooley , Krzysztof Kozlowski , Michael Turquette , Miles Chen , Rob Herring , Stephen Boyd , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 4/5] clk: mediatek: mt8183: Add CLK_VDEC_ACTIVE to vdec Date: Wed, 7 Jun 2023 16:53:41 -0400 Message-ID: <20230607205714.510012-5-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230607205714.510012-1-nfraprado@collabora.com> References: <20230607205714.510012-1-nfraprado@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the CLK_VDEC_ACTIVE clock to the vdec clock driver. This clock is enabled by the VPU once it starts decoding. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- Changes in v2: - Added CLK_IGNORE_UNUSED flag drivers/clk/mediatek/clk-mt8183-vdec.c | 5 +++++ include/dt-bindings/clock/mt8183-clk.h | 3 ++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/clk/mediatek/clk-mt8183-vdec.c b/drivers/clk/mediatek/clk-mt8183-vdec.c index 513b7956cbea..03c4f1acfdb8 100644 --- a/drivers/clk/mediatek/clk-mt8183-vdec.c +++ b/drivers/clk/mediatek/clk-mt8183-vdec.c @@ -27,6 +27,10 @@ static const struct mtk_gate_regs vdec1_cg_regs = { GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, \ &mtk_clk_gate_ops_setclr_inv) +#define GATE_VDEC0(_id, _name, _parent, _shift) \ + GATE_MTK_FLAGS(_id, _name, _parent, &vdec0_cg_regs, _shift, \ + &mtk_clk_gate_ops_setclr, CLK_IGNORE_UNUSED) + #define GATE_VDEC1_I(_id, _name, _parent, _shift) \ GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, \ &mtk_clk_gate_ops_setclr_inv) @@ -34,6 +38,7 @@ static const struct mtk_gate_regs vdec1_cg_regs = { static const struct mtk_gate vdec_clks[] = { /* VDEC0 */ GATE_VDEC0_I(CLK_VDEC_VDEC, "vdec_vdec", "mm_sel", 0), + GATE_VDEC0(CLK_VDEC_ACTIVE, "vdec_active", "mm_sel", 4), /* VDEC1 */ GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1", "mm_sel", 0), }; diff --git a/include/dt-bindings/clock/mt8183-clk.h b/include/dt-bindings/clock/mt8183-clk.h index a7b470b0ec8a..32dd7d91dbe2 100644 --- a/include/dt-bindings/clock/mt8183-clk.h +++ b/include/dt-bindings/clock/mt8183-clk.h @@ -357,7 +357,8 @@ /* VDEC_GCON */ #define CLK_VDEC_VDEC 0 #define CLK_VDEC_LARB1 1 -#define CLK_VDEC_NR_CLK 2 +#define CLK_VDEC_ACTIVE 2 +#define CLK_VDEC_NR_CLK 3 /* VENC_GCON */ #define CLK_VENC_LARB 0