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Wed, 31 May 2023 13:16:35 -0700 (PDT) From: Sam Edwards X-Google-Original-From: Sam Edwards To: u-boot@lists.denx.de, Andre Przywara Cc: Jagan Teki , Sam Edwards Subject: [PATCH] sunxi: psci: remove redundant initialization from psci_arch_init Date: Wed, 31 May 2023 14:15:20 -0600 Message-Id: <20230531201520.15479-1-CFSworks@gmail.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The nonsec code overrides/handles these: - Setting PMR to 0xFF happens earlier, in _nonsec_init, so this is redundant. - The NS bit is not yet set: it gets set later in _secure_monitor. Trying to clear it here is pointless and misleading. Signed-off-by: Sam Edwards --- arch/arm/cpu/armv7/sunxi/psci.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c index e1d3638b5c..f866025c37 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.c +++ b/arch/arm/cpu/armv7/sunxi/psci.c @@ -300,14 +300,10 @@ void __secure psci_arch_init(void) /* Set SGI15 priority to 0 */ writeb(0, GICD_BASE + GICD_IPRIORITYRn + 15); - /* Be cool with non-secure */ - writel(0xff, GICC_BASE + GICC_PMR); - /* Switch FIQEn on */ setbits_le32(GICC_BASE + GICC_CTLR, BIT(3)); reg = cp15_read_scr(); reg |= BIT(2); /* Enable FIQ in monitor mode */ - reg &= ~BIT(0); /* Secure mode */ cp15_write_scr(reg); }