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Cc: Jeff Law , Denis Chertykov X-Spam-Status: No, score=-9.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_LOW, SPF_HELO_PASS, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" This patch removes the superfluous parallel in [u]divmod patterns in the AVR backend. Effect of extra parallel is that add_clobbers reaches gcc_unreachable() because the clobbers for [u]divmod are missing. The parallel around the parts of an insn pattern is implicit if it has multiple parts like clobbers, so extra parallel should be removed. Ok to apply? Johann --- gcc/ PR target/105753 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi): Remove superfluous "parallel" in insn pattern. ([u]divmod4): Tidy code. Use gcc_unreachable() instead of printing error text to assembly. gcc/testsuite/ PR target/105753 * gcc.target/avr/torture/pr105753.c: New test. diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index 43b75046384..a79c6824fad 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -3705,17 +3705,17 @@ (define_insn "*mulohisi3_call" ;; CSE has problems to operate on hard regs. ;; (define_insn_and_split "divmodqi4" - [(set (match_operand:QI 0 "pseudo_register_operand" "") - (div:QI (match_operand:QI 1 "pseudo_register_operand" "") - (match_operand:QI 2 "pseudo_register_operand" ""))) - (set (match_operand:QI 3 "pseudo_register_operand" "") + [(set (match_operand:QI 0 "pseudo_register_operand") + (div:QI (match_operand:QI 1 "pseudo_register_operand") + (match_operand:QI 2 "pseudo_register_operand"))) + (set (match_operand:QI 3 "pseudo_register_operand") (mod:QI (match_dup 1) (match_dup 2))) (clobber (reg:QI 22)) (clobber (reg:QI 23)) (clobber (reg:QI 24)) (clobber (reg:QI 25))] "" - "this divmodqi4 pattern should have been splitted;" + { gcc_unreachable(); } "" [(set (reg:QI 24) (match_dup 1)) (set (reg:QI 22) (match_dup 2)) @@ -3751,17 +3751,17 @@ (define_insn "*divmodqi4_call" [(set_attr "type" "xcall")]) (define_insn_and_split "udivmodqi4" - [(set (match_operand:QI 0 "pseudo_register_operand" "") - (udiv:QI (match_operand:QI 1 "pseudo_register_operand" "") - (match_operand:QI 2 "pseudo_register_operand" ""))) - (set (match_operand:QI 3 "pseudo_register_operand" "") - (umod:QI (match_dup 1) (match_dup 2))) - (clobber (reg:QI 22)) - (clobber (reg:QI 23)) - (clobber (reg:QI 24)) - (clobber (reg:QI 25))] - "" - "this udivmodqi4 pattern should have been splitted;" + [(set (match_operand:QI 0 "pseudo_register_operand") + (udiv:QI (match_operand:QI 1 "pseudo_register_operand") + (match_operand:QI 2 "pseudo_register_operand"))) + (set (match_operand:QI 3 "pseudo_register_operand") + (umod:QI (match_dup 1) (match_dup 2))) + (clobber (reg:QI 22)) + (clobber (reg:QI 23)) + (clobber (reg:QI 24)) + (clobber (reg:QI 25))] + "" + { gcc_unreachable(); } "" [(set (reg:QI 24) (match_dup 1)) (set (reg:QI 22) (match_dup 2)) @@ -3793,17 +3793,17 @@ (define_insn "*udivmodqi4_call" [(set_attr "type" "xcall")]) (define_insn_and_split "divmodhi4" - [(set (match_operand:HI 0 "pseudo_register_operand" "") - (div:HI (match_operand:HI 1 "pseudo_register_operand" "") - (match_operand:HI 2 "pseudo_register_operand" ""))) - (set (match_operand:HI 3 "pseudo_register_operand" "") + [(set (match_operand:HI 0 "pseudo_register_operand") + (div:HI (match_operand:HI 1 "pseudo_register_operand") + (match_operand:HI 2 "pseudo_register_operand"))) + (set (match_operand:HI 3 "pseudo_register_operand") (mod:HI (match_dup 1) (match_dup 2))) (clobber (reg:QI 21)) (clobber (reg:HI 22)) (clobber (reg:HI 24)) (clobber (reg:HI 26))] "" - "this should have been splitted;" + { gcc_unreachable(); } "" [(set (reg:HI 24) (match_dup 1)) (set (reg:HI 22) (match_dup 2)) @@ -3839,17 +3839,17 @@ (define_insn "*divmodhi4_call" [(set_attr "type" "xcall")]) (define_insn_and_split "udivmodhi4" - [(set (match_operand:HI 0 "pseudo_register_operand" "") - (udiv:HI (match_operand:HI 1 "pseudo_register_operand" "") - (match_operand:HI 2 "pseudo_register_operand" ""))) - (set (match_operand:HI 3 "pseudo_register_operand" "") + [(set (match_operand:HI 0 "pseudo_register_operand") + (udiv:HI (match_operand:HI 1 "pseudo_register_operand") + (match_operand:HI 2 "pseudo_register_operand"))) + (set (match_operand:HI 3 "pseudo_register_operand") (umod:HI (match_dup 1) (match_dup 2))) (clobber (reg:QI 21)) (clobber (reg:HI 22)) (clobber (reg:HI 24)) (clobber (reg:HI 26))] "" - "this udivmodhi4 pattern should have been splitted.;" + { gcc_unreachable(); } "" [(set (reg:HI 24) (match_dup 1)) (set (reg:HI 22) (match_dup 2)) @@ -4090,14 +4090,14 @@ (define_insn "*mulpsi3.libgcc" ;; implementation works the other way round. (define_insn_and_split "divmodpsi4" - [(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "") - (div:PSI (match_operand:PSI 1 "pseudo_register_operand" "") - (match_operand:PSI 2 "pseudo_register_operand" ""))) - (set (match_operand:PSI 3 "pseudo_register_operand" "") - (mod:PSI (match_dup 1) - (match_dup 2))) - (clobber (reg:DI 18)) - (clobber (reg:QI 26))])] + [(set (match_operand:PSI 0 "pseudo_register_operand") + (div:PSI (match_operand:PSI 1 "pseudo_register_operand") + (match_operand:PSI 2 "pseudo_register_operand"))) + (set (match_operand:PSI 3 "pseudo_register_operand") + (mod:PSI (match_dup 1) + (match_dup 2))) + (clobber (reg:DI 18)) + (clobber (reg:QI 26))] "" { gcc_unreachable(); } "" @@ -4139,14 +4139,14 @@ (define_insn "*divmodpsi4_call" [(set_attr "type" "xcall")]) (define_insn_and_split "udivmodpsi4" - [(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "") - (udiv:PSI (match_operand:PSI 1 "pseudo_register_operand" "") - (match_operand:PSI 2 "pseudo_register_operand" ""))) - (set (match_operand:PSI 3 "pseudo_register_operand" "") - (umod:PSI (match_dup 1) - (match_dup 2))) - (clobber (reg:DI 18)) - (clobber (reg:QI 26))])] + [(set (match_operand:PSI 0 "pseudo_register_operand") + (udiv:PSI (match_operand:PSI 1 "pseudo_register_operand") + (match_operand:PSI 2 "pseudo_register_operand"))) + (set (match_operand:PSI 3 "pseudo_register_operand") + (umod:PSI (match_dup 1) + (match_dup 2))) + (clobber (reg:DI 18)) + (clobber (reg:QI 26))] "" { gcc_unreachable(); } "" @@ -4190,17 +4190,18 @@ (define_insn "*udivmodpsi4_call" ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; (define_insn_and_split "divmodsi4" - [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "") - (div:SI (match_operand:SI 1 "pseudo_register_operand" "") - (match_operand:SI 2 "pseudo_register_operand" ""))) - (set (match_operand:SI 3 "pseudo_register_operand" "") - (mod:SI (match_dup 1) (match_dup 2))) - (clobber (reg:SI 18)) - (clobber (reg:SI 22)) - (clobber (reg:HI 26)) - (clobber (reg:HI 30))])] + [(set (match_operand:SI 0 "pseudo_register_operand") + (div:SI (match_operand:SI 1 "pseudo_register_operand") + (match_operand:SI 2 "pseudo_register_operand"))) + (set (match_operand:SI 3 "pseudo_register_operand") + (mod:SI (match_dup 1) + (match_dup 2))) + (clobber (reg:SI 18)) + (clobber (reg:SI 22)) + (clobber (reg:HI 26)) + (clobber (reg:HI 30))] "" - "this divmodsi4 pattern should have been splitted;" + { gcc_unreachable(); } "" [(set (reg:SI 22) (match_dup 1)) (set (reg:SI 18) (match_dup 2)) @@ -4236,17 +4237,18 @@ (define_insn "*divmodsi4_call" [(set_attr "type" "xcall")]) (define_insn_and_split "udivmodsi4" - [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "") - (udiv:SI (match_operand:SI 1 "pseudo_register_operand" "") - (match_operand:SI 2 "pseudo_register_operand" ""))) - (set (match_operand:SI 3 "pseudo_register_operand" "") - (umod:SI (match_dup 1) (match_dup 2))) - (clobber (reg:SI 18)) - (clobber (reg:SI 22)) - (clobber (reg:HI 26)) - (clobber (reg:HI 30))])] + [(set (match_operand:SI 0 "pseudo_register_operand") + (udiv:SI (match_operand:SI 1 "pseudo_register_operand") + (match_operand:SI 2 "pseudo_register_operand"))) + (set (match_operand:SI 3 "pseudo_register_operand") + (umod:SI (match_dup 1) + (match_dup 2))) + (clobber (reg:SI 18)) + (clobber (reg:SI 22)) + (clobber (reg:HI 26)) + (clobber (reg:HI 30))] "" - "this udivmodsi4 pattern should have been splitted;" + { gcc_unreachable(); } "" [(set (reg:SI 22) (match_dup 1)) (set (reg:SI 18) (match_dup 2)) diff --git a/gcc/testsuite/gcc.target/avr/torture/pr105753.c b/gcc/testsuite/gcc.target/avr/torture/pr105753.c new file mode 100644 index 00000000000..7d7cea1de7a --- /dev/null +++ b/gcc/testsuite/gcc.target/avr/torture/pr105753.c @@ -0,0 +1,13 @@ +int digit_sum (unsigned long n) +{ + int sum = 0; + + do + { + int x = n % 10; + n /= 10; + sum += x; + } while(n); + + return sum; +}