From patchwork Fri Mar 23 16:36:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 890058 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-475380-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=foss.arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="cc3y5gF1"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4078MN6F2Vz9s0v for ; Sat, 24 Mar 2018 03:37:03 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; q= dns; s=default; b=yuUBVhwQJgmrrA6M84cXBcNRrQG/AVa0LjzsNmLoEmkLoG 3yUkKKQBpF9Yd/7S94knR7IcATrs7mp3tWTJXTjNM0FOss75PVDSSN+adJt6aV7A XYhTMlVAX/twNk+GOP38KZu7kAf6vKwS8mTw6DzaxNa/oLnJBVYA1/fwcmOTU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; s= default; bh=ypPLr1/r/Lg3HLJ0XyVaUVS4Tjs=; b=cc3y5gF1GIbJgH442iH2 2vMcr9kmiTwLrxkPfBLQob3R/P1cI593vhmQahW2POGtlpcrvEzo+t2TuBoKT+s5 JYHHyKDLsm4Ngkw1XOCN6Yi9sFZR+pTyeMq8gq4n9hfiuJRBhZQzaRovtrbtJ9/3 JBW8lY65ayx6tFpL9mAC8s0= Received: (qmail 32905 invoked by alias); 23 Mar 2018 16:36:56 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 32895 invoked by uid 89); 23 Mar 2018 16:36:56 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=kyrylotkachovarmcom, assemble, kyrylo, kyrylo.tkachov@arm.com X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 23 Mar 2018 16:36:54 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 074411529 for ; Fri, 23 Mar 2018 09:36:53 -0700 (PDT) Received: from [10.2.207.77] (e100706-lin.cambridge.arm.com [10.2.207.77]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9F07D3F487 for ; Fri, 23 Mar 2018 09:36:52 -0700 (PDT) Message-ID: <5AB52D22.3060104@foss.arm.com> Date: Fri, 23 Mar 2018 16:36:50 +0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" Subject: [PATCH][arm] PR target/85026: Fix ldrsh length estimate in Thumb state Hi all, This bug has been reported against GCC 7.3.0 but it is latent in all release branches and on trunk. We underestimate the length of the LRSH instruction in Thumb state. Unlike other load instructions LDRSH can be encoded in 16 bits only when using a register offset. In the testcase we have "ldrsh r2, [r4]" being assigned a length of 2, which is wrong. So we don't calculate branch ranges properly and cause the assembler error. The fix is to make the unaligned_loadhis insn similar to the *arm_extendqihi_insn insn that outputs an LDRSB. Just remove the wrong 2-byte alternative. I don't think this is worth inventing a new "register-offset-only" constraint. This also makes the patch safer for backporting. Bootstrapped and tested on arm-none-linux-gnueabihf. Committing to trunk and the branches after some soaking time. Thanks, Kyrill 2018-03-23 Kyrylo Tkachov PR target/85026 * config/arm/arm.md (unaligned_loadhis): Remove first alternative. Clean up attributes. 2018-03-23 Kyrylo Tkachov PR target/85026 * g++.dg/pr85026.C: New test. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index f9365cd..ad5f387 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -4498,16 +4498,13 @@ (define_insn "unaligned_loadsi" (set_attr "type" "load1")]) (define_insn "unaligned_loadhis" - [(set (match_operand:SI 0 "s_register_operand" "=l,r") + [(set (match_operand:SI 0 "s_register_operand" "=r") (sign_extend:SI - (unspec:HI [(match_operand:HI 1 "memory_operand" "Uw,Uh")] + (unspec:HI [(match_operand:HI 1 "memory_operand" "Uh")] UNSPEC_UNALIGNED_LOAD)))] "unaligned_access" "ldrsh%?\t%0, %1\t@ unaligned" - [(set_attr "arch" "t2,any") - (set_attr "length" "2,4") - (set_attr "predicable" "yes") - (set_attr "predicable_short_it" "yes,no") + [(set_attr "predicable" "yes") (set_attr "type" "load_byte")]) (define_insn "unaligned_loadhiu" diff --git a/gcc/testsuite/g++.dg/pr85026.C b/gcc/testsuite/g++.dg/pr85026.C new file mode 100644 index 0000000..e1e3ccd --- /dev/null +++ b/gcc/testsuite/g++.dg/pr85026.C @@ -0,0 +1,61 @@ +/* PR target/85026. */ +/* { dg-do assemble } */ +/* { dg-options "-O2 -std=gnu++11" } */ + +template class a; +class b; +struct c { + typedef a &g; +}; +template struct e { typedef typename d::f iter; }; +class h { +public: + void __attribute__((noreturn)) i(); +} ab; +template class a { +public: + typedef b *f; + b &operator[](unsigned m) { + if (ac) + ab.i(); + return ad[m]; + } + f n() { return ad; } + f m_fn3(); + b *ad; + unsigned ac; +}; +class b { +public: + short j; + short k; + signed l; +} __attribute__((__packed__)); +void o(a &m, b &p2, b &p) { + p2 = p = m[0]; + if (bool at = false) + ; + else + for (c::g au(m);; at = true) + if (bool av = false) + ; + else + for (e>::iter aw = au.n(), ax = au.m_fn3(); ax; + av ? (void)0 : (void)0) + if (bool ay = 0) + ; + else + for (b az = *aw; !ay; ay = true) { + if (p2.j) + p2.j = az.j; + else if (p.j) + p.j = az.j; + if (p2.k) + p2.k = az.k; + else if (az.k > p.k) + p.k = az.k; + if (az.l < p2.l) + if (az.l > p.l) + p.l = az.l; + } +}