From patchwork Fri Apr 21 14:41:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1771985 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=FQFEfi8X; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q2y061QsNz23td for ; Sat, 22 Apr 2023 00:41:41 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 19307385771D for ; Fri, 21 Apr 2023 14:41:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 19307385771D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682088099; bh=pkFwyJJiHWMtio95eAhutLO4QHvpn7fbBioYQAKlulk=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=FQFEfi8X2qg0SKtslzrASTitbblxIDPyxZ7gW5eP14XtC2iz6N2S3gPjdqKUB8BKI 0172eONcxVTS++BFvesVOaNg6TRitDv7SySsqOn8doxKb2e15Satgs+Bkvh30DjErY Y5nzYC5G9XiYTxpH2JEqQHf1TKL2Kx/H6+/ojvxk= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-qv1-xf2a.google.com (mail-qv1-xf2a.google.com [IPv6:2607:f8b0:4864:20::f2a]) by sourceware.org (Postfix) with ESMTPS id 31BB23858C83 for ; Fri, 21 Apr 2023 14:41:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 31BB23858C83 Received: by mail-qv1-xf2a.google.com with SMTP id 6a1803df08f44-5ef51c44141so9880366d6.2 for ; Fri, 21 Apr 2023 07:41:18 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682088077; x=1684680077; h=to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=pkFwyJJiHWMtio95eAhutLO4QHvpn7fbBioYQAKlulk=; b=JfQldqSAd9pJ0iltgJ1OmbJ202PnqLD0gKwtZK/34HSRQic/YfmM0qVLa6iUERC9Hu azPIy+gBa2u48YgksTLAaahTwRolsJ7MxcbdCbyHfSN4WpYjiiPtDf1Cz4+akjEprBhl 9UWkBc0AwHM7yIEeID30cDRRpYy0L6bvqO2rR9FW2mTKtfrHSxf8iAYuwoY6vxt97Xx+ g24BEfj0Mdis39WJruvkPXBzlMj2yGL3puLQOwifiH2REAEwZsSHCLX+PQwQQVRaNhHj 1zrGQxq5IuoDFEKN5fNYqfwxubdZimlGlSjjhlqJYivd8ctxCg+gQWhB7JQka4Ow0K6N 3TmQ== X-Gm-Message-State: AAQBX9fcuYQPP8DohjjUHyAHrbEoN+L7Wr7tDEKHYabWEkB23Wmlybxp Xwpcd30vhsRyE9W2mFqwxWWklkO4BQncjzajSqhdv/gvf8brJA== X-Google-Smtp-Source: AKy350Z4D8CXiUlxGQyXAVj3ycApBsYE+hl6tVA0SK0XJpVHxI0/0+f1anhfBQkQcRuNrh6B+NGztuGJeLR2jWmNtLo= X-Received: by 2002:a05:6214:528e:b0:5ef:8004:e0b4 with SMTP id kj14-20020a056214528e00b005ef8004e0b4mr7809200qvb.48.1682088076872; Fri, 21 Apr 2023 07:41:16 -0700 (PDT) MIME-Version: 1.0 Date: Fri, 21 Apr 2023 16:41:05 +0200 Message-ID: Subject: [PATCH] i386: Remove REG_OK_FOR_INDEX/REG_OK_FOR_BASE and their derivatives To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" x86 was converted to TARGET_LEGITIMATE_ADDRESS_P long ago. Remove remnants of the conversion. Also, cleanup the remaining macros a bit by introducing INDEX_REGNO_P macro. No functional change. gcc/ChangeLog: 2023-04-21 Uroš Bizjak * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove. (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto. (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto. (FIRST_INDEX_REG, LAST_INDEX_REG): New defines. (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros. (INDEX_REG_P, INDEX_REGNO_P): Ditto. (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates. (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro. (EG_OK_FOR_BASE_NONSTRICT_P): Ditto. * config/i386/predicates.md (index_register_operand): Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros. * config/i386/i386.cc (ix86_legitimate_address_p): Use REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P, REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to master. Uros. diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index fbd33a6bfd1..a3db55642e3 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -11035,8 +11035,9 @@ ix86_legitimate_address_p (machine_mode, rtx addr, bool strict) if (reg == NULL_RTX) return false; - if ((strict && ! REG_OK_FOR_BASE_STRICT_P (reg)) - || (! strict && ! REG_OK_FOR_BASE_NONSTRICT_P (reg))) + unsigned int regno = REGNO (reg); + if ((strict && !REGNO_OK_FOR_BASE_P (regno)) + || (!strict && !REGNO_OK_FOR_BASE_NONSTRICT_P (regno))) /* Base is not valid. */ return false; } @@ -11049,8 +11050,9 @@ ix86_legitimate_address_p (machine_mode, rtx addr, bool strict) if (reg == NULL_RTX) return false; - if ((strict && ! REG_OK_FOR_INDEX_STRICT_P (reg)) - || (! strict && ! REG_OK_FOR_INDEX_NONSTRICT_P (reg))) + unsigned int regno = REGNO (reg); + if ((strict && !REGNO_OK_FOR_INDEX_P (regno)) + || (!strict && !REGNO_OK_FOR_INDEX_NONSTRICT_P (regno))) /* Index is not valid. */ return false; } diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 1da6dce8e0b..c7439f89bdf 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -1166,6 +1166,9 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); #define FIRST_INT_REG AX_REG #define LAST_INT_REG SP_REG +#define FIRST_INDEX_REG AX_REG +#define LAST_INDEX_REG BP_REG + #define FIRST_QI_REG AX_REG #define LAST_QI_REG BX_REG @@ -1404,7 +1407,11 @@ enum reg_class #define QI_REGNO_P(N) IN_RANGE ((N), FIRST_QI_REG, LAST_QI_REG) #define LEGACY_INT_REG_P(X) (REG_P (X) && LEGACY_INT_REGNO_P (REGNO (X))) -#define LEGACY_INT_REGNO_P(N) (IN_RANGE ((N), FIRST_INT_REG, LAST_INT_REG)) +#define LEGACY_INT_REGNO_P(N) IN_RANGE ((N), FIRST_INT_REG, LAST_INT_REG) + +#define LEGACY_INDEX_REG_P(X) (REG_P (X) && LEGACY_INDEX_REGNO_P (REGNO (X))) +#define LEGACY_INDEX_REGNO_P(N) \ + IN_RANGE ((N), FIRST_INDEX_REG, LAST_INDEX_REG) #define REX_INT_REG_P(X) (REG_P (X) && REX_INT_REGNO_P (REGNO (X))) #define REX_INT_REGNO_P(N) \ @@ -1414,6 +1421,10 @@ enum reg_class #define GENERAL_REGNO_P(N) \ (LEGACY_INT_REGNO_P (N) || REX_INT_REGNO_P (N)) +#define INDEX_REG_P(X) (REG_P (X) && INDEX_REGNO_P (REGNO (X))) +#define INDEX_REGNO_P(N) \ + (LEGACY_INDEX_REGNO_P (N) || REX_INT_REGNO_P (N)) + #define ANY_QI_REG_P(X) (REG_P (X) && ANY_QI_REGNO_P (REGNO (X))) #define ANY_QI_REGNO_P(N) \ (TARGET_64BIT ? GENERAL_REGNO_P (N) : QI_REGNO_P (N)) @@ -1678,56 +1689,26 @@ typedef struct ix86_args { has been allocated, which happens in reginfo.cc during register allocation. */ -#define REGNO_OK_FOR_INDEX_P(REGNO) \ - ((REGNO) < STACK_POINTER_REGNUM \ - || REX_INT_REGNO_P (REGNO) \ - || (unsigned) reg_renumber[(REGNO)] < STACK_POINTER_REGNUM \ - || REX_INT_REGNO_P ((unsigned) reg_renumber[(REGNO)])) +#define REGNO_OK_FOR_INDEX_P(REGNO) \ + (INDEX_REGNO_P (REGNO) \ + || INDEX_REGNO_P (reg_renumber[(REGNO)])) -#define REGNO_OK_FOR_BASE_P(REGNO) \ +#define REGNO_OK_FOR_BASE_P(REGNO) \ (GENERAL_REGNO_P (REGNO) \ || (REGNO) == ARG_POINTER_REGNUM \ || (REGNO) == FRAME_POINTER_REGNUM \ - || GENERAL_REGNO_P ((unsigned) reg_renumber[(REGNO)])) - -/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx - and check its validity for a certain class. - We have two alternate definitions for each of them. - The usual definition accepts all pseudo regs; the other rejects - them unless they have been allocated suitable hard regs. - The symbol REG_OK_STRICT causes the latter definition to be used. - - Most source files want to accept pseudo regs in the hope that - they will get allocated to the class that the insn wants them to be in. - Source files for reload pass need to be strict. - After reload, it makes no difference, since pseudo regs have - been eliminated by then. */ - + || GENERAL_REGNO_P (reg_renumber[(REGNO)])) /* Non strict versions, pseudos are ok. */ -#define REG_OK_FOR_INDEX_NONSTRICT_P(X) \ - (REGNO (X) < STACK_POINTER_REGNUM \ - || REX_INT_REGNO_P (REGNO (X)) \ - || REGNO (X) >= FIRST_PSEUDO_REGISTER) +#define REGNO_OK_FOR_INDEX_NONSTRICT_P(REGNO) \ + (INDEX_REGNO_P (REGNO) \ + || !HARD_REGISTER_NUM_P (REGNO)) -#define REG_OK_FOR_BASE_NONSTRICT_P(X) \ - (GENERAL_REGNO_P (REGNO (X)) \ - || REGNO (X) == ARG_POINTER_REGNUM \ - || REGNO (X) == FRAME_POINTER_REGNUM \ - || REGNO (X) >= FIRST_PSEUDO_REGISTER) - -/* Strict versions, hard registers only */ -#define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) -#define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) - -#ifndef REG_OK_STRICT -#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X) -#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X) - -#else -#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X) -#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X) -#endif +#define REGNO_OK_FOR_BASE_NONSTRICT_P(REGNO) \ + (GENERAL_REGNO_P (REGNO) \ + || (REGNO) == ARG_POINTER_REGNUM \ + || (REGNO) == FRAME_POINTER_REGNUM \ + || !HARD_REGISTER_NUM_P (REGNO)) /* TARGET_LEGITIMATE_ADDRESS_P recognizes an RTL expression that is a valid memory address for an instruction. diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index e752e20dc73..91400d7d8fb 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -728,10 +728,11 @@ (define_predicate "index_register_operand" if (SUBREG_P (op)) op = SUBREG_REG (op); + unsigned int regno = REGNO (op); if (reload_completed) - return REG_OK_FOR_INDEX_STRICT_P (op); + return REGNO_OK_FOR_INDEX_P (regno); else - return REG_OK_FOR_INDEX_NONSTRICT_P (op); + return REGNO_OK_FOR_INDEX_NONSTRICT_P (regno); }) ;; Return false if this is any eliminable register. Otherwise general_operand.