From patchwork Fri Apr 21 00:41:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Liang X-Patchwork-Id: 1771637 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q2bM35gbnz1ybF for ; Fri, 21 Apr 2023 10:41:51 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0EE7C85DEA; Fri, 21 Apr 2023 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smtp.mailfrom=ycliang@andestech.com Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 33L0fS8W048710; Fri, 21 Apr 2023 08:41:28 +0800 (+08) (envelope-from ycliang@andestech.com) Received: from ubuntu01 (10.0.12.75) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Fri, 21 Apr 2023 08:41:28 +0800 Date: Fri, 21 Apr 2023 00:41:14 +0000 From: Leo Liang To: CC: , , Subject: [PULL] u-boot-riscv/master Message-ID: MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/2.0.5 (2021-01-21) X-Originating-IP: [10.0.12.75] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 33L0fS8W048710 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Hi Tom, The following changes since commit 5db4972a5bbdbf9e3af48ffc9bc4fec73b7b6a79: Merge tag 'u-boot-nand-20230417' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash (2023-04-17 10:47:33 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 04d16be55404ee07134b4171dea37eff9ad8fa5a: riscv: Support CONFIG_REMAKE_ELF (2023-04-20 20:45:08 +0800) CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/16065 ---------------------------------------------------------------- * Add StarFive VisionFive v2 Board support * Support CONFIG_REMAKE_ELF * Code cleanups for RISC-V architecture ---------------------------------------------------------------- Bin Meng (11): riscv: Correct a comment in io.h riscv: Enforce DWARF4 output riscv: Optimize source end address calculation in start.S riscv: Optimize loading relocation type tools: prelink-riscv: Cosmetic style fixes tools: prelink-riscv: Unmap the ELF image when done makefile: riscv: Drop useless argument of prelink-riscv riscv: Change to use positive offset to access relocation entries riscv: Avoid updating the link register riscv: spl: Remove relocation sections riscv: Update alignment for some sections in linker scripts Jianlong Huang (1): dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions Kuan Lim Lee (1): pinctrl: starfive: Add StarFive JH7110 driver Samuel Holland (1): riscv: Support CONFIG_REMAKE_ELF Yanhong Wang (15): riscv: cpu: jh7110: Add support for jh7110 SoC cache: starfive: Add StarFive JH7110 support dt-bindings: reset: Add StarFive JH7110 reset definitions reset: starfive: jh7110: Add reset driver for StarFive JH7110 SoC dt-bindings: clock: Add StarFive JH7110 clock definitions clk: starfive: Add StarFive JH7110 clock driver ram: starfive: add ddr driver board: starfive: add StarFive VisionFive v2 board support riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoC board: starfive: Add Kconfig for StarFive VisionFive v2 Board board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to Kconfig riscv: dts: jh7110: Add initial StarFive JH7110 device tree riscv: dts: jh7110: Add initial u-boot device tree riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree configs: starfive: add starfive_visionfive2_defconfig Makefile | 2 +- arch/riscv/Kconfig | 5 + arch/riscv/config.mk | 5 +- arch/riscv/cpu/jh7110/Kconfig | 28 ++ arch/riscv/cpu/jh7110/Makefile | 10 + arch/riscv/cpu/jh7110/cpu.c | 23 ++ arch/riscv/cpu/jh7110/dram.c | 38 +++ arch/riscv/cpu/jh7110/spl.c | 64 ++++ arch/riscv/cpu/start.S | 28 +- arch/riscv/cpu/u-boot-spl.lds | 27 +- arch/riscv/cpu/u-boot.lds | 6 +- arch/riscv/dts/Makefile | 3 +- arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi | 69 ++++ arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts | 12 + arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi | 69 ++++ arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts | 12 + arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi | 319 +++++++++++++++++++ arch/riscv/dts/jh7110-u-boot.dtsi | 99 ++++++ arch/riscv/dts/jh7110.dtsi | 573 +++++++++++++++++++++++++++++++++ arch/riscv/include/asm/arch-jh7110/regs.h | 19 ++ arch/riscv/include/asm/arch-jh7110/spl.h | 12 + arch/riscv/include/asm/io.h | 2 +- board/starfive/visionfive2/Kconfig | 53 ++++ board/starfive/visionfive2/MAINTAINERS | 7 + board/starfive/visionfive2/Makefile | 7 + board/starfive/visionfive2/spl.c | 87 +++++ board/starfive/visionfive2/starfive_visionfive2.c | 40 +++ configs/starfive_visionfive2_defconfig | 79 +++++ doc/board/index.rst | 1 + doc/board/starfive/index.rst | 9 + doc/board/starfive/visionfive2.rst | 492 +++++++++++++++++++++++++++++ drivers/cache/cache-sifive-ccache.c | 1 + drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/starfive/Kconfig | 17 + drivers/clk/starfive/Makefile | 4 + drivers/clk/starfive/clk-jh7110-pll.c | 321 +++++++++++++++++++ drivers/clk/starfive/clk-jh7110.c | 603 +++++++++++++++++++++++++++++++++++ drivers/clk/starfive/clk.h | 57 ++++ drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/starfive/Kconfig | 28 ++ drivers/pinctrl/starfive/Makefile | 6 + drivers/pinctrl/starfive/pinctrl-jh7110-aon.c | 113 +++++++ drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 399 +++++++++++++++++++++++ drivers/pinctrl/starfive/pinctrl-starfive.c | 398 +++++++++++++++++++++++ drivers/pinctrl/starfive/pinctrl-starfive.h | 55 ++++ drivers/ram/Kconfig | 1 + drivers/ram/Makefile | 4 +- drivers/ram/starfive/Kconfig | 5 + drivers/ram/starfive/Makefile | 11 + drivers/ram/starfive/ddrcsr_boot.c | 339 ++++++++++++++++++++ drivers/ram/starfive/ddrphy_start.c | 279 ++++++++++++++++ drivers/ram/starfive/ddrphy_train.c | 383 ++++++++++++++++++++++ drivers/ram/starfive/ddrphy_utils.c | 1955 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/ram/starfive/starfive_ddr.c | 161 ++++++++++ drivers/ram/starfive/starfive_ddr.h | 65 ++++ drivers/reset/Kconfig | 16 + drivers/reset/Makefile | 1 + drivers/reset/reset-jh7110.c | 158 ++++++++++ include/configs/starfive-visionfive2.h | 49 +++ include/dt-bindings/clock/starfive,jh7110-crg.h | 257 +++++++++++++++ include/dt-bindings/pinctrl/pinctrl-starfive-jh7110.h | 427 +++++++++++++++++++++++++ include/dt-bindings/reset/starfive,jh7110-crg.h | 183 +++++++++++ tools/prelink-riscv.c | 2 + tools/prelink-riscv.inc | 12 +- 66 files changed, 8456 insertions(+), 58 deletions(-) create mode 100644 arch/riscv/cpu/jh7110/Kconfig create mode 100644 arch/riscv/cpu/jh7110/Makefile create mode 100644 arch/riscv/cpu/jh7110/cpu.c create mode 100644 arch/riscv/cpu/jh7110/dram.c create mode 100644 arch/riscv/cpu/jh7110/spl.c create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi create mode 100644 arch/riscv/dts/jh7110-u-boot.dtsi create mode 100644 arch/riscv/dts/jh7110.dtsi create mode 100644 arch/riscv/include/asm/arch-jh7110/regs.h create mode 100644 arch/riscv/include/asm/arch-jh7110/spl.h create mode 100644 board/starfive/visionfive2/Kconfig create mode 100644 board/starfive/visionfive2/MAINTAINERS create mode 100644 board/starfive/visionfive2/Makefile create mode 100644 board/starfive/visionfive2/spl.c create mode 100644 board/starfive/visionfive2/starfive_visionfive2.c create mode 100644 configs/starfive_visionfive2_defconfig create mode 100644 doc/board/starfive/index.rst create mode 100644 doc/board/starfive/visionfive2.rst create mode 100644 drivers/clk/starfive/Kconfig create mode 100644 drivers/clk/starfive/Makefile create mode 100644 drivers/clk/starfive/clk-jh7110-pll.c create mode 100644 drivers/clk/starfive/clk-jh7110.c create mode 100644 drivers/clk/starfive/clk.h create mode 100644 drivers/pinctrl/starfive/Kconfig create mode 100644 drivers/pinctrl/starfive/Makefile create mode 100644 drivers/pinctrl/starfive/pinctrl-jh7110-aon.c create mode 100644 drivers/pinctrl/starfive/pinctrl-jh7110-sys.c create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive.c create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive.h create mode 100644 drivers/ram/starfive/Kconfig create mode 100644 drivers/ram/starfive/Makefile create mode 100644 drivers/ram/starfive/ddrcsr_boot.c create mode 100644 drivers/ram/starfive/ddrphy_start.c create mode 100644 drivers/ram/starfive/ddrphy_train.c create mode 100644 drivers/ram/starfive/ddrphy_utils.c create mode 100644 drivers/ram/starfive/starfive_ddr.c create mode 100644 drivers/ram/starfive/starfive_ddr.h create mode 100644 drivers/reset/reset-jh7110.c create mode 100644 include/configs/starfive-visionfive2.h create mode 100644 include/dt-bindings/clock/starfive,jh7110-crg.h create mode 100644 include/dt-bindings/pinctrl/pinctrl-starfive-jh7110.h create mode 100644 include/dt-bindings/reset/starfive,jh7110-crg.h Best regards, Leo