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Fri, 17 Mar 2023 22:35:13 +0000 (GMT) Received: from smtpav02.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0530B58069; Fri, 17 Mar 2023 22:35:13 +0000 (GMT) Received: from [9.211.90.110] (unknown [9.211.90.110]) by smtpav02.dal12v.mail.ibm.com (Postfix) with ESMTP; Fri, 17 Mar 2023 22:35:12 +0000 (GMT) Message-ID: Date: Fri, 17 Mar 2023 17:35:12 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Content-Language: en-US To: GCC Patches Cc: Segher Boessenkool , "Kewen.Lin" , Chip Kerchner Subject: [PATCH] rs6000: Don't ICE when compiling the __builtin_vec_xst_trunc built-in [PR109178] X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: tbAnJgbILcwL67Y1tdsOIyN9lJ80roJi X-Proofpoint-GUID: tbAnJgbILcwL67Y1tdsOIyN9lJ80roJi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-17_17,2023-03-16_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 mlxlogscore=921 clxscore=1015 spamscore=0 suspectscore=0 mlxscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303150002 definitions=main-2303170160 X-Spam-Status: No, score=-10.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Peter Bergner via Gcc-patches From: Peter Bergner Reply-To: Peter Bergner Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" When we expand the __builtin_vec_xst_trunc built-in, we use the wrong mode for the MEM operand which causes an unrecognizable insn ICE. The solution is to use the correct TMODE mode. Is this ok for trunk and gcc12 assuming my bootstraps and regtests show no regressions? Peter gcc/ PR target/109178 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode. gcc/testsuite/ PR target/109178 * gcc.target/powerpc/pr109178.c: New test. diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc index 737a5c42bfb..83c28cd8af3 100644 --- a/gcc/config/rs6000/rs6000-builtin.cc +++ b/gcc/config/rs6000/rs6000-builtin.cc @@ -2933,7 +2933,7 @@ stv_expand_builtin (insn_code icode, rtx *op, rtx addr; if (op[1] == const0_rtx) - addr = gen_rtx_MEM (Pmode, op[2]); + addr = gen_rtx_MEM (tmode, op[2]); else { op[1] = copy_to_mode_reg (Pmode, op[1]); diff --git a/gcc/testsuite/gcc.target/powerpc/pr109178.c b/gcc/testsuite/gcc.target/powerpc/pr109178.c new file mode 100644 index 00000000000..0f6e2d6b2eb --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr109178.c @@ -0,0 +1,13 @@ +/* PR target/109178 */ +/* { dg-require-effective-target int128 } */ +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */ + +/* Verify we do not ICE on the following. */ + +typedef __attribute__ ((altivec (vector__))) signed __int128 v1ti_t; + +void +foo (signed int *dst, v1ti_t src) +{ + __builtin_vec_xst_trunc(src, 0, dst); +}