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Fri, 10 Feb 2023 15:15:18 +0000 (UTC) X-SNPS-Relay: synopsys.com From: Pavel.Kozlov@synopsys.com To: linux-snps-arc@lists.infradead.org Subject: [PATCH] ARC: fix compile time assert fail for the config with PAE40 and 4K pages Date: Fri, 10 Feb 2023 19:15:12 +0400 Message-Id: <20230210151512.4712-1-kozlov@synopsys.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: dWuAJe3FvdST09v50mgKpqPDjcRpKv6Q X-Proofpoint-GUID: dWuAJe3FvdST09v50mgKpqPDjcRpKv6Q X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22 definitions=2023-02-10_09,2023-02-09_03,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_active_cloned_notspam policy=outbound_active_cloned score=0 priorityscore=1501 lowpriorityscore=0 mlxscore=0 bulkscore=0 spamscore=0 adultscore=0 impostorscore=0 mlxlogscore=940 phishscore=0 malwarescore=0 suspectscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302100127 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230210_071527_075634_5F5D3512 X-CRM114-Status: GOOD ( 18.27 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Pavel Kozlov Add support for the configuration with 4K Page Size and enabled ARC_PAE40. Set two-level Page Table to 10:9:12, as with PAE40 a 4k page can settle only 512 entries (with PAE40 size of PTE entry increa [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 SPF_NONE SPF: sender does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-snps-arc@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux on Synopsys ARC Processors List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-snps-arc" Errors-To: linux-snps-arc-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Pavel Kozlov Add support for the configuration with 4K Page Size and enabled ARC_PAE40. Set two-level Page Table to 10:9:12, as with PAE40 a 4k page can settle only 512 entries (with PAE40 size of PTE entry increases from 4 to 8 bytes). In this configuration the Page Table can describe only 31-bit (2Gb) virtual space, but it is not a problem as the ARC MMUv4 supports only 2Gb of virtual address. This patch doesn't affect other configurations. Patch fixes compile time assert fail: include/linux/compiler_types.h:328:45: error: call to '__compiletime_assert_288' declared with attribute error: BUILD_BUG_ON failed: (PTRS_PER_PTE * sizeof(pte_t)) > PAGE_SIZE Reported-by: kernel test robot Signed-off-by: Pavel Kozlov --- Added the same ARC_VADDR_BITS macro name as used in ARCv3 port. The 4K Page Size and enabled PAE configuration was tested on nSIM: load, allocation/free of all memory (low and high), user space tests from glibc test suite (malloc, string). arch/arc/include/asm/pgtable-levels.h | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/arch/arc/include/asm/pgtable-levels.h b/arch/arc/include/asm/pgtable-levels.h index ef68758b69f7..3b6afee9c272 100644 --- a/arch/arc/include/asm/pgtable-levels.h +++ b/arch/arc/include/asm/pgtable-levels.h @@ -42,12 +42,22 @@ * (so 4K page can only have 1K entries: or 10 bits) */ #ifdef CONFIG_ARC_PAGE_SIZE_4K +#ifdef CONFIG_ARC_HAS_PAE40 +/* + * For PAE40 and 4K page size set 10:9:12 Page Table + * (as with PAE40 4k page can only have 512 entries) + * Page Table can describe only 31-bit (2Gb) virtual space + */ +#define PGDIR_SHIFT 21 +#define ARC_VADDR_BITS 31 +#else #define PGDIR_SHIFT 22 +#endif /* CONFIG_ARC_HAS_PAE40 */ #else #define PGDIR_SHIFT 21 -#endif +#endif /* CONFIG_ARC_PAGE_SIZE_4K */ -#endif +#endif /* CONFIG_ARC_HUGEPAGE_16M */ #else /* CONFIG_PGTABLE_LEVELS != 2 */ @@ -67,9 +77,13 @@ #endif /* CONFIG_PGTABLE_LEVELS */ +#ifndef ARC_VADDR_BITS +#define ARC_VADDR_BITS 32 +#endif + #define PGDIR_SIZE BIT(PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE - 1)) -#define PTRS_PER_PGD BIT(32 - PGDIR_SHIFT) +#define PTRS_PER_PGD BIT(ARC_VADDR_BITS - PGDIR_SHIFT) #if CONFIG_PGTABLE_LEVELS > 3 #define PUD_SIZE BIT(PUD_SHIFT)