From patchwork Sun Jan 29 23:32:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6ZKf5bGF5ZOy?= X-Patchwork-Id: 1733666 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4P4nfs1Yz1z23hS for ; Mon, 30 Jan 2023 10:32:49 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0FEF3385840F for ; Sun, 29 Jan 2023 23:32:47 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbg153.qq.com (smtpbg153.qq.com [13.245.218.24]) by sourceware.org (Postfix) with ESMTPS id 528C13858C5F for ; Sun, 29 Jan 2023 23:32:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 528C13858C5F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp80t1675035131t1fdhkdo Received: from server1.localdomain ( [58.60.1.22]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 30 Jan 2023 07:32:10 +0800 (CST) X-QQ-SSF: 01400000002000E0L000B00A0000000 X-QQ-FEAT: CR3LFp2JE4notmkwNjYXMeAC11M6zDOsCiYNLFLgs3DB4eJO+iw7OcScn738m 2MPnTwM4n2Oc9HR+P1PoYLeohpYp0d93KnMVB6WtnhUIRWrNeGz5jWQ+/uh+hvDO1ERpbuM NcFBQGf0tiVLM4pFcmI5O8EWyP+FfLoFQ0lm6Vh7Ftvkpx7hUWQQ4+59idaN99ZCv7FwVnA F5qFbB2hz2iVFab69GwxNEGRewPtoyIc/C1uLNs84Z2ZdSjlO888+vKqohp7Zn2EAOz9DUE XYdhh3+mUCMQ2F6rkSZrT7zOcZOQNBqtT95t5RqbIOMac+E7OuKdx9RLHYYdC4AKPWiKqRd PuZn0jGX3u3OaHqK/bUjsQXdm1R8+u31zVr5f1wgu6MXPqQs50= X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Add vluxei32 C++ intrinsic API testcase Date: Mon, 30 Jan 2023 07:32:09 +0800 Message-Id: <20230129233209.92641-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-0.8 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP, UNWANTED_LANGUAGE_BODY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" From: Ju-Zhe Zhong gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/base/vluxei32-1.C: New test. * g++.target/riscv/rvv/base/vluxei32-2.C: New test. * g++.target/riscv/rvv/base/vluxei32-3.C: New test. * g++.target/riscv/rvv/base/vluxei32_mu-1.C: New test. * g++.target/riscv/rvv/base/vluxei32_mu-2.C: New test. * g++.target/riscv/rvv/base/vluxei32_mu-3.C: New test. * g++.target/riscv/rvv/base/vluxei32_tu-1.C: New test. * g++.target/riscv/rvv/base/vluxei32_tu-2.C: New test. * g++.target/riscv/rvv/base/vluxei32_tu-3.C: New test. * g++.target/riscv/rvv/base/vluxei32_tum-1.C: New test. * g++.target/riscv/rvv/base/vluxei32_tum-2.C: New test. * g++.target/riscv/rvv/base/vluxei32_tum-3.C: New test. * g++.target/riscv/rvv/base/vluxei32_tumu-1.C: New test. * g++.target/riscv/rvv/base/vluxei32_tumu-2.C: New test. * g++.target/riscv/rvv/base/vluxei32_tumu-3.C: New test. --- .../g++.target/riscv/rvv/base/vluxei32-1.C | 608 ++++++++++++++++++ .../g++.target/riscv/rvv/base/vluxei32-2.C | 608 ++++++++++++++++++ .../g++.target/riscv/rvv/base/vluxei32-3.C | 608 ++++++++++++++++++ .../g++.target/riscv/rvv/base/vluxei32_mu-1.C | 307 +++++++++ .../g++.target/riscv/rvv/base/vluxei32_mu-2.C | 307 +++++++++ .../g++.target/riscv/rvv/base/vluxei32_mu-3.C | 307 +++++++++ .../g++.target/riscv/rvv/base/vluxei32_tu-1.C | 307 +++++++++ .../g++.target/riscv/rvv/base/vluxei32_tu-2.C | 307 +++++++++ .../g++.target/riscv/rvv/base/vluxei32_tu-3.C | 307 +++++++++ .../riscv/rvv/base/vluxei32_tum-1.C | 307 +++++++++ .../riscv/rvv/base/vluxei32_tum-2.C | 307 +++++++++ .../riscv/rvv/base/vluxei32_tum-3.C | 307 +++++++++ .../riscv/rvv/base/vluxei32_tumu-1.C | 307 +++++++++ .../riscv/rvv/base/vluxei32_tumu-2.C | 307 +++++++++ .../riscv/rvv/base/vluxei32_tumu-3.C | 307 +++++++++ 15 files changed, 5508 insertions(+) create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-1.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-2.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-3.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-1.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-2.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-3.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-1.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-2.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-3.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-1.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-2.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-3.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-1.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-2.C create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-3.C diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-1.C new file mode 100644 index 00000000000..8003397befd --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-1.C @@ -0,0 +1,608 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32(const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint8mf4_t test___riscv_vluxei32(const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint8mf2_t test___riscv_vluxei32(const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint8m1_t test___riscv_vluxei32(const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint8m2_t test___riscv_vluxei32(const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint16mf4_t test___riscv_vluxei32(const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint16mf2_t test___riscv_vluxei32(const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint16m1_t test___riscv_vluxei32(const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint16m2_t test___riscv_vluxei32(const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint16m4_t test___riscv_vluxei32(const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint32mf2_t test___riscv_vluxei32(const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint32m1_t test___riscv_vluxei32(const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint32m2_t test___riscv_vluxei32(const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint32m4_t test___riscv_vluxei32(const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint32m8_t test___riscv_vluxei32(const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint64m1_t test___riscv_vluxei32(const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint64m2_t test___riscv_vluxei32(const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint64m4_t test___riscv_vluxei32(const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint64m8_t test___riscv_vluxei32(const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint8mf8_t test___riscv_vluxei32(const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint8mf4_t test___riscv_vluxei32(const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint8mf2_t test___riscv_vluxei32(const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint8m1_t test___riscv_vluxei32(const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint8m2_t test___riscv_vluxei32(const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint16mf4_t test___riscv_vluxei32(const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint16mf2_t test___riscv_vluxei32(const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint16m1_t test___riscv_vluxei32(const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint16m2_t test___riscv_vluxei32(const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint16m4_t test___riscv_vluxei32(const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint32mf2_t test___riscv_vluxei32(const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint32m1_t test___riscv_vluxei32(const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint32m2_t test___riscv_vluxei32(const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint32m4_t test___riscv_vluxei32(const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint32m8_t test___riscv_vluxei32(const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint64m1_t test___riscv_vluxei32(const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint64m2_t test___riscv_vluxei32(const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint64m4_t test___riscv_vluxei32(const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vuint64m8_t test___riscv_vluxei32(const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vfloat32mf2_t test___riscv_vluxei32(const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vfloat32m1_t test___riscv_vluxei32(const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vfloat32m2_t test___riscv_vluxei32(const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vfloat32m4_t test___riscv_vluxei32(const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vfloat32m8_t test___riscv_vluxei32(const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vfloat64m1_t test___riscv_vluxei32(const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vfloat64m2_t test___riscv_vluxei32(const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vfloat64m4_t test___riscv_vluxei32(const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vfloat64m8_t test___riscv_vluxei32(const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,vl); +} + + +vint8mf8_t test___riscv_vluxei32(vbool64_t mask,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint8mf4_t test___riscv_vluxei32(vbool32_t mask,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint8mf2_t test___riscv_vluxei32(vbool16_t mask,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint8m1_t test___riscv_vluxei32(vbool8_t mask,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint8m2_t test___riscv_vluxei32(vbool4_t mask,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint16mf4_t test___riscv_vluxei32(vbool64_t mask,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint16mf2_t test___riscv_vluxei32(vbool32_t mask,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint16m1_t test___riscv_vluxei32(vbool16_t mask,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint16m2_t test___riscv_vluxei32(vbool8_t mask,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint16m4_t test___riscv_vluxei32(vbool4_t mask,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint32mf2_t test___riscv_vluxei32(vbool64_t mask,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint32m1_t test___riscv_vluxei32(vbool32_t mask,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint32m2_t test___riscv_vluxei32(vbool16_t mask,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint32m4_t test___riscv_vluxei32(vbool8_t mask,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint32m8_t test___riscv_vluxei32(vbool4_t mask,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint64m1_t test___riscv_vluxei32(vbool64_t mask,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint64m2_t test___riscv_vluxei32(vbool32_t mask,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint64m4_t test___riscv_vluxei32(vbool16_t mask,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vint64m8_t test___riscv_vluxei32(vbool8_t mask,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint8mf8_t test___riscv_vluxei32(vbool64_t mask,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint8mf4_t test___riscv_vluxei32(vbool32_t mask,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint8mf2_t test___riscv_vluxei32(vbool16_t mask,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint8m1_t test___riscv_vluxei32(vbool8_t mask,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint8m2_t test___riscv_vluxei32(vbool4_t mask,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint16mf4_t test___riscv_vluxei32(vbool64_t mask,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint16mf2_t test___riscv_vluxei32(vbool32_t mask,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint16m1_t test___riscv_vluxei32(vbool16_t mask,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint16m2_t test___riscv_vluxei32(vbool8_t mask,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint16m4_t test___riscv_vluxei32(vbool4_t mask,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint32mf2_t test___riscv_vluxei32(vbool64_t mask,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint32m1_t test___riscv_vluxei32(vbool32_t mask,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint32m2_t test___riscv_vluxei32(vbool16_t mask,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint32m4_t test___riscv_vluxei32(vbool8_t mask,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint32m8_t test___riscv_vluxei32(vbool4_t mask,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint64m1_t test___riscv_vluxei32(vbool64_t mask,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint64m2_t test___riscv_vluxei32(vbool32_t mask,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint64m4_t test___riscv_vluxei32(vbool16_t mask,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vuint64m8_t test___riscv_vluxei32(vbool8_t mask,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vfloat32mf2_t test___riscv_vluxei32(vbool64_t mask,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vfloat32m1_t test___riscv_vluxei32(vbool32_t mask,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vfloat32m2_t test___riscv_vluxei32(vbool16_t mask,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vfloat32m4_t test___riscv_vluxei32(vbool8_t mask,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vfloat32m8_t test___riscv_vluxei32(vbool4_t mask,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vfloat64m1_t test___riscv_vluxei32(vbool64_t mask,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vfloat64m2_t test___riscv_vluxei32(vbool32_t mask,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vfloat64m4_t test___riscv_vluxei32(vbool16_t mask,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + +vfloat64m8_t test___riscv_vluxei32(vbool8_t mask,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,vl); +} + + + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-2.C new file mode 100644 index 00000000000..57380cd0f2d --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-2.C @@ -0,0 +1,608 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32(const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint8mf4_t test___riscv_vluxei32(const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint8mf2_t test___riscv_vluxei32(const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint8m1_t test___riscv_vluxei32(const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint8m2_t test___riscv_vluxei32(const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint16mf4_t test___riscv_vluxei32(const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint16mf2_t test___riscv_vluxei32(const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint16m1_t test___riscv_vluxei32(const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint16m2_t test___riscv_vluxei32(const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint16m4_t test___riscv_vluxei32(const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint32mf2_t test___riscv_vluxei32(const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint32m1_t test___riscv_vluxei32(const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint32m2_t test___riscv_vluxei32(const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint32m4_t test___riscv_vluxei32(const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint32m8_t test___riscv_vluxei32(const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint64m1_t test___riscv_vluxei32(const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint64m2_t test___riscv_vluxei32(const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint64m4_t test___riscv_vluxei32(const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint64m8_t test___riscv_vluxei32(const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint8mf8_t test___riscv_vluxei32(const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint8mf4_t test___riscv_vluxei32(const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint8mf2_t test___riscv_vluxei32(const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint8m1_t test___riscv_vluxei32(const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint8m2_t test___riscv_vluxei32(const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint16mf4_t test___riscv_vluxei32(const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint16mf2_t test___riscv_vluxei32(const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint16m1_t test___riscv_vluxei32(const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint16m2_t test___riscv_vluxei32(const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint16m4_t test___riscv_vluxei32(const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint32mf2_t test___riscv_vluxei32(const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint32m1_t test___riscv_vluxei32(const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint32m2_t test___riscv_vluxei32(const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint32m4_t test___riscv_vluxei32(const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint32m8_t test___riscv_vluxei32(const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint64m1_t test___riscv_vluxei32(const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint64m2_t test___riscv_vluxei32(const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint64m4_t test___riscv_vluxei32(const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vuint64m8_t test___riscv_vluxei32(const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vfloat32mf2_t test___riscv_vluxei32(const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vfloat32m1_t test___riscv_vluxei32(const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vfloat32m2_t test___riscv_vluxei32(const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vfloat32m4_t test___riscv_vluxei32(const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vfloat32m8_t test___riscv_vluxei32(const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vfloat64m1_t test___riscv_vluxei32(const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vfloat64m2_t test___riscv_vluxei32(const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vfloat64m4_t test___riscv_vluxei32(const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vfloat64m8_t test___riscv_vluxei32(const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,31); +} + + +vint8mf8_t test___riscv_vluxei32(vbool64_t mask,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint8mf4_t test___riscv_vluxei32(vbool32_t mask,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint8mf2_t test___riscv_vluxei32(vbool16_t mask,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint8m1_t test___riscv_vluxei32(vbool8_t mask,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint8m2_t test___riscv_vluxei32(vbool4_t mask,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint16mf4_t test___riscv_vluxei32(vbool64_t mask,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint16mf2_t test___riscv_vluxei32(vbool32_t mask,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint16m1_t test___riscv_vluxei32(vbool16_t mask,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint16m2_t test___riscv_vluxei32(vbool8_t mask,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint16m4_t test___riscv_vluxei32(vbool4_t mask,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint32mf2_t test___riscv_vluxei32(vbool64_t mask,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint32m1_t test___riscv_vluxei32(vbool32_t mask,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint32m2_t test___riscv_vluxei32(vbool16_t mask,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint32m4_t test___riscv_vluxei32(vbool8_t mask,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint32m8_t test___riscv_vluxei32(vbool4_t mask,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint64m1_t test___riscv_vluxei32(vbool64_t mask,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint64m2_t test___riscv_vluxei32(vbool32_t mask,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint64m4_t test___riscv_vluxei32(vbool16_t mask,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vint64m8_t test___riscv_vluxei32(vbool8_t mask,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint8mf8_t test___riscv_vluxei32(vbool64_t mask,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint8mf4_t test___riscv_vluxei32(vbool32_t mask,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint8mf2_t test___riscv_vluxei32(vbool16_t mask,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint8m1_t test___riscv_vluxei32(vbool8_t mask,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint8m2_t test___riscv_vluxei32(vbool4_t mask,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint16mf4_t test___riscv_vluxei32(vbool64_t mask,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint16mf2_t test___riscv_vluxei32(vbool32_t mask,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint16m1_t test___riscv_vluxei32(vbool16_t mask,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint16m2_t test___riscv_vluxei32(vbool8_t mask,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint16m4_t test___riscv_vluxei32(vbool4_t mask,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint32mf2_t test___riscv_vluxei32(vbool64_t mask,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint32m1_t test___riscv_vluxei32(vbool32_t mask,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint32m2_t test___riscv_vluxei32(vbool16_t mask,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint32m4_t test___riscv_vluxei32(vbool8_t mask,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint32m8_t test___riscv_vluxei32(vbool4_t mask,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint64m1_t test___riscv_vluxei32(vbool64_t mask,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint64m2_t test___riscv_vluxei32(vbool32_t mask,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint64m4_t test___riscv_vluxei32(vbool16_t mask,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vuint64m8_t test___riscv_vluxei32(vbool8_t mask,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vfloat32mf2_t test___riscv_vluxei32(vbool64_t mask,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vfloat32m1_t test___riscv_vluxei32(vbool32_t mask,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vfloat32m2_t test___riscv_vluxei32(vbool16_t mask,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vfloat32m4_t test___riscv_vluxei32(vbool8_t mask,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vfloat32m8_t test___riscv_vluxei32(vbool4_t mask,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vfloat64m1_t test___riscv_vluxei32(vbool64_t mask,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vfloat64m2_t test___riscv_vluxei32(vbool32_t mask,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vfloat64m4_t test___riscv_vluxei32(vbool16_t mask,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + +vfloat64m8_t test___riscv_vluxei32(vbool8_t mask,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,31); +} + + + +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-3.C new file mode 100644 index 00000000000..be9a27ee5c1 --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32-3.C @@ -0,0 +1,608 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32(const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint8mf4_t test___riscv_vluxei32(const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint8mf2_t test___riscv_vluxei32(const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint8m1_t test___riscv_vluxei32(const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint8m2_t test___riscv_vluxei32(const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint16mf4_t test___riscv_vluxei32(const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint16mf2_t test___riscv_vluxei32(const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint16m1_t test___riscv_vluxei32(const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint16m2_t test___riscv_vluxei32(const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint16m4_t test___riscv_vluxei32(const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint32mf2_t test___riscv_vluxei32(const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint32m1_t test___riscv_vluxei32(const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint32m2_t test___riscv_vluxei32(const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint32m4_t test___riscv_vluxei32(const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint32m8_t test___riscv_vluxei32(const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint64m1_t test___riscv_vluxei32(const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint64m2_t test___riscv_vluxei32(const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint64m4_t test___riscv_vluxei32(const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint64m8_t test___riscv_vluxei32(const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint8mf8_t test___riscv_vluxei32(const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint8mf4_t test___riscv_vluxei32(const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint8mf2_t test___riscv_vluxei32(const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint8m1_t test___riscv_vluxei32(const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint8m2_t test___riscv_vluxei32(const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint16mf4_t test___riscv_vluxei32(const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint16mf2_t test___riscv_vluxei32(const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint16m1_t test___riscv_vluxei32(const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint16m2_t test___riscv_vluxei32(const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint16m4_t test___riscv_vluxei32(const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint32mf2_t test___riscv_vluxei32(const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint32m1_t test___riscv_vluxei32(const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint32m2_t test___riscv_vluxei32(const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint32m4_t test___riscv_vluxei32(const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint32m8_t test___riscv_vluxei32(const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint64m1_t test___riscv_vluxei32(const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint64m2_t test___riscv_vluxei32(const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint64m4_t test___riscv_vluxei32(const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vuint64m8_t test___riscv_vluxei32(const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vfloat32mf2_t test___riscv_vluxei32(const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vfloat32m1_t test___riscv_vluxei32(const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vfloat32m2_t test___riscv_vluxei32(const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vfloat32m4_t test___riscv_vluxei32(const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vfloat32m8_t test___riscv_vluxei32(const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vfloat64m1_t test___riscv_vluxei32(const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vfloat64m2_t test___riscv_vluxei32(const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vfloat64m4_t test___riscv_vluxei32(const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vfloat64m8_t test___riscv_vluxei32(const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(base,bindex,32); +} + + +vint8mf8_t test___riscv_vluxei32(vbool64_t mask,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint8mf4_t test___riscv_vluxei32(vbool32_t mask,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint8mf2_t test___riscv_vluxei32(vbool16_t mask,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint8m1_t test___riscv_vluxei32(vbool8_t mask,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint8m2_t test___riscv_vluxei32(vbool4_t mask,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint16mf4_t test___riscv_vluxei32(vbool64_t mask,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint16mf2_t test___riscv_vluxei32(vbool32_t mask,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint16m1_t test___riscv_vluxei32(vbool16_t mask,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint16m2_t test___riscv_vluxei32(vbool8_t mask,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint16m4_t test___riscv_vluxei32(vbool4_t mask,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint32mf2_t test___riscv_vluxei32(vbool64_t mask,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint32m1_t test___riscv_vluxei32(vbool32_t mask,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint32m2_t test___riscv_vluxei32(vbool16_t mask,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint32m4_t test___riscv_vluxei32(vbool8_t mask,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint32m8_t test___riscv_vluxei32(vbool4_t mask,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint64m1_t test___riscv_vluxei32(vbool64_t mask,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint64m2_t test___riscv_vluxei32(vbool32_t mask,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint64m4_t test___riscv_vluxei32(vbool16_t mask,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vint64m8_t test___riscv_vluxei32(vbool8_t mask,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint8mf8_t test___riscv_vluxei32(vbool64_t mask,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint8mf4_t test___riscv_vluxei32(vbool32_t mask,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint8mf2_t test___riscv_vluxei32(vbool16_t mask,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint8m1_t test___riscv_vluxei32(vbool8_t mask,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint8m2_t test___riscv_vluxei32(vbool4_t mask,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint16mf4_t test___riscv_vluxei32(vbool64_t mask,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint16mf2_t test___riscv_vluxei32(vbool32_t mask,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint16m1_t test___riscv_vluxei32(vbool16_t mask,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint16m2_t test___riscv_vluxei32(vbool8_t mask,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint16m4_t test___riscv_vluxei32(vbool4_t mask,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint32mf2_t test___riscv_vluxei32(vbool64_t mask,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint32m1_t test___riscv_vluxei32(vbool32_t mask,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint32m2_t test___riscv_vluxei32(vbool16_t mask,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint32m4_t test___riscv_vluxei32(vbool8_t mask,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint32m8_t test___riscv_vluxei32(vbool4_t mask,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint64m1_t test___riscv_vluxei32(vbool64_t mask,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint64m2_t test___riscv_vluxei32(vbool32_t mask,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint64m4_t test___riscv_vluxei32(vbool16_t mask,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vuint64m8_t test___riscv_vluxei32(vbool8_t mask,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vfloat32mf2_t test___riscv_vluxei32(vbool64_t mask,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vfloat32m1_t test___riscv_vluxei32(vbool32_t mask,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vfloat32m2_t test___riscv_vluxei32(vbool16_t mask,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vfloat32m4_t test___riscv_vluxei32(vbool8_t mask,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vfloat32m8_t test___riscv_vluxei32(vbool4_t mask,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vfloat64m1_t test___riscv_vluxei32(vbool64_t mask,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vfloat64m2_t test___riscv_vluxei32(vbool32_t mask,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vfloat64m4_t test___riscv_vluxei32(vbool16_t mask,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + +vfloat64m8_t test___riscv_vluxei32(vbool8_t mask,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32(mask,base,bindex,32); +} + + + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-1.C new file mode 100644 index 00000000000..b6e3b5d210f --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-1.C @@ -0,0 +1,307 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32_mu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint8mf4_t test___riscv_vluxei32_mu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint8mf2_t test___riscv_vluxei32_mu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint8m1_t test___riscv_vluxei32_mu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint8m2_t test___riscv_vluxei32_mu(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint16mf4_t test___riscv_vluxei32_mu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint16mf2_t test___riscv_vluxei32_mu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint16m1_t test___riscv_vluxei32_mu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint16m2_t test___riscv_vluxei32_mu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint16m4_t test___riscv_vluxei32_mu(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vint64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint8mf8_t test___riscv_vluxei32_mu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint8mf4_t test___riscv_vluxei32_mu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint8mf2_t test___riscv_vluxei32_mu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint8m1_t test___riscv_vluxei32_mu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint8m2_t test___riscv_vluxei32_mu(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint16mf4_t test___riscv_vluxei32_mu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint16mf2_t test___riscv_vluxei32_mu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint16m1_t test___riscv_vluxei32_mu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint16m2_t test___riscv_vluxei32_mu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint16m4_t test___riscv_vluxei32_mu(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vuint64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vfloat32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vfloat32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vfloat32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vfloat32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vfloat32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vfloat64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vfloat64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vfloat64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + +vfloat64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,vl); +} + + + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-2.C new file mode 100644 index 00000000000..4538c8c4c16 --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-2.C @@ -0,0 +1,307 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32_mu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint8mf4_t test___riscv_vluxei32_mu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint8mf2_t test___riscv_vluxei32_mu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint8m1_t test___riscv_vluxei32_mu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint8m2_t test___riscv_vluxei32_mu(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint16mf4_t test___riscv_vluxei32_mu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint16mf2_t test___riscv_vluxei32_mu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint16m1_t test___riscv_vluxei32_mu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint16m2_t test___riscv_vluxei32_mu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint16m4_t test___riscv_vluxei32_mu(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vint64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint8mf8_t test___riscv_vluxei32_mu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint8mf4_t test___riscv_vluxei32_mu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint8mf2_t test___riscv_vluxei32_mu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint8m1_t test___riscv_vluxei32_mu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint8m2_t test___riscv_vluxei32_mu(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint16mf4_t test___riscv_vluxei32_mu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint16mf2_t test___riscv_vluxei32_mu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint16m1_t test___riscv_vluxei32_mu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint16m2_t test___riscv_vluxei32_mu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint16m4_t test___riscv_vluxei32_mu(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vuint64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vfloat32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vfloat32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vfloat32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vfloat32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vfloat32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vfloat64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vfloat64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vfloat64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + +vfloat64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,31); +} + + + +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-3.C new file mode 100644 index 00000000000..540cf193b2f --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_mu-3.C @@ -0,0 +1,307 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32_mu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint8mf4_t test___riscv_vluxei32_mu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint8mf2_t test___riscv_vluxei32_mu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint8m1_t test___riscv_vluxei32_mu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint8m2_t test___riscv_vluxei32_mu(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint16mf4_t test___riscv_vluxei32_mu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint16mf2_t test___riscv_vluxei32_mu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint16m1_t test___riscv_vluxei32_mu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint16m2_t test___riscv_vluxei32_mu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint16m4_t test___riscv_vluxei32_mu(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vint64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint8mf8_t test___riscv_vluxei32_mu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint8mf4_t test___riscv_vluxei32_mu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint8mf2_t test___riscv_vluxei32_mu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint8m1_t test___riscv_vluxei32_mu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint8m2_t test___riscv_vluxei32_mu(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint16mf4_t test___riscv_vluxei32_mu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint16mf2_t test___riscv_vluxei32_mu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint16m1_t test___riscv_vluxei32_mu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint16m2_t test___riscv_vluxei32_mu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint16m4_t test___riscv_vluxei32_mu(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vuint64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vfloat32mf2_t test___riscv_vluxei32_mu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vfloat32m1_t test___riscv_vluxei32_mu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vfloat32m2_t test___riscv_vluxei32_mu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vfloat32m4_t test___riscv_vluxei32_mu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vfloat32m8_t test___riscv_vluxei32_mu(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vfloat64m1_t test___riscv_vluxei32_mu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vfloat64m2_t test___riscv_vluxei32_mu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vfloat64m4_t test___riscv_vluxei32_mu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + +vfloat64m8_t test___riscv_vluxei32_mu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_mu(mask,merge,base,bindex,32); +} + + + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-1.C new file mode 100644 index 00000000000..4d68e87f62c --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-1.C @@ -0,0 +1,307 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32_tu(vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint8mf4_t test___riscv_vluxei32_tu(vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint8mf2_t test___riscv_vluxei32_tu(vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint8m1_t test___riscv_vluxei32_tu(vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint8m2_t test___riscv_vluxei32_tu(vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint16mf4_t test___riscv_vluxei32_tu(vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint16mf2_t test___riscv_vluxei32_tu(vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint16m1_t test___riscv_vluxei32_tu(vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint16m2_t test___riscv_vluxei32_tu(vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint16m4_t test___riscv_vluxei32_tu(vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint32mf2_t test___riscv_vluxei32_tu(vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint32m1_t test___riscv_vluxei32_tu(vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint32m2_t test___riscv_vluxei32_tu(vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint32m4_t test___riscv_vluxei32_tu(vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint32m8_t test___riscv_vluxei32_tu(vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint64m1_t test___riscv_vluxei32_tu(vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint64m2_t test___riscv_vluxei32_tu(vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint64m4_t test___riscv_vluxei32_tu(vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vint64m8_t test___riscv_vluxei32_tu(vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint8mf8_t test___riscv_vluxei32_tu(vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint8mf4_t test___riscv_vluxei32_tu(vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint8mf2_t test___riscv_vluxei32_tu(vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint8m1_t test___riscv_vluxei32_tu(vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint8m2_t test___riscv_vluxei32_tu(vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint16mf4_t test___riscv_vluxei32_tu(vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint16mf2_t test___riscv_vluxei32_tu(vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint16m1_t test___riscv_vluxei32_tu(vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint16m2_t test___riscv_vluxei32_tu(vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint16m4_t test___riscv_vluxei32_tu(vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint32mf2_t test___riscv_vluxei32_tu(vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint32m1_t test___riscv_vluxei32_tu(vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint32m2_t test___riscv_vluxei32_tu(vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint32m4_t test___riscv_vluxei32_tu(vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint32m8_t test___riscv_vluxei32_tu(vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint64m1_t test___riscv_vluxei32_tu(vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint64m2_t test___riscv_vluxei32_tu(vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint64m4_t test___riscv_vluxei32_tu(vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vuint64m8_t test___riscv_vluxei32_tu(vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vfloat32mf2_t test___riscv_vluxei32_tu(vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vfloat32m1_t test___riscv_vluxei32_tu(vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vfloat32m2_t test___riscv_vluxei32_tu(vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vfloat32m4_t test___riscv_vluxei32_tu(vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vfloat32m8_t test___riscv_vluxei32_tu(vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vfloat64m1_t test___riscv_vluxei32_tu(vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vfloat64m2_t test___riscv_vluxei32_tu(vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vfloat64m4_t test___riscv_vluxei32_tu(vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + +vfloat64m8_t test___riscv_vluxei32_tu(vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,vl); +} + + + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-2.C new file mode 100644 index 00000000000..20e27d419e5 --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-2.C @@ -0,0 +1,307 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32_tu(vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint8mf4_t test___riscv_vluxei32_tu(vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint8mf2_t test___riscv_vluxei32_tu(vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint8m1_t test___riscv_vluxei32_tu(vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint8m2_t test___riscv_vluxei32_tu(vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint16mf4_t test___riscv_vluxei32_tu(vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint16mf2_t test___riscv_vluxei32_tu(vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint16m1_t test___riscv_vluxei32_tu(vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint16m2_t test___riscv_vluxei32_tu(vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint16m4_t test___riscv_vluxei32_tu(vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint32mf2_t test___riscv_vluxei32_tu(vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint32m1_t test___riscv_vluxei32_tu(vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint32m2_t test___riscv_vluxei32_tu(vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint32m4_t test___riscv_vluxei32_tu(vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint32m8_t test___riscv_vluxei32_tu(vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint64m1_t test___riscv_vluxei32_tu(vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint64m2_t test___riscv_vluxei32_tu(vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint64m4_t test___riscv_vluxei32_tu(vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vint64m8_t test___riscv_vluxei32_tu(vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint8mf8_t test___riscv_vluxei32_tu(vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint8mf4_t test___riscv_vluxei32_tu(vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint8mf2_t test___riscv_vluxei32_tu(vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint8m1_t test___riscv_vluxei32_tu(vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint8m2_t test___riscv_vluxei32_tu(vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint16mf4_t test___riscv_vluxei32_tu(vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint16mf2_t test___riscv_vluxei32_tu(vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint16m1_t test___riscv_vluxei32_tu(vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint16m2_t test___riscv_vluxei32_tu(vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint16m4_t test___riscv_vluxei32_tu(vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint32mf2_t test___riscv_vluxei32_tu(vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint32m1_t test___riscv_vluxei32_tu(vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint32m2_t test___riscv_vluxei32_tu(vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint32m4_t test___riscv_vluxei32_tu(vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint32m8_t test___riscv_vluxei32_tu(vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint64m1_t test___riscv_vluxei32_tu(vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint64m2_t test___riscv_vluxei32_tu(vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint64m4_t test___riscv_vluxei32_tu(vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vuint64m8_t test___riscv_vluxei32_tu(vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vfloat32mf2_t test___riscv_vluxei32_tu(vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vfloat32m1_t test___riscv_vluxei32_tu(vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vfloat32m2_t test___riscv_vluxei32_tu(vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vfloat32m4_t test___riscv_vluxei32_tu(vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vfloat32m8_t test___riscv_vluxei32_tu(vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vfloat64m1_t test___riscv_vluxei32_tu(vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vfloat64m2_t test___riscv_vluxei32_tu(vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vfloat64m4_t test___riscv_vluxei32_tu(vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + +vfloat64m8_t test___riscv_vluxei32_tu(vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,31); +} + + + +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-3.C new file mode 100644 index 00000000000..fda3a0b0f6b --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tu-3.C @@ -0,0 +1,307 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32_tu(vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint8mf4_t test___riscv_vluxei32_tu(vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint8mf2_t test___riscv_vluxei32_tu(vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint8m1_t test___riscv_vluxei32_tu(vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint8m2_t test___riscv_vluxei32_tu(vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint16mf4_t test___riscv_vluxei32_tu(vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint16mf2_t test___riscv_vluxei32_tu(vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint16m1_t test___riscv_vluxei32_tu(vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint16m2_t test___riscv_vluxei32_tu(vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint16m4_t test___riscv_vluxei32_tu(vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint32mf2_t test___riscv_vluxei32_tu(vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint32m1_t test___riscv_vluxei32_tu(vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint32m2_t test___riscv_vluxei32_tu(vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint32m4_t test___riscv_vluxei32_tu(vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint32m8_t test___riscv_vluxei32_tu(vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint64m1_t test___riscv_vluxei32_tu(vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint64m2_t test___riscv_vluxei32_tu(vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint64m4_t test___riscv_vluxei32_tu(vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vint64m8_t test___riscv_vluxei32_tu(vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint8mf8_t test___riscv_vluxei32_tu(vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint8mf4_t test___riscv_vluxei32_tu(vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint8mf2_t test___riscv_vluxei32_tu(vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint8m1_t test___riscv_vluxei32_tu(vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint8m2_t test___riscv_vluxei32_tu(vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint16mf4_t test___riscv_vluxei32_tu(vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint16mf2_t test___riscv_vluxei32_tu(vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint16m1_t test___riscv_vluxei32_tu(vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint16m2_t test___riscv_vluxei32_tu(vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint16m4_t test___riscv_vluxei32_tu(vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint32mf2_t test___riscv_vluxei32_tu(vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint32m1_t test___riscv_vluxei32_tu(vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint32m2_t test___riscv_vluxei32_tu(vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint32m4_t test___riscv_vluxei32_tu(vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint32m8_t test___riscv_vluxei32_tu(vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint64m1_t test___riscv_vluxei32_tu(vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint64m2_t test___riscv_vluxei32_tu(vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint64m4_t test___riscv_vluxei32_tu(vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vuint64m8_t test___riscv_vluxei32_tu(vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vfloat32mf2_t test___riscv_vluxei32_tu(vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vfloat32m1_t test___riscv_vluxei32_tu(vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vfloat32m2_t test___riscv_vluxei32_tu(vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vfloat32m4_t test___riscv_vluxei32_tu(vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vfloat32m8_t test___riscv_vluxei32_tu(vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vfloat64m1_t test___riscv_vluxei32_tu(vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vfloat64m2_t test___riscv_vluxei32_tu(vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vfloat64m4_t test___riscv_vluxei32_tu(vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + +vfloat64m8_t test___riscv_vluxei32_tu(vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tu(merge,base,bindex,32); +} + + + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+\s+} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-1.C new file mode 100644 index 00000000000..a5966df712c --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-1.C @@ -0,0 +1,307 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32_tum(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint8mf4_t test___riscv_vluxei32_tum(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint8mf2_t test___riscv_vluxei32_tum(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint8m1_t test___riscv_vluxei32_tum(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint8m2_t test___riscv_vluxei32_tum(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint16mf4_t test___riscv_vluxei32_tum(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint16mf2_t test___riscv_vluxei32_tum(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint16m1_t test___riscv_vluxei32_tum(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint16m2_t test___riscv_vluxei32_tum(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint16m4_t test___riscv_vluxei32_tum(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vint64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint8mf8_t test___riscv_vluxei32_tum(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint8mf4_t test___riscv_vluxei32_tum(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint8mf2_t test___riscv_vluxei32_tum(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint8m1_t test___riscv_vluxei32_tum(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint8m2_t test___riscv_vluxei32_tum(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint16mf4_t test___riscv_vluxei32_tum(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint16mf2_t test___riscv_vluxei32_tum(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint16m1_t test___riscv_vluxei32_tum(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint16m2_t test___riscv_vluxei32_tum(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint16m4_t test___riscv_vluxei32_tum(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vuint64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vfloat32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vfloat32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vfloat32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vfloat32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vfloat32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vfloat64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vfloat64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vfloat64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + +vfloat64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,vl); +} + + + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-2.C new file mode 100644 index 00000000000..c1b8c294334 --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-2.C @@ -0,0 +1,307 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32_tum(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint8mf4_t test___riscv_vluxei32_tum(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint8mf2_t test___riscv_vluxei32_tum(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint8m1_t test___riscv_vluxei32_tum(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint8m2_t test___riscv_vluxei32_tum(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint16mf4_t test___riscv_vluxei32_tum(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint16mf2_t test___riscv_vluxei32_tum(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint16m1_t test___riscv_vluxei32_tum(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint16m2_t test___riscv_vluxei32_tum(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint16m4_t test___riscv_vluxei32_tum(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vint64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint8mf8_t test___riscv_vluxei32_tum(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint8mf4_t test___riscv_vluxei32_tum(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint8mf2_t test___riscv_vluxei32_tum(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint8m1_t test___riscv_vluxei32_tum(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint8m2_t test___riscv_vluxei32_tum(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint16mf4_t test___riscv_vluxei32_tum(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint16mf2_t test___riscv_vluxei32_tum(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint16m1_t test___riscv_vluxei32_tum(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint16m2_t test___riscv_vluxei32_tum(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint16m4_t test___riscv_vluxei32_tum(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vuint64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vfloat32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vfloat32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vfloat32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vfloat32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vfloat32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vfloat64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vfloat64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vfloat64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + +vfloat64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,31); +} + + + +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-3.C new file mode 100644 index 00000000000..7acee6645e2 --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tum-3.C @@ -0,0 +1,307 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32_tum(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint8mf4_t test___riscv_vluxei32_tum(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint8mf2_t test___riscv_vluxei32_tum(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint8m1_t test___riscv_vluxei32_tum(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint8m2_t test___riscv_vluxei32_tum(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint16mf4_t test___riscv_vluxei32_tum(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint16mf2_t test___riscv_vluxei32_tum(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint16m1_t test___riscv_vluxei32_tum(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint16m2_t test___riscv_vluxei32_tum(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint16m4_t test___riscv_vluxei32_tum(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vint64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint8mf8_t test___riscv_vluxei32_tum(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint8mf4_t test___riscv_vluxei32_tum(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint8mf2_t test___riscv_vluxei32_tum(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint8m1_t test___riscv_vluxei32_tum(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint8m2_t test___riscv_vluxei32_tum(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint16mf4_t test___riscv_vluxei32_tum(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint16mf2_t test___riscv_vluxei32_tum(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint16m1_t test___riscv_vluxei32_tum(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint16m2_t test___riscv_vluxei32_tum(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint16m4_t test___riscv_vluxei32_tum(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vuint64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vfloat32mf2_t test___riscv_vluxei32_tum(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vfloat32m1_t test___riscv_vluxei32_tum(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vfloat32m2_t test___riscv_vluxei32_tum(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vfloat32m4_t test___riscv_vluxei32_tum(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vfloat32m8_t test___riscv_vluxei32_tum(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vfloat64m1_t test___riscv_vluxei32_tum(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vfloat64m2_t test___riscv_vluxei32_tum(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vfloat64m4_t test___riscv_vluxei32_tum(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + +vfloat64m8_t test___riscv_vluxei32_tum(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tum(mask,merge,base,bindex,32); +} + + + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-1.C new file mode 100644 index 00000000000..e7562f406e4 --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-1.C @@ -0,0 +1,307 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32_tumu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint8mf4_t test___riscv_vluxei32_tumu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint8mf2_t test___riscv_vluxei32_tumu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint8m1_t test___riscv_vluxei32_tumu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint8m2_t test___riscv_vluxei32_tumu(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint16mf4_t test___riscv_vluxei32_tumu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint16mf2_t test___riscv_vluxei32_tumu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint16m1_t test___riscv_vluxei32_tumu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint16m2_t test___riscv_vluxei32_tumu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint16m4_t test___riscv_vluxei32_tumu(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vint64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint8mf8_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint8mf4_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint8mf2_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint8m1_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint8m2_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint16mf4_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint16mf2_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint16m1_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint16m2_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint16m4_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vuint64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vfloat32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vfloat32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vfloat32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vfloat32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vfloat32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vfloat64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vfloat64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vfloat64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + +vfloat64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,vl); +} + + + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-2.C new file mode 100644 index 00000000000..b8c8443c518 --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-2.C @@ -0,0 +1,307 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32_tumu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint8mf4_t test___riscv_vluxei32_tumu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint8mf2_t test___riscv_vluxei32_tumu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint8m1_t test___riscv_vluxei32_tumu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint8m2_t test___riscv_vluxei32_tumu(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint16mf4_t test___riscv_vluxei32_tumu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint16mf2_t test___riscv_vluxei32_tumu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint16m1_t test___riscv_vluxei32_tumu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint16m2_t test___riscv_vluxei32_tumu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint16m4_t test___riscv_vluxei32_tumu(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vint64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint8mf8_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint8mf4_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint8mf2_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint8m1_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint8m2_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint16mf4_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint16mf2_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint16m1_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint16m2_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint16m4_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vuint64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vfloat32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vfloat32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vfloat32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vfloat32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vfloat32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vfloat64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vfloat64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vfloat64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + +vfloat64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,31); +} + + + +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-3.C new file mode 100644 index 00000000000..05b70687993 --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vluxei32_tumu-3.C @@ -0,0 +1,307 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +vint8mf8_t test___riscv_vluxei32_tumu(vbool64_t mask,vint8mf8_t merge,const int8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint8mf4_t test___riscv_vluxei32_tumu(vbool32_t mask,vint8mf4_t merge,const int8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint8mf2_t test___riscv_vluxei32_tumu(vbool16_t mask,vint8mf2_t merge,const int8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint8m1_t test___riscv_vluxei32_tumu(vbool8_t mask,vint8m1_t merge,const int8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint8m2_t test___riscv_vluxei32_tumu(vbool4_t mask,vint8m2_t merge,const int8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint16mf4_t test___riscv_vluxei32_tumu(vbool64_t mask,vint16mf4_t merge,const int16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint16mf2_t test___riscv_vluxei32_tumu(vbool32_t mask,vint16mf2_t merge,const int16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint16m1_t test___riscv_vluxei32_tumu(vbool16_t mask,vint16m1_t merge,const int16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint16m2_t test___riscv_vluxei32_tumu(vbool8_t mask,vint16m2_t merge,const int16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint16m4_t test___riscv_vluxei32_tumu(vbool4_t mask,vint16m4_t merge,const int16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vint32mf2_t merge,const int32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vint32m1_t merge,const int32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vint32m2_t merge,const int32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vint32m4_t merge,const int32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vint32m8_t merge,const int32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vint64m1_t merge,const int64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vint64m2_t merge,const int64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vint64m4_t merge,const int64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vint64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vint64m8_t merge,const int64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint8mf8_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint8mf8_t merge,const uint8_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint8mf4_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint8mf4_t merge,const uint8_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint8mf2_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint8mf2_t merge,const uint8_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint8m1_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint8m1_t merge,const uint8_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint8m2_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint8m2_t merge,const uint8_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint16mf4_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint16mf4_t merge,const uint16_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint16mf2_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint16mf2_t merge,const uint16_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint16m1_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint16m1_t merge,const uint16_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint16m2_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint16m2_t merge,const uint16_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint16m4_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint16m4_t merge,const uint16_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint32mf2_t merge,const uint32_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint32m1_t merge,const uint32_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint32m2_t merge,const uint32_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint32m4_t merge,const uint32_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vuint32m8_t merge,const uint32_t* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vuint64m1_t merge,const uint64_t* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vuint64m2_t merge,const uint64_t* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vuint64m4_t merge,const uint64_t* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vuint64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vuint64m8_t merge,const uint64_t* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vfloat32mf2_t test___riscv_vluxei32_tumu(vbool64_t mask,vfloat32mf2_t merge,const float* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vfloat32m1_t test___riscv_vluxei32_tumu(vbool32_t mask,vfloat32m1_t merge,const float* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vfloat32m2_t test___riscv_vluxei32_tumu(vbool16_t mask,vfloat32m2_t merge,const float* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vfloat32m4_t test___riscv_vluxei32_tumu(vbool8_t mask,vfloat32m4_t merge,const float* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vfloat32m8_t test___riscv_vluxei32_tumu(vbool4_t mask,vfloat32m8_t merge,const float* base,vuint32m8_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vfloat64m1_t test___riscv_vluxei32_tumu(vbool64_t mask,vfloat64m1_t merge,const double* base,vuint32mf2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vfloat64m2_t test___riscv_vluxei32_tumu(vbool32_t mask,vfloat64m2_t merge,const double* base,vuint32m1_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vfloat64m4_t test___riscv_vluxei32_tumu(vbool16_t mask,vfloat64m4_t merge,const double* base,vuint32m2_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + +vfloat64m8_t test___riscv_vluxei32_tumu(vbool8_t mask,vfloat64m8_t merge,const double* base,vuint32m4_t bindex,size_t vl) +{ + return __riscv_vluxei32_tumu(mask,merge,base,bindex,32); +} + + + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*mu\s+vluxei32\.v\s+v[0-9]+,\s*0?\([a-x0-9]+\),\s*v[0-9]+,\s*v0.t} 3 } } */