From patchwork Wed Jan 18 02:50:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6ZKf5bGF5ZOy?= X-Patchwork-Id: 1727910 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NxVcZ586Kz23gM for ; Wed, 18 Jan 2023 13:50:37 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 20ECD385842E for ; Wed, 18 Jan 2023 02:50:35 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbguseast2.qq.com (smtpbguseast2.qq.com [54.204.34.130]) by sourceware.org (Postfix) with ESMTPS id 9F3F13858D28 for ; Wed, 18 Jan 2023 02:50:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 9F3F13858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp86t1674010217t7fa2si6 Received: from rios-cad5.localdomain ( [58.60.1.11]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 18 Jan 2023 10:50:16 +0800 (CST) X-QQ-SSF: 01400000000000E0L000000A0000000 X-QQ-FEAT: 0vfWcIgh24xB/KSbTGCluoxwPbyOyOJWp4pKdRpCHhi0K5dnsHF/VIezO+3Ye 8O8UnxIcBY4x2jGP5xRQg3ehhnlo6dxF92T3q5zDnBT49gdvuPOVWxfZXfl2jTZNxyPRFpV Yzp97aNaJovmPGOhmooWiJLXj1b27mfbNxgqC/KtIoNtZOmDEofazxSd/g99YOn+rcoyjjK upZgqIeRks5JM/BEK7wiUSseUhCowKqFMLLP8XUUloa0hZQpfL0E5pxeXYjpSjA+m1x8CZJ 4ZU64RGMIhK4Hrzcb6jwAKSlPDAqCklqNzD0n+j2zrKbcKs0K/iTdVw8NBjs+6EHExkHEet WvYWkfPIiGB1YJU4V3f9sVcd8D/wmsj03+qDbypRR4bReGGF+dwwWDMWnwt4T4xX/mRK5D6 X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Change VSETVL PASS always call split_all_insns Date: Wed, 18 Jan 2023 10:50:14 +0800 Message-Id: <20230118025014.65261-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" From: Ju-Zhe Zhong Since LCM will destroy CFG, we are going to reorder the location of VSETVL PASS at least before bbro (block-reorder PASS) which is before split3 PASS. We need to call it in VSETVL PASS to get final RVV instructions patterns. gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns. --- gcc/config/riscv/riscv-vsetvl.cc | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index 0245124e28f..d494369a603 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -3092,12 +3092,10 @@ pass_vsetvl::execute (function *) if (n_basic_blocks_for_fn (cfun) <= 0) return 0; - /* The reason we have this since we didn't finish splitting yet - when optimize == 0. In this case, we should conservatively - split all instructions here to make sure we don't miss any - RVV instruction. */ - if (!optimize) - split_all_insns (); + /* The RVV instruction may change after split which is not a stable + instruction. We need to split it here to avoid potential issue + since the VSETVL PASS is insert before split PASS. */ + split_all_insns (); /* Early return for there is no vector instructions. */ if (!has_vector_insn (cfun))