From patchwork Sun Dec 4 17:46:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 1712027 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=XxhdeIsV; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=m2m7mLIl; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NQDwk28mKz23nB for ; Mon, 5 Dec 2022 05:00:04 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qDjEQfYuTU71gWSAHs8pYa4EAu8TgmllSBr/w1Zz7NA=; b=XxhdeIsVdlAUEo KQ71dkjWRugHop2YDWQ8ez/4PsXcvXJPwD7R8d5P6O5a2VHP1X+55h29eYTMV5khJNAaiI8LstWZ2 FQAKAAYGsEAjRViLwRTutbsEoZTxIZjMopptZmyO4wkrmxxOcX53/Paf8d+OCzVmV7NiDtx8u8b+R /b9Qj2s+8oLsddCAcwCo4Pe/wqvppXpgr+RR0+bomr4bZDw9wmKvkOZkAu1TZPAtCpFRdm3GGA7rm 910bpug5zWrzOn06F5MvnCXUJItWX9k6WkTzT8yMN6s3YkCkX2fCjNQwO8R/CNe8XrVQ467tcvdzN ZnnWaGcLurK8DU/WuPPw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p1tHQ-00A7Pd-OD; Sun, 04 Dec 2022 17:59:56 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p1tE9-00A6ZD-Fn; Sun, 04 Dec 2022 17:56:34 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id E612A60EE1; Sun, 4 Dec 2022 17:56:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0D5FAC433B5; Sun, 4 Dec 2022 17:56:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670176591; bh=ARTuhir6BWBSEl/m8Qedtx8F7YcogAViI/5PbaogT2A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m2m7mLIl9zDz4yS97Bx4+LiNE125jD/8nAhNnA79/8kLWV4e+09fZmc4kezNjbblX KYX4fVdqDVSMIL2GodZR2WGaDxaNjRW75DSnBKVqbIBCFV26C/lUbPvW/DRjG3IOrW e+w+a/c5BOyvOHSNA5q96o9dEJzV19Sq+7OZl8lTUu/lg6XiLQ6Ge0zwlRlYqN5dEe DzoTurRKNzaV363DscDaDc+te4Cor1/POsc7P6fi0XDLJh7hi1DTiUxC36qOfdGEAF lc6a1r4OMGIOYuoriEWSJ5nmIvXDFMrBOw+7nI5FPdyCts7RmBTYlE1IO3A9MSTu/P eAEuxTAUqkRAg== From: Jisheng Zhang To: Palmer Dabbelt , Paul Walmsley , Albert Ou , Anup Patel , Atish Patra , Heiko Stuebner , Andrew Jones Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: [PATCH v2 01/13] riscv: fix jal offsets in patched alternatives Date: Mon, 5 Dec 2022 01:46:20 +0800 Message-Id: <20221204174632.3677-2-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221204174632.3677-1-jszhang@kernel.org> References: <20221204174632.3677-1-jszhang@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221204_095633_645613_CC0694DE X-CRM114-Status: GOOD ( 17.01 ) X-Spam-Score: -5.4 (-----) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Alternatives live in a different section, so offsets used by jal instruction will point to wrong locations after the patch got applied. Similar to arm64, adjust the location to consider that offset. Signed-off-by: Jisheng Zhang --- arch/riscv/include/asm/alternative.h | 2 ++ arch/riscv/kernel/alternative.c | 38 ++++++++++++++++++++++++++++ arch/riscv/kernel/cpufeature.c | 3 + [...] Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [139.178.84.217 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Alternatives live in a different section, so offsets used by jal instruction will point to wrong locations after the patch got applied. Similar to arm64, adjust the location to consider that offset. Signed-off-by: Jisheng Zhang --- arch/riscv/include/asm/alternative.h | 2 ++ arch/riscv/kernel/alternative.c | 38 ++++++++++++++++++++++++++++ arch/riscv/kernel/cpufeature.c | 3 +++ 3 files changed, 43 insertions(+) diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/alternative.h index c58ec3cc4bc3..33eae9541684 100644 --- a/arch/riscv/include/asm/alternative.h +++ b/arch/riscv/include/asm/alternative.h @@ -29,6 +29,8 @@ void apply_module_alternatives(void *start, size_t length); void riscv_alternative_fix_auipc_jalr(void *alt_ptr, unsigned int len, int patch_offset); +void riscv_alternative_fix_jal(void *alt_ptr, unsigned int len, + int patch_offset); struct alt_entry { void *old_ptr; /* address of original instruciton or data */ diff --git a/arch/riscv/kernel/alternative.c b/arch/riscv/kernel/alternative.c index 292cc42dc3be..9d88375624b5 100644 --- a/arch/riscv/kernel/alternative.c +++ b/arch/riscv/kernel/alternative.c @@ -125,6 +125,44 @@ void riscv_alternative_fix_auipc_jalr(void *alt_ptr, unsigned int len, } } +#define to_jal_imm(value) \ + (((value & (RV_J_IMM_10_1_MASK << RV_J_IMM_10_1_OFF)) << RV_I_IMM_11_0_OPOFF) | \ + ((value & (RV_J_IMM_11_MASK << RV_J_IMM_11_OFF)) << RV_J_IMM_11_OPOFF) | \ + ((value & (RV_J_IMM_19_12_OPOFF << RV_J_IMM_19_12_OFF)) << RV_J_IMM_19_12_OPOFF) | \ + ((value & (1 << RV_J_IMM_SIGN_OFF)) << RV_J_IMM_SIGN_OPOFF)) + +void riscv_alternative_fix_jal(void *alt_ptr, unsigned int len, + int patch_offset) +{ + int num_instr = len / sizeof(u32); + unsigned int call; + int i; + int imm; + + for (i = 0; i < num_instr; i++) { + u32 inst = riscv_instruction_at(alt_ptr, i); + + if (!riscv_insn_is_jal(inst)) + continue; + + /* get and adjust new target address */ + imm = RV_EXTRACT_JTYPE_IMM(inst); + imm -= patch_offset; + + /* pick the original jal */ + call = inst; + + /* drop the old IMMs, all jal imm bits sit at 31:12 */ + call &= ~GENMASK(31, 12); + + /* add the adapted IMMs */ + call |= to_jal_imm(imm); + + /* patch the call place again */ + patch_text_nosync(alt_ptr + i * sizeof(u32), &call, 4); + } +} + /* * This is called very early in the boot process (directly after we run * a feature detect on the boot CPU). No need to worry about other CPUs diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index ba62a4ff5ccd..c743f0adc794 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -324,6 +324,9 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, riscv_alternative_fix_auipc_jalr(alt->old_ptr, alt->alt_len, alt->old_ptr - alt->alt_ptr); + riscv_alternative_fix_jal(alt->old_ptr, + alt->alt_len, + alt->old_ptr - alt->alt_ptr); } } } From patchwork Sun Dec 4 17:46:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 1712028 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=a0FFz4Vd; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=Qlkv4uXf; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NQDwl3dQQz23yj for ; Mon, 5 Dec 2022 05:00:07 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XUH4c6E2Kv2qzvbTky82E1dLYLGBXS/vdcLp8idFwCc=; b=a0FFz4VdYN0FcH 7D1JnfoX+/bZxxQXEMg8G7Cbu7N3MSFmeCTzJekwjurVNggb6fAuLpF9xZttg0xv84AwtvdTQRCSt HfmxinpOdqLCI64ERa9k4FJ67CpGenB5kvuzUvaHUY3qOXqcWbiVW5xAJuw1tGiJ1vRBAltwqCtRt FM/8bA0gpdglnALkAcfd7WsovV4eJ/4MEZJvFU9FpytsvKn1cChQckhg67AaPuLHTZuKV8BzZToPX UCmCgTXGqjxZAE2Q1RqqNat48EFT+g/tOEzJrLXrFilxqniSWUKYm6nUiLDZ6UKtmfmps2R1TdTOy dVMJsH9BOWady5JMglgg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p1tHW-00A7Qp-1g; Sun, 04 Dec 2022 18:00:02 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p1tEB-00A6a6-KC; Sun, 04 Dec 2022 17:56:36 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id DE90260EDC; Sun, 4 Dec 2022 17:56:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C9AE3C433C1; Sun, 4 Dec 2022 17:56:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670176594; bh=fe+rWTyCxIwY8YD8KSMdWS0pSxqRhYgvbXdkNjgs9OY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Qlkv4uXf3AD/XR9sC10WHAIjCMtDerWOO6CkKtbUWHyNS4ujHHfTJrXzdCGqnEoP7 22hCY4ESqYcZvC3NRNNGz+NfuKXs0a2C9t0v2U5cZ1TlQ3V8kWrdjDvBd85HqzYSlz T3XYOuoDkl0XfFcicx+JBJy/aQg31bH9lbPmxlNApP+v1HuDafLEcr9aV71NKCdaj+ AzELuwk7YPPY7XZ/VoYUq+0soK3cTAGA/oZH2ZuySnBPENe2w1HUlsqtqw3vE/xeNc 6nx2wktQUufPGMOLw81Fw3zeqAW3E2TG7D43NFk9H6Vwa2ajACgm+qcc17xeVtL3K5 112P9BeASq84g== From: Jisheng Zhang To: Palmer Dabbelt , Paul Walmsley , Albert Ou , Anup Patel , Atish Patra , Heiko Stuebner , Andrew Jones Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, Conor Dooley Subject: [PATCH v2 02/13] riscv: move riscv_noncoherent_supported() out of ZICBOM probe Date: Mon, 5 Dec 2022 01:46:21 +0800 Message-Id: <20221204174632.3677-3-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221204174632.3677-1-jszhang@kernel.org> References: <20221204174632.3677-1-jszhang@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221204_095635_717984_FAEAEE94 X-CRM114-Status: GOOD ( 11.43 ) X-Spam-Score: -5.4 (-----) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: It's a bit weird to call riscv_noncoherent_supported() each time when insmoding a module. Move the calling out of feature patch func. Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Conor Dooley --- arch/riscv/kernel/cpufeature.c | 1 - ar [...] Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [2604:1380:4641:c500:0:0:0:1 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org It's a bit weird to call riscv_noncoherent_supported() each time when insmoding a module. Move the calling out of feature patch func. Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Conor Dooley --- arch/riscv/kernel/cpufeature.c | 1 - arch/riscv/kernel/setup.c | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index c743f0adc794..364d1fe86bea 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -274,7 +274,6 @@ static bool __init_or_module cpufeature_probe_zicbom(unsigned int stage) if (!riscv_isa_extension_available(NULL, ZICBOM)) return false; - riscv_noncoherent_supported(); return true; } diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index 86acd690d529..6eea40bf8c6b 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -300,6 +300,8 @@ void __init setup_arch(char **cmdline_p) riscv_init_cbom_blocksize(); riscv_fill_hwcap(); apply_boot_alternatives(); + if (riscv_isa_extension_available(NULL, ZICBOM)) + riscv_noncoherent_supported(); } static int __init topology_init(void) From patchwork Sun Dec 4 17:46:22 2022 Content-Type: text/plain; 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Sun, 04 Dec 2022 18:00:04 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p1tEE-00A6bE-Mi; Sun, 04 Dec 2022 17:56:40 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 6798DB80B90; Sun, 4 Dec 2022 17:56:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BEC64C433D6; Sun, 4 Dec 2022 17:56:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670176597; bh=3s4zw9FUbpvcvaIrDkMgw4j/arxcyKwTzaA9Yi50abg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VAlh9b2i+JZ2ERHbdxOsdG4Hn4RklDiaqzlP1NAa2p1TtwTD/T3S48w+97vzyBMnC kLuDLORO6TwtcT/igy8awF+4+wQkbvZTgdZAdSP/rolXNn3nXaXcu7gbPJjdx80j9L xQICvqBMZ9As2pe/gkhltiMEox4aXp9Sjkhw/GlgqFH4Cb4InSMUMhrLRlnVfplBa6 wXJxgLBcnJC16Azl02dsmIg/DYCrTof4qfvsbf5vsP6jSwbVm16qJyE6sgbZNMP6FZ 9iOBDh5UxwPV1ESX+U7uw4LaMSJTB4E//x4e35tiaMUKhpc5MXwu57ly28J28J0gfK EzfUGwUWKbf2Q== From: Jisheng Zhang To: Palmer Dabbelt , Paul Walmsley , Albert Ou , Anup Patel , Atish Patra , Heiko Stuebner , Andrew Jones Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: [PATCH v2 03/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier Date: Mon, 5 Dec 2022 01:46:22 +0800 Message-Id: <20221204174632.3677-4-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221204174632.3677-1-jszhang@kernel.org> References: <20221204174632.3677-1-jszhang@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221204_095638_896724_2264FC80 X-CRM114-Status: UNSURE ( 9.36 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -5.4 (-----) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Now, the riscv_cpufeature_patch_func() do nothing in the stage of RISCV_ALTERNATIVES_EARLY_BOOT. We can move the detection of "early boot" stage earlier. In following patch, we will make riscv_cpufeature_patch_func() scans all ISA extensions. Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [145.40.68.75 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Now, the riscv_cpufeature_patch_func() do nothing in the stage of RISCV_ALTERNATIVES_EARLY_BOOT. We can move the detection of "early boot" stage earlier. In following patch, we will make riscv_cpufeature_patch_func() scans all ISA extensions. Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Heiko Stuebner --- arch/riscv/kernel/cpufeature.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 364d1fe86bea..a4d2af67e05c 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -305,6 +305,9 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, struct alt_entry *alt; u32 tmp; + if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) + return; + for (alt = begin; alt < end; alt++) { if (alt->vendor_id != 0) continue; From patchwork Sun Dec 4 17:46:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 1712031 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=Zf+towl7; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=FAQNck9r; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NQDwp4fw8z23mf for ; Mon, 5 Dec 2022 05:00:10 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LzozuB+MUf8aSZGvuCvHyuh+S4lKNBab/EJsryoHYnY=; b=Zf+towl7cnen4l Pd2pVP8DOymgDtxL18klFt0clEFvEFFWeMJuRWPn9bCbycYyrKCl8pvy5/EqTGyvkZ2SDcvz1BiDX d+gkTOm8HsqIZft6hYLKICdVuthObyuYurYalw+5gPkKgychi/MPRbZwY9ATxqQ9zWy2d5qRN6aY8 LrGhFhHyRS7rIRujCceTZzV1IBG9sALFysajAsAUt/J3pZxRwveVetT160l3fvJd0aas8guyBKZxz fu5jdwZ2IDzyyej7Y9RToa7vxVefG0H2aPX6r1C0gNXxAs5PHJPcTBKRNEZjV8VihiTVZw4yLPjLB fA3PlSJvSoKtSMJagjjA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p1tHa-00A7ST-CP; Sun, 04 Dec 2022 18:00:06 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p1tEJ-00A6cD-Ib; Sun, 04 Dec 2022 17:56:45 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 20AE3B80B8C; Sun, 4 Dec 2022 17:56:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 88C6BC433B5; Sun, 4 Dec 2022 17:56:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670176599; bh=+82c7E1Z8qHqC9x9JM3yoEqsJXegTt0yFTfCQeuX89M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FAQNck9r06+DRPso3mnuLKa8mStE6Onk3Lk6qYLdZLTLOkJ0QKOwJo9NRKKiPsj7a TtlGqU7TGsQw3km5k0JgX22Uy90iI/3djHZuXX/H2FjmkDItfVIVNpqy8AaSip2jYo mcnvYeB80pPXCSI6UjidNoj2TITjqZHAyt03rXLJ2fWsF0vH8phDqvMHlIrmOPzK62 2gNKFJJwK1pos5bQ8rVT9wg6nxiKA3IGmYLEhWwVcJrfAHWecjJc88GG71fSLWsVMg vc9vMsFKfVNH/fCXJC9hKSCp52HmZSS69Lk/334O3mFWvyudiRHW4FXLaKSwMzWqUg liy1fmXMazp7g== From: Jisheng Zhang To: Palmer Dabbelt , Paul Walmsley , Albert Ou , Anup Patel , Atish Patra , Heiko Stuebner , Andrew Jones Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: [PATCH v2 04/13] riscv: hwcap: make ISA extension ids can be used in asm Date: Mon, 5 Dec 2022 01:46:23 +0800 Message-Id: <20221204174632.3677-5-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221204174632.3677-1-jszhang@kernel.org> References: <20221204174632.3677-1-jszhang@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221204_095643_908087_3F79936C X-CRM114-Status: GOOD ( 12.79 ) X-Spam-Score: -5.4 (-----) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: We will make use of ISA extension in asm files, so make the multi-letter RISC-V ISA extension IDs macros rather than enums and move them and those base ISA extension IDs to suitable place. Signed-off-by: Jisheng Zhang Reviewed-by: Heiko Stuebner Reviewed-by: Andrew Jones --- arch/riscv/include/asm/hwcap.h | 43 ++++++++++++ [...] Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [2604:1380:4601:e00:0:0:0:1 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org We will make use of ISA extension in asm files, so make the multi-letter RISC-V ISA extension IDs macros rather than enums and move them and those base ISA extension IDs to suitable place. Signed-off-by: Jisheng Zhang Reviewed-by: Heiko Stuebner Reviewed-by: Andrew Jones --- arch/riscv/include/asm/hwcap.h | 43 ++++++++++++++++------------------ 1 file changed, 20 insertions(+), 23 deletions(-) diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index b22525290073..996884986fea 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -12,20 +12,6 @@ #include #include -#ifndef __ASSEMBLY__ -#include -/* - * This yields a mask that user programs can use to figure out what - * instruction set this cpu supports. - */ -#define ELF_HWCAP (elf_hwcap) - -enum { - CAP_HWCAP = 1, -}; - -extern unsigned long elf_hwcap; - #define RISCV_ISA_EXT_a ('a' - 'a') #define RISCV_ISA_EXT_c ('c' - 'a') #define RISCV_ISA_EXT_d ('d' - 'a') @@ -46,22 +32,33 @@ extern unsigned long elf_hwcap; #define RISCV_ISA_EXT_BASE 26 /* - * This enum represent the logical ID for each multi-letter RISC-V ISA extension. + * These macros represent the logical ID for each multi-letter RISC-V ISA extension. * The logical ID should start from RISCV_ISA_EXT_BASE and must not exceed * RISCV_ISA_EXT_MAX. 0-25 range is reserved for single letter * extensions while all the multi-letter extensions should define the next * available logical extension id. */ -enum riscv_isa_ext_id { - RISCV_ISA_EXT_SSCOFPMF = RISCV_ISA_EXT_BASE, - RISCV_ISA_EXT_SVPBMT, - RISCV_ISA_EXT_ZICBOM, - RISCV_ISA_EXT_ZIHINTPAUSE, - RISCV_ISA_EXT_SSTC, - RISCV_ISA_EXT_SVINVAL, - RISCV_ISA_EXT_ID_MAX = RISCV_ISA_EXT_MAX, +#define RISCV_ISA_EXT_SSCOFPMF 26 +#define RISCV_ISA_EXT_SVPBMT 27 +#define RISCV_ISA_EXT_ZICBOM 28 +#define RISCV_ISA_EXT_ZIHINTPAUSE 29 +#define RISCV_ISA_EXT_SSTC 30 +#define RISCV_ISA_EXT_SVINVAL 31 + +#ifndef __ASSEMBLY__ +#include +/* + * This yields a mask that user programs can use to figure out what + * instruction set this cpu supports. + */ +#define ELF_HWCAP (elf_hwcap) + +enum { + CAP_HWCAP = 1, }; +extern unsigned long elf_hwcap; + /* * This enum represents the logical ID for each RISC-V ISA extension static * keys. We can use static key to optimize code path if some ISA extensions From patchwork Sun Dec 4 17:46:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 1712032 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=G7Z8fnR5; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=F6lzW/Qo; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NQDwr0KGvz23mf for ; Mon, 5 Dec 2022 05:00:12 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XSk8yrTQVJq2YDAv8BPYG9X5mpixZKZUYxIpDqWsjYY=; b=G7Z8fnR5fQVlsc MDVAfPSo2Dys8AGsP2gEAoclflNeno5GH+tVVwE3mshNP+UIHDkA+mHypaXoqaYZ0B0gCIRVOSUm0 E9hYukj1OKMT0q3NohkOf6JLY/Y354suK+pF3kLjC91PeRSYiVESktH7jtlwtIEzjDJGgev88dQ1a uoRRI5rrnWO1LJGqFNH6UM35M/4MDMpN5bd9NbqSrqjX6KJK8FWtoUm9KPsO7Td48afrALNkIDB1J uNACLsntSPECoZoNV3UGpXgnq4P+ihhV2uEh6fQCAcj39GHAx+1e4LWmoA6Gspkb1P4086PdEV026 4y7zb31en01m5mSnVdoQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p1tHa-00A7Sl-OE; Sun, 04 Dec 2022 18:00:07 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p1tEJ-00A6cU-J3; Sun, 04 Dec 2022 17:56:45 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 3690A60EDD; Sun, 4 Dec 2022 17:56:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 51608C43470; Sun, 4 Dec 2022 17:56:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670176602; bh=maHohDx6EZuCxhRSJ3qwh0l5iMVm5jT8tvy5XMgFCe8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F6lzW/QoSG0kNMZQA1TUDNYrdDDuG3JEA2I3JsFYeUyq3hNNw06nCWkrCc+Kiji6p 8Lo79JJOe7y9C38fbMr4HZglAobK70kM1c7nkjeBXASwMuHpFvPZibCMuGVQgqll6S wpTxpn14/xKZR5gYj44Vkq3XPuzBICGECfMDzU7MAzOE+rqR9fx3ICUNFlxyg+iF3x bCNor5YtaBl9cf0Wztdb5eC2N1ySdrdPS1F7rKG4lwUJH+tJNYeYgzu4tLNdzJJG/Q lISEtjyTZCITpzzFwpR1xWmRCEMyXvQXunG//Uo9Pf9Q9KzBaokYJ6Uycp1db4UEL3 52bEhiuci3/Tg== From: Jisheng Zhang To: Palmer Dabbelt , Paul Walmsley , Albert Ou , Anup Patel , Atish Patra , Heiko Stuebner , Andrew Jones Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: [PATCH v2 05/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions Date: Mon, 5 Dec 2022 01:46:24 +0800 Message-Id: <20221204174632.3677-6-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221204174632.3677-1-jszhang@kernel.org> References: <20221204174632.3677-1-jszhang@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221204_095643_718626_421360B2 X-CRM114-Status: GOOD ( 14.98 ) X-Spam-Score: -5.4 (-----) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: make the riscv_cpufeature_patch_func() scan all ISA extensions rather than limited feature macros. Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Heiko Stuebner --- arch/riscv/include/asm/errata_list.h | 9 ++-- ar [...] Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [2604:1380:4641:c500:0:0:0:1 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org make the riscv_cpufeature_patch_func() scan all ISA extensions rather than limited feature macros. Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Heiko Stuebner --- arch/riscv/include/asm/errata_list.h | 9 ++-- arch/riscv/kernel/cpufeature.c | 73 +++++----------------------- 2 files changed, 15 insertions(+), 67 deletions(-) diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h index 19a771085781..722525f4fc96 100644 --- a/arch/riscv/include/asm/errata_list.h +++ b/arch/riscv/include/asm/errata_list.h @@ -6,6 +6,7 @@ #define ASM_ERRATA_LIST_H #include +#include #include #ifdef CONFIG_ERRATA_SIFIVE @@ -20,10 +21,6 @@ #define ERRATA_THEAD_NUMBER 2 #endif -#define CPUFEATURE_SVPBMT 0 -#define CPUFEATURE_ZICBOM 1 -#define CPUFEATURE_NUMBER 2 - #ifdef __ASSEMBLY__ #define ALT_INSN_FAULT(x) \ @@ -53,7 +50,7 @@ asm(ALTERNATIVE("sfence.vma %0", "sfence.vma", SIFIVE_VENDOR_ID, \ #define ALT_SVPBMT(_val, prot) \ asm(ALTERNATIVE_2("li %0, 0\t\nnop", \ "li %0, %1\t\nslli %0,%0,%3", 0, \ - CPUFEATURE_SVPBMT, CONFIG_RISCV_ISA_SVPBMT, \ + RISCV_ISA_EXT_SVPBMT, CONFIG_RISCV_ISA_SVPBMT, \ "li %0, %2\t\nslli %0,%0,%4", THEAD_VENDOR_ID, \ ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \ : "=r"(_val) \ @@ -127,7 +124,7 @@ asm volatile(ALTERNATIVE_2( \ "add a0, a0, %0\n\t" \ "2:\n\t" \ "bltu a0, %2, 3b\n\t" \ - "nop", 0, CPUFEATURE_ZICBOM, CONFIG_RISCV_ISA_ZICBOM, \ + "nop", 0, RISCV_ISA_EXT_ZICBOM, CONFIG_RISCV_ISA_ZICBOM, \ "mv a0, %1\n\t" \ "j 2f\n\t" \ "3:\n\t" \ diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index a4d2af67e05c..6244be5cd94a 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -252,58 +252,11 @@ void __init riscv_fill_hwcap(void) } #ifdef CONFIG_RISCV_ALTERNATIVE -static bool __init_or_module cpufeature_probe_svpbmt(unsigned int stage) -{ - if (!IS_ENABLED(CONFIG_RISCV_ISA_SVPBMT)) - return false; - - if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) - return false; - - return riscv_isa_extension_available(NULL, SVPBMT); -} - -static bool __init_or_module cpufeature_probe_zicbom(unsigned int stage) -{ - if (!IS_ENABLED(CONFIG_RISCV_ISA_ZICBOM)) - return false; - - if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) - return false; - - if (!riscv_isa_extension_available(NULL, ZICBOM)) - return false; - - return true; -} - -/* - * Probe presence of individual extensions. - * - * This code may also be executed before kernel relocation, so we cannot use - * addresses generated by the address-of operator as they won't be valid in - * this context. - */ -static u32 __init_or_module cpufeature_probe(unsigned int stage) -{ - u32 cpu_req_feature = 0; - - if (cpufeature_probe_svpbmt(stage)) - cpu_req_feature |= BIT(CPUFEATURE_SVPBMT); - - if (cpufeature_probe_zicbom(stage)) - cpu_req_feature |= BIT(CPUFEATURE_ZICBOM); - - return cpu_req_feature; -} - void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, struct alt_entry *end, unsigned int stage) { - u32 cpu_req_feature = cpufeature_probe(stage); struct alt_entry *alt; - u32 tmp; if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) return; @@ -311,25 +264,23 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, for (alt = begin; alt < end; alt++) { if (alt->vendor_id != 0) continue; - if (alt->errata_id >= CPUFEATURE_NUMBER) { - WARN(1, "This feature id:%d is not in kernel cpufeature list", + if (alt->errata_id >= RISCV_ISA_EXT_MAX) { + WARN(1, "This extension id:%d is not in ISA extension list", alt->errata_id); continue; } - tmp = (1U << alt->errata_id); - if (cpu_req_feature & tmp) { - /* do the basic patching */ - patch_text_nosync(alt->old_ptr, alt->alt_ptr, - alt->alt_len); + if (!__riscv_isa_extension_available(NULL, alt->errata_id)) + continue; - riscv_alternative_fix_auipc_jalr(alt->old_ptr, - alt->alt_len, - alt->old_ptr - alt->alt_ptr); - riscv_alternative_fix_jal(alt->old_ptr, - alt->alt_len, - alt->old_ptr - alt->alt_ptr); - } + /* do the basic patching */ + patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len); + riscv_alternative_fix_auipc_jalr(alt->old_ptr, + alt->alt_len, + alt->old_ptr - alt->alt_ptr); + riscv_alternative_fix_jal(alt->old_ptr, + alt->alt_len, + alt->old_ptr - alt->alt_ptr); } } #endif From patchwork Sun Dec 4 17:46:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 1712033 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=Op07MTeu; dkim=fail reason="signature verification failed" (2048-bit key; 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The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Generally, riscv ISA extensions are fixed for any specific hardware platform, that's to say, the hart features won't change any more after booting, this chacteristic make it straightforward to use sta [...] Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [139.178.84.217 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Generally, riscv ISA extensions are fixed for any specific hardware platform, that's to say, the hart features won't change any more after booting, this chacteristic make it straightforward to use static branch to check one specific ISA extension is supported or not to optimize performance. However, some ISA extensions such as SVPBMT and ZICBOM are handled via. the alternative sequences. Basically, for ease of maintenance, we prefer to use static branches in C code, but recently, Samuel found that the static branch usage in cpu_relax() breaks building with CONFIG_CC_OPTIMIZE_FOR_SIZE[1]. As Samuel pointed out, "Having a static branch in cpu_relax() is problematic because that function is widely inlined, including in some quite complex functions like in the VDSO. A quick measurement shows this static branch is responsible by itself for around 40% of the jump table." Samuel's findings pointed out one of a few downsides of static branches usage in C code to handle ISA extensions detected at boot time: static branch's metadata in the __jump_table section, which is not discarded after ISA extensions are finalized, wastes some space. I want to try to solve the issue for all possible dynamic handling of ISA extensions at boot time. Inspired by Mark[2], this patch introduces riscv_has_extension_*() helpers, which work like static branches but are patched using alternatives, thus the metadata can be freed after patching. [1]https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel@sholland.org/ [2]https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland@arm.com/ Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones --- arch/riscv/include/asm/hwcap.h | 37 ++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index 996884986fea..e2d3f6df7701 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -8,6 +8,7 @@ #ifndef _ASM_RISCV_HWCAP_H #define _ASM_RISCV_HWCAP_H +#include #include #include #include @@ -96,6 +97,42 @@ static __always_inline int riscv_isa_ext2key(int num) } } +static __always_inline bool +riscv_has_extension_likely(const unsigned long ext) +{ + compiletime_assert(ext < RISCV_ISA_EXT_MAX, + "ext must be < RISCV_ISA_EXT_MAX"); + + asm_volatile_goto( + ALTERNATIVE("j %l[l_no]", "nop", 0, %[ext], 1) + : + : [ext] "i" (ext) + : + : l_no); + + return true; +l_no: + return false; +} + +static __always_inline bool +riscv_has_extension_unlikely(const unsigned long ext) +{ + compiletime_assert(ext < RISCV_ISA_EXT_MAX, + "ext must be < RISCV_ISA_EXT_MAX"); + + asm_volatile_goto( + ALTERNATIVE("nop", "j %l[l_yes]", 0, %[ext], 1) + : + : [ext] "i" (ext) + : + : l_yes); + + return false; +l_yes: + return true; +} + unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap); #define riscv_isa_extension_mask(ext) BIT_MASK(RISCV_ISA_EXT_##ext) From patchwork Sun Dec 4 17:46:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 1712034 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; 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Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Heiko Stuebner --- arch/riscv/include/asm/switch_to.h | 3 ++- 1 fil [...] Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [2604:1380:4601:e00:0:0:0:1 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Switch has_fpu() from statich branch to the new helper riscv_has_extension_likely(). Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Heiko Stuebner --- arch/riscv/include/asm/switch_to.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index 11463489fec6..60f8ca01d36e 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -59,7 +59,8 @@ static inline void __switch_to_aux(struct task_struct *prev, static __always_inline bool has_fpu(void) { - return static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_FPU]); + return riscv_has_extension_likely(RISCV_ISA_EXT_f) || + riscv_has_extension_likely(RISCV_ISA_EXT_d); } #else static __always_inline bool has_fpu(void) { return false; } From patchwork Sun Dec 4 17:46:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 1712035 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Move it to the header so that the implementation can be shared by the alternatives code. Signed-off-by: Jisheng Zhang --- arch/riscv/include/asm/module.h | 15 +++++++++++++++ arch/riscv/kernel/module.c | 15 2 files changed, 15 insertions(+), 15 deletio [...] Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [139.178.84.217 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Move it to the header so that the implementation can be shared by the alternatives code. Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Conor Dooley --- arch/riscv/include/asm/module.h | 15 +++++++++++++++ arch/riscv/kernel/module.c | 15 --------------- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/riscv/include/asm/module.h b/arch/riscv/include/asm/module.h index 76aa96a9fc08..78722a79fc59 100644 --- a/arch/riscv/include/asm/module.h +++ b/arch/riscv/include/asm/module.h @@ -111,4 +111,19 @@ static inline struct plt_entry *get_plt_entry(unsigned long val, #endif /* CONFIG_MODULE_SECTIONS */ +static inline const Elf_Shdr *find_section(const Elf_Ehdr *hdr, + const Elf_Shdr *sechdrs, + const char *name) +{ + const Elf_Shdr *s, *se; + const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; + + for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++) { + if (strcmp(name, secstrs + s->sh_name) == 0) + return s; + } + + return NULL; +} + #endif /* _ASM_RISCV_MODULE_H */ diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index 91fe16bfaa07..76f4b9c2ec5b 100644 --- a/arch/riscv/kernel/module.c +++ b/arch/riscv/kernel/module.c @@ -429,21 +429,6 @@ void *module_alloc(unsigned long size) } #endif -static const Elf_Shdr *find_section(const Elf_Ehdr *hdr, - const Elf_Shdr *sechdrs, - const char *name) -{ - const Elf_Shdr *s, *se; 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Sun, 4 Dec 2022 17:56:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670176613; bh=Jk4giilYCgEl05yNiJJydSOU/OvQdWbNth2qlSiEbPg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lfZ0AoodqpOBr4UfFThRkbljp0ErAl7VNyVaoMVs+nmG9oQKFhdXp0UJZEKSUAtOp BEbu/xA3E6cb1JR82tfNBA35B1ovQ4kBiGhaaMpxc5wD5mKiBEPtuIaq4nszh+j7wc SHqUpVgrpumtJDrdrt4Y8O85z+arFix0SV0y0vDPPOeS4eu+QHaD94UCxkF61UaHjX f5e48YyVzbU7qTfRGTiluAUSHlxVDtfbBPiySD6Yv7PyFLraV3g+fip5xOFCK9C4BI OGZH+g+cWhNYx8sQhrGr9vQcK3DoS/XSY6dpLJwbttkHL5E5Bw/YVtQJkZRedTnA16 DEEjV6p82Cg9w== From: Jisheng Zhang To: Palmer Dabbelt , Paul Walmsley , Albert Ou , Anup Patel , Atish Patra , Heiko Stuebner , Andrew Jones Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: [PATCH v2 09/13] riscv: switch to relative alternative entries Date: Mon, 5 Dec 2022 01:46:28 +0800 Message-Id: <20221204174632.3677-10-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221204174632.3677-1-jszhang@kernel.org> References: <20221204174632.3677-1-jszhang@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221204_095656_839104_3361D1C4 X-CRM114-Status: GOOD ( 16.12 ) X-Spam-Score: -5.4 (-----) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Instead of using absolute addresses for both the old instrucions and the alternative instructions, use offsets relative to the alt_entry values. So we can not only cut the size of the alternative entr [...] Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [2604:1380:4601:e00:0:0:0:1 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Instead of using absolute addresses for both the old instrucions and the alternative instructions, use offsets relative to the alt_entry values. So we can not only cut the size of the alternative entry, but also meet the prerequisite for patching alternatives in the vDSO, since absolute alternative entries are subject to dynamic relocation, which is incompatible with the vDSO building. Signed-off-by: Jisheng Zhang --- arch/riscv/errata/sifive/errata.c | 4 +++- arch/riscv/errata/thead/errata.c | 11 ++++++++--- arch/riscv/include/asm/alternative-macros.h | 20 ++++++++++---------- arch/riscv/include/asm/alternative.h | 12 ++++++------ arch/riscv/kernel/cpufeature.c | 13 ++++++------- 5 files changed, 33 insertions(+), 27 deletions(-) diff --git a/arch/riscv/errata/sifive/errata.c b/arch/riscv/errata/sifive/errata.c index 1031038423e7..0e537cdfd324 100644 --- a/arch/riscv/errata/sifive/errata.c +++ b/arch/riscv/errata/sifive/errata.c @@ -107,7 +107,9 @@ void __init_or_module sifive_errata_patch_func(struct alt_entry *begin, tmp = (1U << alt->errata_id); if (cpu_req_errata & tmp) { - patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len); + patch_text_nosync((void *)&alt->old_offset + alt->old_offset, + (void *)&alt->alt_offset + alt->alt_offset, + alt->alt_len); cpu_apply_errata |= tmp; } } diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c index 21546937db39..2a6e335b5a32 100644 --- a/arch/riscv/errata/thead/errata.c +++ b/arch/riscv/errata/thead/errata.c @@ -68,6 +68,7 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al struct alt_entry *alt; u32 cpu_req_errata = thead_errata_probe(stage, archid, impid); u32 tmp; + void *oldptr, *updptr; for (alt = begin; alt < end; alt++) { if (alt->vendor_id != THEAD_VENDOR_ID) @@ -77,12 +78,16 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al tmp = (1U << alt->errata_id); if (cpu_req_errata & tmp) { + oldptr = (void *)&alt->old_offset + alt->old_offset; + updptr = (void *)&alt->alt_offset + alt->alt_offset; + /* On vm-alternatives, the mmu isn't running yet */ if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) - memcpy((void *)__pa_symbol(alt->old_ptr), - (void *)__pa_symbol(alt->alt_ptr), alt->alt_len); + memcpy((void *)__pa_symbol(oldptr), + (void *)__pa_symbol(updptr), + alt->alt_len); else - patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len); + patch_text_nosync(oldptr, updptr, alt->alt_len); } } diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h index ec2f3f1b836f..dd40727bc859 100644 --- a/arch/riscv/include/asm/alternative-macros.h +++ b/arch/riscv/include/asm/alternative-macros.h @@ -7,11 +7,11 @@ #ifdef __ASSEMBLY__ .macro ALT_ENTRY oldptr newptr vendor_id errata_id new_len - RISCV_PTR \oldptr - RISCV_PTR \newptr - REG_ASM \vendor_id - REG_ASM \new_len - .word \errata_id + .long \oldptr - . + .long \newptr - . + .short \vendor_id + .short \new_len + .long \errata_id .endm .macro ALT_NEW_CONTENT vendor_id, errata_id, enable = 1, new_c : vararg @@ -75,11 +75,11 @@ #include #define ALT_ENTRY(oldptr, newptr, vendor_id, errata_id, newlen) \ - RISCV_PTR " " oldptr "\n" \ - RISCV_PTR " " newptr "\n" \ - REG_ASM " " vendor_id "\n" \ - REG_ASM " " newlen "\n" \ - ".word " errata_id "\n" + ".long ((" oldptr ") - .) \n" \ + ".long ((" newptr ") - .) \n" \ + ".short " vendor_id "\n" \ + ".short " newlen "\n" \ + ".long " errata_id "\n" #define ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c) \ ".if " __stringify(enable) " == 1\n" \ diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/alternative.h index 33eae9541684..3baf32e05b46 100644 --- a/arch/riscv/include/asm/alternative.h +++ b/arch/riscv/include/asm/alternative.h @@ -33,12 +33,12 @@ void riscv_alternative_fix_jal(void *alt_ptr, unsigned int len, int patch_offset); struct alt_entry { - void *old_ptr; /* address of original instruciton or data */ - void *alt_ptr; /* address of replacement instruction or data */ - unsigned long vendor_id; /* cpu vendor id */ - unsigned long alt_len; /* The replacement size */ - unsigned int errata_id; /* The errata id */ -} __packed; + s32 old_offset; /* offset to original instruciton or data */ + s32 alt_offset; /* offset to replacement instruction or data */ + u16 vendor_id; /* cpu vendor id */ + u16 alt_len; /* The replacement size */ + u32 errata_id; /* The errata id */ +}; struct errata_checkfunc_id { unsigned long vendor_id; diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 6244be5cd94a..adeac90b1d8e 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -257,6 +257,7 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, unsigned int stage) { struct alt_entry *alt; + void *oldptr, *updptr; if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) return; @@ -270,17 +271,15 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, continue; } + oldptr = (void *)&alt->old_offset + alt->old_offset; + updptr = (void *)&alt->alt_offset + alt->alt_offset; if (!__riscv_isa_extension_available(NULL, alt->errata_id)) continue; /* do the basic patching */ - patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len); - riscv_alternative_fix_auipc_jalr(alt->old_ptr, - alt->alt_len, - alt->old_ptr - alt->alt_ptr); - riscv_alternative_fix_jal(alt->old_ptr, - alt->alt_len, - alt->old_ptr - alt->alt_ptr); + patch_text_nosync(oldptr, updptr, alt->alt_len); + riscv_alternative_fix_auipc_jalr(oldptr, alt->alt_len, oldptr - updptr); + riscv_alternative_fix_jal(oldptr, alt->alt_len, oldptr - updptr); } } #endif From patchwork Sun Dec 4 17:46:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 1712037 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Sun, 04 Dec 2022 17:57:00 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id C80D1B80A3A; Sun, 4 Dec 2022 17:56:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 33507C433C1; Sun, 4 Dec 2022 17:56:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670176616; bh=nddkFzTLXcp78CwhK+bTE7WNJIO4yesPGtU3kIxPL38=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UXAqMPoX0wN90WTipazw5XiEoicdzJeJI0ye3r5zOGvgziDQrMj63YWPVJ9oAOqnl mF09A3ujxVYGFzgmLc4P1X5u97N9NISDjG9YJ4hCSYyeEePdOwD77nkwsTxeSp+Wg1 97KtA6tZYvuF1040OMH1mOQoDuVnjigVVN3Yn9odB/fSA3WqfN/nlBHBbSW3+D6vkp bkWYoUXx8uUtnST1LTpA5kRL2QKniEtn748UIpoOj56m/7QRthbezm7jjUwcB5G1lt ho4a9QtlLQZLX5C041vZVUgzMWBTJbUTEvR1kxWwwiFceWhrGBEJ5soA4jXAtG+EAC 1yDT5eTiwRtdQ== From: Jisheng Zhang To: Palmer Dabbelt , Paul Walmsley , Albert Ou , Anup Patel , Atish Patra , Heiko Stuebner , Andrew Jones Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: [PATCH v2 10/13] riscv: alternative: patch alternatives in the vDSO Date: Mon, 5 Dec 2022 01:46:29 +0800 Message-Id: <20221204174632.3677-11-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221204174632.3677-1-jszhang@kernel.org> References: <20221204174632.3677-1-jszhang@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221204_095659_692020_1DFA2472 X-CRM114-Status: GOOD ( 14.68 ) X-Spam-Score: -5.4 (-----) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Make it possible to use alternatives in the vDSO, so that better implementations can be used if possible. Signed-off-by: Jisheng Zhang --- arch/riscv/include/asm/vdso.h | 4 ++++ arch/riscv/kernel/alternative.c | 25 +++++++++++++++++++++++++ arch/riscv/kernel/vdso.c | 5 ----- arch/risc [...] Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [145.40.68.75 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Make it possible to use alternatives in the vDSO, so that better implementations can be used if possible. Signed-off-by: Jisheng Zhang Reviewed-by: Guo Ren Reviewed-by: Andrew Jones --- arch/riscv/include/asm/vdso.h | 4 ++++ arch/riscv/kernel/alternative.c | 25 +++++++++++++++++++++++++ arch/riscv/kernel/vdso.c | 5 ----- arch/riscv/kernel/vdso/vdso.lds.S | 7 +++++++ 4 files changed, 36 insertions(+), 5 deletions(-) diff --git a/arch/riscv/include/asm/vdso.h b/arch/riscv/include/asm/vdso.h index af981426fe0f..b6ff7473fb8a 100644 --- a/arch/riscv/include/asm/vdso.h +++ b/arch/riscv/include/asm/vdso.h @@ -28,8 +28,12 @@ #define COMPAT_VDSO_SYMBOL(base, name) \ (void __user *)((unsigned long)(base) + compat__vdso_##name##_offset) +extern char compat_vdso_start[], compat_vdso_end[]; + #endif /* CONFIG_COMPAT */ +extern char vdso_start[], vdso_end[]; + #endif /* !__ASSEMBLY__ */ #endif /* CONFIG_MMU */ diff --git a/arch/riscv/kernel/alternative.c b/arch/riscv/kernel/alternative.c index 9d88375624b5..eaf7ddaba54c 100644 --- a/arch/riscv/kernel/alternative.c +++ b/arch/riscv/kernel/alternative.c @@ -11,7 +11,9 @@ #include #include #include +#include #include +#include #include #include #include @@ -187,6 +189,27 @@ static void __init_or_module _apply_alternatives(struct alt_entry *begin, stage); } +static void __init apply_vdso_alternatives(void) +{ + const struct elf64_hdr *hdr; + const struct elf64_shdr *shdr; + const struct elf64_shdr *alt; + struct alt_entry *begin, *end; + + hdr = (struct elf64_hdr *)vdso_start; + shdr = (void *)hdr + hdr->e_shoff; + alt = find_section(hdr, shdr, ".alternative"); + if (!alt) + return; + + begin = (void *)hdr + alt->sh_offset, + end = (void *)hdr + alt->sh_offset + alt->sh_size, + + _apply_alternatives((struct alt_entry *)begin, + (struct alt_entry *)end, + RISCV_ALTERNATIVES_BOOT); +} + void __init apply_boot_alternatives(void) { /* If called on non-boot cpu things could go wrong */ @@ -195,6 +218,8 @@ void __init apply_boot_alternatives(void) _apply_alternatives((struct alt_entry *)__alt_start, (struct alt_entry *)__alt_end, RISCV_ALTERNATIVES_BOOT); + + apply_vdso_alternatives(); } /* diff --git a/arch/riscv/kernel/vdso.c b/arch/riscv/kernel/vdso.c index 123d05255fcf..1f47bc6566cf 100644 --- a/arch/riscv/kernel/vdso.c +++ b/arch/riscv/kernel/vdso.c @@ -22,11 +22,6 @@ struct vdso_data { }; #endif -extern char vdso_start[], vdso_end[]; -#ifdef CONFIG_COMPAT -extern char compat_vdso_start[], compat_vdso_end[]; -#endif - enum vvar_pages { VVAR_DATA_PAGE_OFFSET, VVAR_TIMENS_PAGE_OFFSET, diff --git a/arch/riscv/kernel/vdso/vdso.lds.S b/arch/riscv/kernel/vdso/vdso.lds.S index 150b1a572e61..4a0606633290 100644 --- a/arch/riscv/kernel/vdso/vdso.lds.S +++ b/arch/riscv/kernel/vdso/vdso.lds.S @@ -40,6 +40,13 @@ SECTIONS . = 0x800; .text : { *(.text .text.*) } :text + . = ALIGN(4); + .alternative : { + __alt_start = .; + *(.alternative) + __alt_end = .; + } + .data : { *(.got.plt) *(.got) *(.data .data.* .gnu.linkonce.d.*) From patchwork Sun Dec 4 17:46:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 1712038 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; 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Content preview: Switch cpu_relax() from statich branch to the new helper riscv_has_extension_likely() Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Heiko Stuebner --- arch/riscv/include/asm/vdso/processor.h | 2 +- 1 [...] Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [139.178.84.217 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Switch cpu_relax() from statich branch to the new helper riscv_has_extension_likely() Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Heiko Stuebner Reviewed-by: Guo Ren --- arch/riscv/include/asm/vdso/processor.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/vdso/processor.h b/arch/riscv/include/asm/vdso/processor.h index fa70cfe507aa..edf0e25e43d1 100644 --- a/arch/riscv/include/asm/vdso/processor.h +++ b/arch/riscv/include/asm/vdso/processor.h @@ -10,7 +10,7 @@ static inline void cpu_relax(void) { - if (!static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_ZIHINTPAUSE])) { + if (!riscv_has_extension_likely(RISCV_ISA_EXT_ZIHINTPAUSE)) { #ifdef __riscv_muldiv int dummy; /* In lieu of a halt instruction, induce a long-latency stall. */ From patchwork Sun Dec 4 17:46:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 1712039 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=0MDnrCfg; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=Qei5qnSY; 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X-Spam-Score: -5.4 (-----) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Andrew Jones Switch has_svinval() from static branch to the new helper riscv_has_extension_unlikely(). Signed-off-by: Andrew Jones --- arch/riscv/kvm/tlb.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [139.178.84.217 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Andrew Jones Switch has_svinval() from static branch to the new helper riscv_has_extension_unlikely(). Signed-off-by: Andrew Jones Reviewed-by: Guo Ren --- arch/riscv/kvm/tlb.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/riscv/kvm/tlb.c b/arch/riscv/kvm/tlb.c index 309d79b3e5cd..aa3da18ad873 100644 --- a/arch/riscv/kvm/tlb.c +++ b/arch/riscv/kvm/tlb.c @@ -15,8 +15,7 @@ #include #include -#define has_svinval() \ - static_branch_unlikely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_SVINVAL]) +#define has_svinval() riscv_has_extension_unlikely(RISCV_ISA_EXT_SVINVAL) void kvm_riscv_local_hfence_gvma_vmid_gpa(unsigned long vmid, gpa_t gpa, gpa_t gpsz, From patchwork Sun Dec 4 17:46:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 1712040 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=tdTjZFLS; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=E7uERDpL; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NQDxV167Rz23mf for ; Mon, 5 Dec 2022 05:00:46 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=u3VWH8TGTKCzcQyMNv5mReUy4X/lT1w0VyJpgddS1LI=; b=tdTjZFLSyd6jIO 41lHgyDj56M+11nH78BhOFOvLuin2Pu4BiyRfoR3Wd8eevXXBoXfv22dPTN8tBfoJa/DW6czC2qya VodjUWnNb8kKNPHFhA/QhP7KViLxItZt0OUicMpDrdDqQ9QLkMgiUd0csi3s1Ah4PKUJPFdJQv5ko 0ZmPtgSO3M2V5yBta6aSKvMBM1dNqeW9+ERQ6nsxQzYRF9tFLyqp2jqUSqMvW84zuKVZN4SSOP0dc 0GreVTnR/q7WGuz4HuhqFO8n2GqsBuAMlTx70BwyKgX6jEIb97tzh9R60cVvhBD1lsgk5OaI7qcWJ gA33HFxW0cHjiQngZe2Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p1tI8-00A80t-5G; Sun, 04 Dec 2022 18:00:40 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p1tEf-00A6kq-TB; Sun, 04 Dec 2022 17:57:07 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6B81960EE0; Sun, 4 Dec 2022 17:57:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 820BEC433D7; Sun, 4 Dec 2022 17:57:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670176624; bh=JXzPxvFpWQXfBP14y0JZvUn34ik1sRVmrtRbscUXSzk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E7uERDpLmA51CeeeqseZ7VOvhDxV/BnNb89BObR8vFxipu3a7G9ACLphKz1DSAfE0 p55xdOiTuLzvwda+mzn/a25lku6qOXof1nFy4S7V/1oI+E6R0qHi2B+8MpRivnagjU Ts4Jpc9lFdfNi93iAXEmcq16W9C5FXQMsKfUDDoCRQjqxBVS4pEpZBKqHTB7zQK8ci DGPBKFKBhnCUe+GOuWkZASE600znmEI5XDrJppmIa6TSXx2teSFTut+vvis/DzalYp hTNgyi7QO2Eyx3nPSmyCHH9zuddIWgo0L1LoN6mnPHnnjBE7UoaVWB70ArhcgLhFkH wBq14VfW2mEZQ== From: Jisheng Zhang To: Palmer Dabbelt , Paul Walmsley , Albert Ou , Anup Patel , Atish Patra , Heiko Stuebner , Andrew Jones Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: [PATCH v2 13/13] riscv: remove riscv_isa_ext_keys[] array and related usage Date: Mon, 5 Dec 2022 01:46:32 +0800 Message-Id: <20221204174632.3677-14-jszhang@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221204174632.3677-1-jszhang@kernel.org> References: <20221204174632.3677-1-jszhang@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221204_095706_060575_961EA986 X-CRM114-Status: GOOD ( 11.19 ) X-Spam-Score: -5.4 (-----) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: All users have switched to riscv_has_extension_*, removed unused definitions, vars and related setting code. Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Heiko Stuebner --- arch/riscv/include/asm/hwcap.h | 30 [...] Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [2604:1380:4641:c500:0:0:0:1 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org All users have switched to riscv_has_extension_*, removed unused definitions, vars and related setting code. Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Heiko Stuebner Reviewed-by: Guo Ren Reviewed-by: Guo Ren Reviewed-by: Conor Dooley --- arch/riscv/include/asm/hwcap.h | 30 ------------------------------ arch/riscv/kernel/cpufeature.c | 9 --------- 2 files changed, 39 deletions(-) diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index e2d3f6df7701..be00a4337578 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -60,18 +60,6 @@ enum { extern unsigned long elf_hwcap; -/* - * This enum represents the logical ID for each RISC-V ISA extension static - * keys. We can use static key to optimize code path if some ISA extensions - * are available. - */ -enum riscv_isa_ext_key { - RISCV_ISA_EXT_KEY_FPU, /* For 'F' and 'D' */ - RISCV_ISA_EXT_KEY_ZIHINTPAUSE, - RISCV_ISA_EXT_KEY_SVINVAL, - RISCV_ISA_EXT_KEY_MAX, -}; - struct riscv_isa_ext_data { /* Name of the extension displayed to userspace via /proc/cpuinfo */ char uprop[RISCV_ISA_EXT_NAME_LEN_MAX]; @@ -79,24 +67,6 @@ struct riscv_isa_ext_data { unsigned int isa_ext_id; }; -extern struct static_key_false riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_MAX]; - -static __always_inline int riscv_isa_ext2key(int num) -{ - switch (num) { - case RISCV_ISA_EXT_f: - return RISCV_ISA_EXT_KEY_FPU; - case RISCV_ISA_EXT_d: - return RISCV_ISA_EXT_KEY_FPU; - case RISCV_ISA_EXT_ZIHINTPAUSE: - return RISCV_ISA_EXT_KEY_ZIHINTPAUSE; - case RISCV_ISA_EXT_SVINVAL: - return RISCV_ISA_EXT_KEY_SVINVAL; - default: - return -EINVAL; - } -} - static __always_inline bool riscv_has_extension_likely(const unsigned long ext) { diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index adeac90b1d8e..3240a2915bf1 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -28,9 +28,6 @@ unsigned long elf_hwcap __read_mostly; /* Host ISA bitmap */ static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __read_mostly; -DEFINE_STATIC_KEY_ARRAY_FALSE(riscv_isa_ext_keys, RISCV_ISA_EXT_KEY_MAX); -EXPORT_SYMBOL(riscv_isa_ext_keys); - /** * riscv_isa_extension_base() - Get base extension word * @@ -243,12 +240,6 @@ void __init riscv_fill_hwcap(void) if (elf_hwcap & BIT_MASK(i)) print_str[j++] = (char)('a' + i); pr_info("riscv: ELF capabilities %s\n", print_str); - - for_each_set_bit(i, riscv_isa, RISCV_ISA_EXT_MAX) { - j = riscv_isa_ext2key(i); - if (j >= 0) - static_branch_enable(&riscv_isa_ext_keys[j]); - } } #ifdef CONFIG_RISCV_ALTERNATIVE