From patchwork Tue Nov 22 15:01:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jit Loon Lim X-Patchwork-Id: 1707903 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=nN6tv3eE; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NGnYF4tRtz23nl for ; Wed, 23 Nov 2022 02:02:23 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 69AEC850C0; Tue, 22 Nov 2022 16:02:16 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="nN6tv3eE"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1F8818542E; Tue, 22 Nov 2022 16:02:15 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=0.9 required=5.0 tests=AC_FROM_MANY_DOTS,BAYES_00, DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, SPF_HELO_NONE,SPF_NONE autolearn=no autolearn_force=no version=3.4.2 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B75FE8363C for ; Tue, 22 Nov 2022 16:02:12 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=jitloonl@ecsmtp.png.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669129332; x=1700665332; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=Jeg6AZihTwkdo7j8++LaU9bz2BRpfHKhN07e6+HYX5s=; b=nN6tv3eE4d1q8vbwG6YhZUxOCPbGPkXlNs6J4CPtLolngJ16ywaVosUY cyoanTbeMxWy4+ocJL3GqXgO38wg6z8EX2PuPVgVpwyuewmAnw1k8kX+R 1QOZVA6NmK1XYhF8X7RxGsbgKylx9eGxLS/vHTfp4qMUMDTlrMKbaZu6a gux2N620l4uF6UiMwdP23eeDulm1rcyfZ72GGFRBHJVpAqcGdpOTm+bCP sakpXSFcgmh8SFM/W6uSs3yn2rqEiAH7SejpZKxNsk0XKjcWLqFc2J4U6 k6ZhXuek3dYwO2xqRF92K6lLtaOGBuzO50l9kMSh4WHmxvtnL5mbbNgIt g==; X-IronPort-AV: E=McAfee;i="6500,9779,10539"; a="311462216" X-IronPort-AV: E=Sophos;i="5.96,184,1665471600"; d="scan'208";a="311462216" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2022 07:01:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10539"; a="672510944" X-IronPort-AV: E=Sophos;i="5.96,184,1665471600"; d="scan'208";a="672510944" Received: from pglmail07.png.intel.com ([10.221.193.207]) by orsmga008.jf.intel.com with ESMTP; 22 Nov 2022 07:01:39 -0800 Received: from localhost (pgli0028.png.intel.com [10.221.84.177]) by pglmail07.png.intel.com (Postfix) with ESMTP id 8FE63482A; Tue, 22 Nov 2022 23:01:38 +0800 (+08) Received: by localhost (Postfix, from userid 12048045) id 8B00FE00214; Tue, 22 Nov 2022 23:01:38 +0800 (+08) From: Jit Loon Lim To: u-boot@lists.denx.de Cc: Jagan Teki , Vignesh R , Marek , Simon , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Jit Loon Lim , Sieu Mun Tang Subject: [PATCH] arm: socfpga: n5x: Enables mailbox functionality for QSPI before DDR Date: Tue, 22 Nov 2022 23:01:37 +0800 Message-Id: <20221122150137.28845-1-jit.loon.lim@intel.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Tien Fong Chee Enables mailbox functionality for QSPI before initializing DDR, because storing calibration data into QSPI is required when DDR retention is enabled. Signed-off-by: Tien Fong Chee Signed-off-by: Jit Loon Lim --- arch/arm/mach-socfpga/spl_n5x.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-socfpga/spl_n5x.c b/arch/arm/mach-socfpga/spl_n5x.c index c56b5a1b88..92037190e2 100644 --- a/arch/arm/mach-socfpga/spl_n5x.c +++ b/arch/arm/mach-socfpga/spl_n5x.c @@ -81,6 +81,12 @@ void board_init_f(ulong dummy) hang(); } + mbox_init(); + +#if IS_ENABLED(CONFIG_CADENCE_QSPI) + mbox_qspi_open(); +#endif + #if CONFIG_IS_ENABLED(ALTERA_SDRAM) ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) { @@ -88,10 +94,4 @@ void board_init_f(ulong dummy) hang(); } #endif - - mbox_init(); - -#ifdef CONFIG_CADENCE_QSPI - mbox_qspi_open(); -#endif }