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Wed, 16 Nov 2022 06:48:32 +0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 2AG6mS3x5898912 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 16 Nov 2022 06:48:28 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CDA704C040; Wed, 16 Nov 2022 06:48:28 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DBCAC4C044; Wed, 16 Nov 2022 06:48:26 +0000 (GMT) Received: from [9.197.233.36] (unknown [9.197.233.36]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 16 Nov 2022 06:48:26 +0000 (GMT) Message-ID: Date: Wed, 16 Nov 2022 14:48:25 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Content-Language: en-US Subject: [PATCH 1/2] rs6000: Emit vector fp comparison directly in rs6000_emit_vector_compare To: GCC Patches Cc: Segher Boessenkool , David Edelsohn , Peter Bergner , Michael Meissner X-TM-AS-GCONF: 00 X-Proofpoint-GUID: ZHUM9Wm41DPQ3ER_Wjs4J35SEQmGJ-bk X-Proofpoint-ORIG-GUID: MM0xQNkROM4Qvz08HP0QPiY1yYZV_dMS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-15_08,2022-11-15_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxlogscore=999 clxscore=1015 malwarescore=0 adultscore=0 impostorscore=0 phishscore=0 lowpriorityscore=0 mlxscore=0 priorityscore=1501 suspectscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211160046 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Kewen.Lin via Gcc-patches" From: "Kewen.Lin" Reply-To: "Kewen.Lin" Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi, All kinds of vector float comparison operators have been supported in one rtl comparison pattern as vector.md, we can just emit an rtx comparison insn with the given comparison operator in function rs6000_emit_vector_compare instead of checking and handling the reverse condition cases. This is also for a subsequent patch to deal with some comparison operators under trapping math enabled or disabled, so it's important to have one centralized place for vector float comparison handlings for better maintenance. Bootstrapped and regtested on powerpc64-linux-gnu P7 and P8, and powerpc64le-linux-gnu P9 and P10. I'm going to push this later this week if no objections. BR, Kewen ----- gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare_inner): Remove float only comparison operators. (rs6000_emit_vector_compare): Emit vector comparison insn directly for float modes. --- gcc/config/rs6000/rs6000.cc | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) -- 2.27.0 diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 635aced6105..56db12f08a0 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -15660,10 +15660,6 @@ rs6000_emit_vector_compare_inner (enum rtx_code code, rtx op0, rtx op1) case EQ: case GT: case GTU: - case ORDERED: - case UNORDERED: - case UNEQ: - case LTGT: mask = gen_reg_rtx (mode); emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, mode, op0, op1))); return mask; @@ -15681,12 +15677,24 @@ rs6000_emit_vector_compare (enum rtx_code rcode, machine_mode dmode) { rtx mask; - bool swap_operands = false; - bool try_again = false; - gcc_assert (VECTOR_UNIT_ALTIVEC_OR_VSX_P (dmode)); gcc_assert (GET_MODE (op0) == GET_MODE (op1)); + /* In vector.md, we support all kinds of vector float point + comparison operators in a comparison rtl pattern, we can + just emit the comparison rtx insn directly here. Besides, + we should have a centralized place to handle the possibility + of raising invalid exception. */ + if (GET_MODE_CLASS (dmode) == MODE_VECTOR_FLOAT) + { + mask = gen_reg_rtx (dmode); + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); + return mask; + } + + bool swap_operands = false; + bool try_again = false; + /* See if the comparison works as is. */ mask = rs6000_emit_vector_compare_inner (rcode, op0, op1); if (mask) @@ -15705,10 +15713,6 @@ rs6000_emit_vector_compare (enum rtx_code rcode, try_again = true; break; case NE: - case UNLE: - case UNLT: - case UNGE: - case UNGT: /* Invert condition and try again. e.g., A != B becomes ~(A==B). */ { From patchwork Wed Nov 16 06:51:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kewen.Lin" X-Patchwork-Id: 1704294 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Wed, 16 Nov 2022 06:45:09 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 378634C044; Wed, 16 Nov 2022 06:51:08 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 275294C040; Wed, 16 Nov 2022 06:51:06 +0000 (GMT) Received: from [9.197.233.36] (unknown [9.197.233.36]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 16 Nov 2022 06:51:05 +0000 (GMT) Message-ID: <247bf71b-e0ab-7cf7-098b-a106a0764301@linux.ibm.com> Date: Wed, 16 Nov 2022 14:51:04 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Subject: [PATCH 2/2] rs6000: Refine integer comparison handlings in rs6000_emit_vector_compare Content-Language: en-US To: GCC Patches Cc: Segher Boessenkool , David Edelsohn , Peter Bergner , Michael Meissner References: In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: WJmjDWiSh5_qxtefsuAVe2I6qw29lssD X-Proofpoint-GUID: IJMVGG1eAQsYl5PVSzDxxYEf5SBB3VpI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-15_08,2022-11-15_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 suspectscore=0 phishscore=0 adultscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 mlxlogscore=999 impostorscore=0 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211160046 X-Spam-Status: No, score=-11.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Kewen.Lin via Gcc-patches" From: "Kewen.Lin" Reply-To: "Kewen.Lin" Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi, The current handlings in rs6000_emit_vector_compare is a bit complicated to me, especially after we emit vector float comparison insn with the given code directly. This patch is to refine the handlings for vector integer comparison operators, it becomes not recursive, and we don't need the helper function rs6000_emit_vector_compare_inner any more. Bootstrapped and regtested on powerpc64-linux-gnu P7 and P8, and powerpc64le-linux-gnu P9 and P10. I'm going to push this later this week if no objections. BR, Kewen ----- gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare_inner): Remove. (rs6000_emit_vector_compare): Refine it by directly using the reversed or swapped code, to avoid the recursion. --- gcc/config/rs6000/rs6000.cc | 159 ++++++++---------------------------- 1 file changed, 34 insertions(+), 125 deletions(-) -- 2.27.0 diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 56db12f08a0..21f4cda7b80 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -15639,169 +15639,78 @@ output_cbranch (rtx op, const char *label, int reversed, rtx_insn *insn) return string; } -/* Return insn for VSX or Altivec comparisons. */ - -static rtx -rs6000_emit_vector_compare_inner (enum rtx_code code, rtx op0, rtx op1) -{ - rtx mask; - machine_mode mode = GET_MODE (op0); - - switch (code) - { - default: - break; - - case GE: - if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT) - return NULL_RTX; - /* FALLTHRU */ - - case EQ: - case GT: - case GTU: - mask = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, mode, op0, op1))); - return mask; - } - - return NULL_RTX; -} - /* Emit vector compare for operands OP0 and OP1 using code RCODE. - DMODE is expected destination mode. This is a recursive function. */ + DMODE is expected destination mode. */ static rtx rs6000_emit_vector_compare (enum rtx_code rcode, rtx op0, rtx op1, machine_mode dmode) { - rtx mask; gcc_assert (VECTOR_UNIT_ALTIVEC_OR_VSX_P (dmode)); gcc_assert (GET_MODE (op0) == GET_MODE (op1)); + rtx mask = gen_reg_rtx (dmode); /* In vector.md, we support all kinds of vector float point comparison operators in a comparison rtl pattern, we can just emit the comparison rtx insn directly here. Besides, we should have a centralized place to handle the possibility - of raising invalid exception. */ - if (GET_MODE_CLASS (dmode) == MODE_VECTOR_FLOAT) + of raising invalid exception. Also emit directly for vector + integer comparison operators EQ/GT/GTU. */ + if (GET_MODE_CLASS (dmode) == MODE_VECTOR_FLOAT + || rcode == EQ + || rcode == GT + || rcode == GTU) { - mask = gen_reg_rtx (dmode); emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); return mask; } bool swap_operands = false; - bool try_again = false; - - /* See if the comparison works as is. */ - mask = rs6000_emit_vector_compare_inner (rcode, op0, op1); - if (mask) - return mask; + bool need_invert = false; + enum rtx_code code = UNKNOWN; switch (rcode) { case LT: - rcode = GT; - swap_operands = true; - try_again = true; - break; case LTU: - rcode = GTU; + code = swap_condition (rcode); swap_operands = true; - try_again = true; break; case NE: - /* Invert condition and try again. - e.g., A != B becomes ~(A==B). */ - { - enum rtx_code rev_code; - enum insn_code nor_code; - rtx mask2; - - rev_code = reverse_condition_maybe_unordered (rcode); - if (rev_code == UNKNOWN) - return NULL_RTX; - - nor_code = optab_handler (one_cmpl_optab, dmode); - if (nor_code == CODE_FOR_nothing) - return NULL_RTX; - - mask2 = rs6000_emit_vector_compare (rev_code, op0, op1, dmode); - if (!mask2) - return NULL_RTX; - - mask = gen_reg_rtx (dmode); - emit_insn (GEN_FCN (nor_code) (mask, mask2)); - return mask; - } + case LE: + case LEU: + code = reverse_condition (rcode); + need_invert = true; break; case GE: + code = GT; + swap_operands = true; + need_invert = true; + break; case GEU: - case LE: - case LEU: - /* Try GT/GTU/LT/LTU OR EQ */ - { - rtx c_rtx, eq_rtx; - enum insn_code ior_code; - enum rtx_code new_code; - - switch (rcode) - { - case GE: - new_code = GT; - break; - - case GEU: - new_code = GTU; - break; - - case LE: - new_code = LT; - break; - - case LEU: - new_code = LTU; - break; - - default: - gcc_unreachable (); - } - - ior_code = optab_handler (ior_optab, dmode); - if (ior_code == CODE_FOR_nothing) - return NULL_RTX; - - c_rtx = rs6000_emit_vector_compare (new_code, op0, op1, dmode); - if (!c_rtx) - return NULL_RTX; - - eq_rtx = rs6000_emit_vector_compare (EQ, op0, op1, dmode); - if (!eq_rtx) - return NULL_RTX; - - mask = gen_reg_rtx (dmode); - emit_insn (GEN_FCN (ior_code) (mask, c_rtx, eq_rtx)); - return mask; - } + code = GTU; + swap_operands = true; + need_invert = true; break; default: - return NULL_RTX; + gcc_unreachable (); + break; } - if (try_again) - { - if (swap_operands) - std::swap (op0, op1); + if (swap_operands) + std::swap (op0, op1); + + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); - mask = rs6000_emit_vector_compare_inner (rcode, op0, op1); - if (mask) - return mask; + if (need_invert) + { + enum insn_code nor_code = optab_handler (one_cmpl_optab, dmode); + gcc_assert (nor_code != CODE_FOR_nothing); + emit_insn (GEN_FCN (nor_code) (mask, mask)); } - /* You only get two chances. */ - return NULL_RTX; + return mask; } /* Emit vector conditional expression. DEST is destination. OP_TRUE and