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[2003:e4:1f20:1d00:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id f20-20020a05600c155400b003c6f3e5ba42sm10971448wmg.46.2022.11.11.08.18.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Nov 2022 08:18:12 -0800 (PST) From: Thierry Reding To: Rob Herring , Joerg Roedel Cc: Will Deacon , Robin Murphy , Nicolin Chen , Krishna Reddy , Ashish Mhetre , Dmitry Osipenko , Alyssa Rosenzweig , Janne Grunau , Sameer Pujar , Lucas Stach , devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-tegra@vger.kernel.org, asahi@lists.linux.dev Subject: [PATCH v11 1/5] of: Introduce support for #dma-{address,size}-cells Date: Fri, 11 Nov 2022 17:18:02 +0100 Message-Id: <20221111161806.630527-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221111161806.630527-1-thierry.reding@gmail.com> References: <20221111161806.630527-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding The control and DMA busses of a system can have differing addressing requirements. One common case of this is SoCs with CPUs that can address more than 32 bits of system memory, but for simplicity want to describe the control busses using #address-cells = <1> and #size-cells = <1>. In this case, DMA address translation will fail because > 32-bit addresses will be truncated to 32-bit addresses. Support for the new #dma-address-cells and #dma-size-cells properties is introduced in this patch. If these are encountered, they will be used instead of the #address-and #size-cells properties when translating DMA addresses. Signed-off-by: Thierry Reding --- Changes in v11: - new patch drivers/of/address.c | 43 ++++++++++++----------- drivers/of/base.c | 70 ++++++++++++++++++++++++++++++-------- drivers/of/of_private.h | 14 ++++++-- include/linux/of.h | 17 +++++++-- include/linux/of_address.h | 2 +- 5 files changed, 108 insertions(+), 38 deletions(-) diff --git a/drivers/of/address.c b/drivers/of/address.c index c34ac33b7338..db59bc60226c 100644 --- a/drivers/of/address.c +++ b/drivers/of/address.c @@ -45,8 +45,8 @@ struct of_bus { const char *name; const char *addresses; int (*match)(struct device_node *parent); - void (*count_cells)(struct device_node *child, - int *addrc, int *sizec); + void (*count_cells)(struct device_node *child, int *addrc, int *sizec, + unsigned int flags); u64 (*map)(__be32 *addr, const __be32 *range, int na, int ns, int pna); int (*translate)(__be32 *addr, u64 offset, int na); @@ -58,13 +58,13 @@ struct of_bus { * Default translator (generic bus) */ -static void of_bus_default_count_cells(struct device_node *dev, - int *addrc, int *sizec) +static void of_bus_default_count_cells(struct device_node *dev, int *addrc, int *sizec, + unsigned int flags) { if (addrc) - *addrc = of_n_addr_cells(dev); + *addrc = of_addr_cells(dev, flags); if (sizec) - *sizec = of_n_size_cells(dev); + *sizec = of_size_cells(dev, flags); } static u64 of_bus_default_map(__be32 *addr, const __be32 *range, @@ -155,8 +155,8 @@ static int of_bus_pci_match(struct device_node *np) of_node_is_pcie(np); } -static void of_bus_pci_count_cells(struct device_node *np, - int *addrc, int *sizec) +static void of_bus_pci_count_cells(struct device_node *np, int *addrc, int *sizec, + unsigned int flags) { if (addrc) *addrc = 3; @@ -272,8 +272,8 @@ static int of_bus_isa_match(struct device_node *np) return of_node_name_eq(np, "isa"); } -static void of_bus_isa_count_cells(struct device_node *child, - int *addrc, int *sizec) +static void of_bus_isa_count_cells(struct device_node *child, int *addrc, int *sizec, + unsigned int flags) { if (addrc) *addrc = 2; @@ -475,6 +475,7 @@ static u64 __of_translate_address(struct device_node *dev, const __be32 *in_addr, const char *rprop, struct device_node **host) { + unsigned int flags = (rprop && !strcmp(rprop, "dma-ranges")) ? OF_CELLS_DMA : 0; struct device_node *parent = NULL; struct of_bus *bus, *pbus; __be32 addr[OF_MAX_ADDR_CELLS]; @@ -494,7 +495,7 @@ static u64 __of_translate_address(struct device_node *dev, bus = of_match_bus(parent); /* Count address cells & copy address locally */ - bus->count_cells(dev, &na, &ns); + bus->count_cells(dev, &na, &ns, flags); if (!OF_CHECK_COUNTS(na, ns)) { pr_debug("Bad cell count for %pOF\n", dev); goto bail; @@ -536,7 +537,7 @@ static u64 __of_translate_address(struct device_node *dev, /* Get new parent bus and counts */ pbus = of_match_bus(parent); - pbus->count_cells(dev, &pna, &pns); + pbus->count_cells(dev, &pna, &pns, flags); if (!OF_CHECK_COUNTS(pna, pns)) { pr_err("Bad cell count for %pOF\n", dev); break; @@ -644,7 +645,7 @@ const __be32 *__of_get_address(struct device_node *dev, int index, int bar_no, of_node_put(parent); return NULL; } - bus->count_cells(dev, &na, &ns); + bus->count_cells(dev, &na, &ns, false); of_node_put(parent); if (!OF_CHECK_ADDR_COUNT(na)) return NULL; @@ -677,11 +678,15 @@ static int parser_init(struct of_pci_range_parser *parser, { int rlen; + if (strcmp(name, "dma-ranges") == 0) + parser->flags = OF_CELLS_DMA; + else + parser->flags = 0; + parser->node = node; - parser->pna = of_n_addr_cells(node); - parser->na = of_bus_n_addr_cells(node); - parser->ns = of_bus_n_size_cells(node); - parser->dma = !strcmp(name, "dma-ranges"); + parser->pna = of_addr_cells(node, parser->flags); + parser->na = of_bus_addr_cells(node, parser->flags); + parser->ns = of_bus_size_cells(node, parser->flags); parser->bus = of_match_bus(node); parser->range = of_get_property(node, name, &rlen); @@ -730,7 +735,7 @@ struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser, range->bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na); - if (parser->dma) + if (parser->flags & OF_CELLS_DMA) range->cpu_addr = of_translate_dma_address(parser->node, parser->range + na); else @@ -747,7 +752,7 @@ struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser, flags = parser->bus->get_flags(parser->range); bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na); - if (parser->dma) + if (parser->flags & OF_CELLS_DMA) cpu_addr = of_translate_dma_address(parser->node, parser->range + na); else diff --git a/drivers/of/base.c b/drivers/of/base.c index d5a5c35eba72..39556fa7a13b 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -86,47 +86,89 @@ static bool __of_node_is_type(const struct device_node *np, const char *type) return np && match && type && !strcmp(match, type); } -int of_bus_n_addr_cells(struct device_node *np) +int of_bus_addr_cells(struct device_node *np, unsigned int flags) { + struct device_node *parent; u32 cells; - for (; np; np = np->parent) + while (np) { + if (flags & OF_CELLS_DMA) + if (!of_property_read_u32(np, "#dma-address-cells", &cells)) + return cells; + if (!of_property_read_u32(np, "#address-cells", &cells)) return cells; + if (flags & OF_CELLS_DMA) + parent = __of_get_dma_parent(np); + else + parent = of_node_get(np->parent); + + of_node_put(np); + np = parent; + } + /* No #address-cells property for the root node */ return OF_ROOT_NODE_ADDR_CELLS_DEFAULT; } -int of_n_addr_cells(struct device_node *np) +int of_addr_cells(struct device_node *np, unsigned int flags) { - if (np->parent) - np = np->parent; + int cells; + + if (flags & OF_CELLS_DMA) + np = __of_get_dma_parent(np); + else if (np->parent) + np = of_node_get(np->parent); + + cells = of_bus_addr_cells(np, flags); - return of_bus_n_addr_cells(np); + of_node_put(np); + return cells; } -EXPORT_SYMBOL(of_n_addr_cells); +EXPORT_SYMBOL(of_addr_cells); -int of_bus_n_size_cells(struct device_node *np) +int of_bus_size_cells(struct device_node *np, unsigned int flags) { + struct device_node *parent; u32 cells; - for (; np; np = np->parent) + while (np) { + if (flags & OF_CELLS_DMA) + if (!of_property_read_u32(np, "#dma-size-cells", &cells)) + return cells; + if (!of_property_read_u32(np, "#size-cells", &cells)) return cells; + if (flags & OF_CELLS_DMA) + parent = __of_get_dma_parent(np); + else + parent = of_node_get(np->parent); + + of_node_put(np); + np = parent; + } + /* No #size-cells property for the root node */ return OF_ROOT_NODE_SIZE_CELLS_DEFAULT; } -int of_n_size_cells(struct device_node *np) +int of_size_cells(struct device_node *np, unsigned int flags) { - if (np->parent) - np = np->parent; + int cells; + + if (flags & OF_CELLS_DMA) + np = __of_get_dma_parent(np); + else if (np->parent) + np = of_node_get(np->parent); + + cells = of_bus_size_cells(np, flags); - return of_bus_n_size_cells(np); + of_node_put(np); + return cells; } -EXPORT_SYMBOL(of_n_size_cells); +EXPORT_SYMBOL(of_size_cells); #ifdef CONFIG_NUMA int __weak of_node_to_nid(struct device_node *np) diff --git a/drivers/of/of_private.h b/drivers/of/of_private.h index fb6792d381a6..f57900c3f25c 100644 --- a/drivers/of/of_private.h +++ b/drivers/of/of_private.h @@ -148,8 +148,18 @@ extern void __of_sysfs_remove_bin_file(struct device_node *np, #define for_each_transaction_entry_reverse(_oft, _te) \ list_for_each_entry_reverse(_te, &(_oft)->te_list, node) -extern int of_bus_n_addr_cells(struct device_node *np); -extern int of_bus_n_size_cells(struct device_node *np); +extern int of_bus_addr_cells(struct device_node *np, unsigned int flags); +extern int of_bus_size_cells(struct device_node *np, unsigned int flags); + +static inline int of_bus_n_addr_cells(struct device_node *np) +{ + return of_bus_addr_cells(np, 0); +} + +static inline int of_bus_n_size_cells(struct device_node *np) +{ + return of_bus_size_cells(np, 0); +} struct bus_dma_region; #if defined(CONFIG_OF_ADDRESS) && defined(CONFIG_HAS_DMA) diff --git a/include/linux/of.h b/include/linux/of.h index 8b9f94386dc3..dd4d4b3c8636 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -358,8 +358,21 @@ extern u64 of_get_cpu_hwid(struct device_node *cpun, unsigned int thread); #define for_each_property_of_node(dn, pp) \ for (pp = dn->properties; pp != NULL; pp = pp->next) -extern int of_n_addr_cells(struct device_node *np); -extern int of_n_size_cells(struct device_node *np); +#define OF_CELLS_DMA 0x1 + +extern int of_addr_cells(struct device_node *np, unsigned int flags); +extern int of_size_cells(struct device_node *np, unsigned int flags); + +static inline int of_n_addr_cells(struct device_node *np) +{ + return of_addr_cells(np, 0); +} + +static inline int of_n_size_cells(struct device_node *np) +{ + return of_size_cells(np, 0); +} + extern const struct of_device_id *of_match_node( const struct of_device_id *matches, const struct device_node *node); extern int of_modalias_node(struct device_node *node, char *modalias, int len); diff --git a/include/linux/of_address.h b/include/linux/of_address.h index 265f26eeaf6b..15354085ea35 100644 --- a/include/linux/of_address.h +++ b/include/linux/of_address.h @@ -16,7 +16,7 @@ struct of_pci_range_parser { int na; int ns; int pna; - bool dma; + unsigned int flags; }; #define of_range_parser of_pci_range_parser From patchwork Fri Nov 11 16:18:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1702875 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[2003:e4:1f20:1d00:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id m3-20020a5d6243000000b0023660f6cecfsm2269975wrv.80.2022.11.11.08.18.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Nov 2022 08:18:13 -0800 (PST) From: Thierry Reding To: Rob Herring , Joerg Roedel Cc: Will Deacon , Robin Murphy , Nicolin Chen , Krishna Reddy , Ashish Mhetre , Dmitry Osipenko , Alyssa Rosenzweig , Janne Grunau , Sameer Pujar , Lucas Stach , devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-tegra@vger.kernel.org, asahi@lists.linux.dev Subject: [PATCH v11 2/5] of: Introduce of_translate_dma_region() Date: Fri, 11 Nov 2022 17:18:03 +0100 Message-Id: <20221111161806.630527-3-thierry.reding@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221111161806.630527-1-thierry.reding@gmail.com> References: <20221111161806.630527-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding This function is similar to of_translate_dma_address() but also reads a length in addition to an address from a device tree property. Signed-off-by: Thierry Reding --- Changes in v11: - updated to use #dma-{address,size}-cells Changes in v10: - new patch drivers/of/address.c | 41 ++++++++++++++++++++++++++++++++++++++ include/linux/of_address.h | 2 ++ 2 files changed, 43 insertions(+) diff --git a/drivers/of/address.c b/drivers/of/address.c index db59bc60226c..89b9f4fbad8f 100644 --- a/drivers/of/address.c +++ b/drivers/of/address.c @@ -627,6 +627,47 @@ u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) } EXPORT_SYMBOL(of_translate_dma_address); +/** + * of_translate_dma_region - Translate device tree address and size tuple + * @dev: device tree node for which to translate + * @prop: pointer into array of cells + * @start: return value for the start of the DMA range + * @length: return value for the length of the DMA range + * + * Returns a pointer to the cell immediately following the translated DMA region. + */ +const __be32 *of_translate_dma_region(struct device_node *dev, const __be32 *prop, + phys_addr_t *start, size_t *length) +{ + struct device_node *parent; + u64 address, size; + int na, ns; + + parent = __of_get_dma_parent(dev); + if (!parent) + return NULL; + + na = of_bus_addr_cells(parent, OF_CELLS_DMA); + ns = of_bus_size_cells(parent, OF_CELLS_DMA); + + of_node_put(parent); + + address = of_translate_dma_address(dev, prop); + if (address == OF_BAD_ADDR) + return NULL; + + size = of_read_number(prop + na, ns); + + if (start) + *start = address; + + if (length) + *length = size; + + return prop + na + ns; +} +EXPORT_SYMBOL(of_translate_dma_region); + const __be32 *__of_get_address(struct device_node *dev, int index, int bar_no, u64 *size, unsigned int *flags) { diff --git a/include/linux/of_address.h b/include/linux/of_address.h index 15354085ea35..a05c35b40295 100644 --- a/include/linux/of_address.h +++ b/include/linux/of_address.h @@ -38,6 +38,8 @@ struct of_pci_range { /* Translate a DMA address from device space to CPU space */ extern u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr); +extern const __be32 *of_translate_dma_region(struct device_node *dev, const __be32 *addr, + phys_addr_t *start, size_t *length); #ifdef CONFIG_OF_ADDRESS extern u64 of_translate_address(struct device_node *np, const __be32 *addr); From patchwork Fri Nov 11 16:18:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1702876 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=RYfvkp9P; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4N83lw0v5rz23mc for ; Sat, 12 Nov 2022 03:18:20 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233982AbiKKQSS (ORCPT ); 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[2003:e4:1f20:1d00:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id bi14-20020a05600c3d8e00b003b95ed78275sm3279291wmb.20.2022.11.11.08.18.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Nov 2022 08:18:15 -0800 (PST) From: Thierry Reding To: Rob Herring , Joerg Roedel Cc: Will Deacon , Robin Murphy , Nicolin Chen , Krishna Reddy , Ashish Mhetre , Dmitry Osipenko , Alyssa Rosenzweig , Janne Grunau , Sameer Pujar , Lucas Stach , devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-tegra@vger.kernel.org, asahi@lists.linux.dev, Rob Herring Subject: [PATCH v11 3/5] dt-bindings: reserved-memory: Document iommu-addresses Date: Fri, 11 Nov 2022 17:18:04 +0100 Message-Id: <20221111161806.630527-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221111161806.630527-1-thierry.reding@gmail.com> References: <20221111161806.630527-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding This adds the "iommu-addresses" property to reserved-memory nodes, which allow describing the interaction of memory regions with IOMMUs. Two use- cases are supported: 1. Static mappings can be described by pairing the "iommu-addresses" property with a "reg" property. This is mostly useful for adopting firmware-allocated buffers via identity mappings. One common use- case where this is required is if early firmware or bootloaders have set up a bootsplash framebuffer that a display controller is actively scanning out from during the operating system boot process. 2. If an "iommu-addresses" property exists without a "reg" property, the reserved-memory node describes an IOVA reservation. Such memory regions are excluded from the IOVA space available to operating system drivers and can be used for regions that must not be used to map arbitrary buffers. Each mapping or reservation is tied to a specific device via a phandle to the device's device tree node. This allows a reserved-memory region to be reused across multiple devices. Reviewed-by: Rob Herring Reviewed-by: Robin Murphy Signed-off-by: Thierry Reding --- Changes in v10: - mark iommu-addresses as required in the absence of reg and size Changes in v9: - add Reviewed-by tags Changes in v8: - include validation warnings that had crept into an unrelated patch Changes in v7: - keep reserved-memory.txt to avoid broken references Changes in v6: - add device phandle to iommu-addresses property in examples - remove now unused dt-bindings/reserved-memory.h header .../reserved-memory/reserved-memory.yaml | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml index 44f72bcf1782..07711fb30518 100644 --- a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml +++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml @@ -52,6 +52,30 @@ properties: Address and Length pairs. Specifies regions of memory that are acceptable to allocate from. + iommu-addresses: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: > + A list of phandle and specifier pairs that describe static IO virtual + address space mappings and carveouts associated with a given reserved + memory region. The phandle in the first cell refers to the device for + which the mapping or carveout is to be created. + + The specifier consists of an address/size pair and denotes the IO + virtual address range of the region for the given device. The exact + format depends on the values of the "#address-cells" and "#size-cells" + properties of the device referenced via the phandle. + + When used in combination with a "reg" property, an IOVA mapping is to + be established for this memory region. One example where this can be + useful is to create an identity mapping for physical memory that the + firmware has configured some hardware to access (such as a bootsplash + framebuffer). + + If no "reg" property is specified, the "iommu-addresses" property + defines carveout regions in the IOVA space for the given device. This + can be useful if a certain memory region should not be mapped through + the IOMMU. + no-map: type: boolean description: > @@ -95,6 +119,55 @@ oneOf: - required: - size + - required: + - iommu-addresses + additionalProperties: true +examples: + - | + / { + compatible = "foo"; + model = "foo"; + + #address-cells = <2>; + #size-cells = <2>; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + adsp_resv: reservation-adsp { + /* + * Restrict IOVA mappings for ADSP buffers to the 512 MiB region + * from 0x40000000 - 0x5fffffff. Anything outside is reserved by + * the ADSP for I/O memory and private memory allocations. + */ + iommu-addresses = <&adsp 0x0 0x00000000 0x00 0x40000000>, + <&adsp 0x0 0x60000000 0xff 0xa0000000>; + }; + + fb: framebuffer@90000000 { + reg = <0x0 0x90000000 0x0 0x00800000>; + iommu-addresses = <&dc0 0x0 0x90000000 0x0 0x00800000>; + }; + }; + + bus@0 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0x40000000>; + + adsp: adsp@2990000 { + reg = <0x2990000 0x2000>; + memory-region = <&adsp_resv>; + }; + + dc0: display@15200000 { + reg = <0x15200000 0x10000>; + memory-region = <&fb>; + }; + }; + }; ... From patchwork Fri Nov 11 16:18:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1702878 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=m0MVD/Cd; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4N83lz2Q9pz23lT for ; Sat, 12 Nov 2022 03:18:23 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233958AbiKKQSW (ORCPT ); Fri, 11 Nov 2022 11:18:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234002AbiKKQSV (ORCPT ); Fri, 11 Nov 2022 11:18:21 -0500 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 93A0E68AD8; Fri, 11 Nov 2022 08:18:19 -0800 (PST) Received: by mail-wr1-x431.google.com with SMTP id d9so2391467wrm.13; Fri, 11 Nov 2022 08:18:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UFYlmsCB+de1MKykLCFPxeRpHC1cNZyXUBWiz3WJZhE=; b=m0MVD/CdFH+Jhub9b9cVXL6+v2ZVLU8Qv8Aa0UDEUvxL1PsQuSFDx9p5QdfS1QYZmQ XIxtxjPdPpdNGg2NqbZXqV2hgkAYTuW3Gqi9KtBO1x4NyyCnY0Q7NlZkwnaWaq9MUbvo aQOLokkP++DqOwCb9Wn+lb9FiE3BCXTGQM0Pd3tMN888p2rTj5YsO9gzwNwlwtfEoS6P M2EToW5HmtBHpu6Amc2lQt/6Gn9YOtwRthyyejgWm1aBMNOyc6QqpWRmr4KlTkEesp+P RpxXrb1yVYaFBmq4FvauFBK8AHdQGOZ09LpCwBT1/znXjEkSSOCbFC9AFyL9UJ2gmjeo LMOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UFYlmsCB+de1MKykLCFPxeRpHC1cNZyXUBWiz3WJZhE=; b=nNLJNrBGe5D6fd2yc00f+uq2E29wV2zrLsV/r6TNYRkmFCxohsrkbMSYNmQ1rCBrMU Zb2O0E5Y50yW65mj4r7dmiNfqQn+XE67kICkuELkcl00XueEyylF0aEcweINTj4Vq08q Y2tnR/kORjnj3tcaKaelhaQDTRRHOxyeZSdsrBadX2IDofbT5FCX+dYn6AN8TNE5fKee HhbbsYsL5MqV44BmFwbtMXDDMCdm9PVrgrfndFX6AYtMvs33wOYvWcHGqnQULgJk4Jjs Rtkw1yReT0oUrZ9Q9hNG/ZPbMJaN1jdt+rjWDjtzi/zApO4g6X8zjlvRKnZ+kg9bvfr1 qptQ== X-Gm-Message-State: ANoB5pn0FpuRUl4UYTQaFsN5sD7Bby25jx6zVmy6/sq9hgyPVJELx2QE xgWk5x3/GT368z09az818+A= X-Google-Smtp-Source: AA0mqf53WVJ+L6bov99XmumvVtupfxkS3Af7POoygSof3WxWKR0KRGYMzenSg9pN/4P7jCtGKnHnaA== X-Received: by 2002:a5d:528c:0:b0:22f:da60:345 with SMTP id c12-20020a5d528c000000b0022fda600345mr1721302wrv.218.1668183497900; Fri, 11 Nov 2022 08:18:17 -0800 (PST) Received: from localhost (p200300e41f201d00f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f20:1d00:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id z8-20020adfec88000000b00236722ebe66sm2297016wrn.75.2022.11.11.08.18.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Nov 2022 08:18:16 -0800 (PST) From: Thierry Reding To: Rob Herring , Joerg Roedel Cc: Will Deacon , Robin Murphy , Nicolin Chen , Krishna Reddy , Ashish Mhetre , Dmitry Osipenko , Alyssa Rosenzweig , Janne Grunau , Sameer Pujar , Lucas Stach , devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-tegra@vger.kernel.org, asahi@lists.linux.dev, Frank Rowand , Rob Herring Subject: [PATCH v11 4/5] iommu: Implement of_iommu_get_resv_regions() Date: Fri, 11 Nov 2022 17:18:05 +0100 Message-Id: <20221111161806.630527-5-thierry.reding@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221111161806.630527-1-thierry.reding@gmail.com> References: <20221111161806.630527-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding This is an implementation that IOMMU drivers can use to obtain reserved memory regions from a device tree node. It uses the reserved-memory DT bindings to find the regions associated with a given device. If these regions are marked accordingly, identity mappings will be created for them in the IOMMU domain that the devices will be attached to. Cc: Frank Rowand Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring Signed-off-by: Thierry Reding --- Changes in v10: - extract more code into the new iommu_resv_region_get_type() function - rename variables for physical and I/O virtual addresses for clarity - default to IOMMU_RESV_DIRECT instead of IOMMU_RESV_DIRECT_RELAXABLE - use newly introduced of_translate_dma_region() Changes in v9: - address review comments by Robin Murphy: - warn about non-direct mappings since they are not supported yet - cleanup code to require less indentation - narrow scope of variables Changes in v8: - cleanup set-but-unused variables Changes in v6: - remove reference to now unused dt-bindings/reserved-memory.h include Changes in v5: - update for new "iommu-addresses" device tree bindings Changes in v4: - fix build failure on !CONFIG_OF_ADDRESS Changes in v3: - change "active" property to identity mapping flag that is part of the memory region specifier (as defined by #memory-region-cells) to allow per-reference flags to be used Changes in v2: - use "active" property to determine whether direct mappings are needed drivers/iommu/of_iommu.c | 94 ++++++++++++++++++++++++++++++++++++++++ include/linux/of_iommu.h | 8 ++++ 2 files changed, 102 insertions(+) diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index 5696314ae69e..fa7c63a4abbf 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -172,3 +173,96 @@ const struct iommu_ops *of_iommu_configure(struct device *dev, return ops; } + +static enum iommu_resv_type iommu_resv_region_get_type(struct device *dev, struct resource *phys, + phys_addr_t start, size_t length) +{ + phys_addr_t end = start + length - 1; + + /* + * IOMMU regions without an associated physical region cannot be + * mapped and are simply reservations. + */ + if (phys->start >= phys->end) + return IOMMU_RESV_RESERVED; + + /* may be IOMMU_RESV_DIRECT_RELAXABLE for certain cases */ + if (start == phys->start && end == phys->end) + return IOMMU_RESV_DIRECT; + + dev_warn(dev, "treating non-direct mapping [%pr] -> [%pap-%pap] as reservation\n", &phys, + &start, &end); + return IOMMU_RESV_RESERVED; +} + +/** + * of_iommu_get_resv_regions - reserved region driver helper for device tree + * @dev: device for which to get reserved regions + * @list: reserved region list + * + * IOMMU drivers can use this to implement their .get_resv_regions() callback + * for memory regions attached to a device tree node. See the reserved-memory + * device tree bindings on how to use these: + * + * Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + */ +void of_iommu_get_resv_regions(struct device *dev, struct list_head *list) +{ +#if IS_ENABLED(CONFIG_OF_ADDRESS) + struct of_phandle_iterator it; + int err; + + of_for_each_phandle(&it, err, dev->of_node, "memory-region", NULL, 0) { + const __be32 *maps, *end; + struct resource phys; + int size; + + memset(&phys, 0, sizeof(phys)); + + /* + * The "reg" property is optional and can be omitted by reserved-memory regions + * that represent reservations in the IOVA space, which are regions that should + * not be mapped. + */ + if (of_find_property(it.node, "reg", NULL)) { + err = of_address_to_resource(it.node, 0, &phys); + if (err < 0) { + dev_err(dev, "failed to parse memory region %pOF: %d\n", + it.node, err); + continue; + } + } + + maps = of_get_property(it.node, "iommu-addresses", &size); + if (!maps) + continue; + + end = maps + size / sizeof(__be32); + + while (maps < end) { + struct device_node *np; + u32 phandle; + + phandle = be32_to_cpup(maps++); + np = of_find_node_by_phandle(phandle); + + if (np == dev->of_node) { + int prot = IOMMU_READ | IOMMU_WRITE; + struct iommu_resv_region *region; + enum iommu_resv_type type; + phys_addr_t iova; + size_t length; + + maps = of_translate_dma_region(np, maps, &iova, &length); + type = iommu_resv_region_get_type(dev, &phys, iova, length); + + region = iommu_alloc_resv_region(iova, length, prot, type, + GFP_KERNEL); + if (region) + list_add_tail(®ion->list, list); + } + } + } +#endif +} +EXPORT_SYMBOL(of_iommu_get_resv_regions); diff --git a/include/linux/of_iommu.h b/include/linux/of_iommu.h index 55c1eb300a86..9a5e6b410dd2 100644 --- a/include/linux/of_iommu.h +++ b/include/linux/of_iommu.h @@ -12,6 +12,9 @@ extern const struct iommu_ops *of_iommu_configure(struct device *dev, struct device_node *master_np, const u32 *id); +extern void of_iommu_get_resv_regions(struct device *dev, + struct list_head *list); + #else static inline const struct iommu_ops *of_iommu_configure(struct device *dev, @@ -21,6 +24,11 @@ static inline const struct iommu_ops *of_iommu_configure(struct device *dev, return NULL; } +static inline void of_iommu_get_resv_regions(struct device *dev, + struct list_head *list) +{ +} + #endif /* CONFIG_OF_IOMMU */ #endif /* __OF_IOMMU_H */ From patchwork Fri Nov 11 16:18:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1702880 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=M52kVvCd; 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[2003:e4:1f20:1d00:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id s13-20020adfea8d000000b00228d67db06esm2308030wrm.21.2022.11.11.08.18.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Nov 2022 08:18:18 -0800 (PST) From: Thierry Reding To: Rob Herring , Joerg Roedel Cc: Will Deacon , Robin Murphy , Nicolin Chen , Krishna Reddy , Ashish Mhetre , Dmitry Osipenko , Alyssa Rosenzweig , Janne Grunau , Sameer Pujar , Lucas Stach , devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-tegra@vger.kernel.org, asahi@lists.linux.dev, Frank Rowand Subject: [PATCH v11 5/5] iommu: dma: Use of_iommu_get_resv_regions() Date: Fri, 11 Nov 2022 17:18:06 +0100 Message-Id: <20221111161806.630527-6-thierry.reding@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221111161806.630527-1-thierry.reding@gmail.com> References: <20221111161806.630527-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding For device tree nodes, use the standard of_iommu_get_resv_regions() implementation to obtain the reserved memory regions associated with a device. Cc: Rob Herring Cc: Frank Rowand Cc: devicetree@vger.kernel.org Signed-off-by: Thierry Reding --- drivers/iommu/dma-iommu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 9297b741f5e8..709b05d3aad2 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -391,6 +392,8 @@ void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list) if (!is_of_node(dev_iommu_fwspec_get(dev)->iommu_fwnode)) iort_iommu_get_resv_regions(dev, list); + if (dev->of_node) + of_iommu_get_resv_regions(dev, list); } EXPORT_SYMBOL(iommu_dma_get_resv_regions);