From patchwork Wed Nov 9 07:21:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xi Ruoyao X-Patchwork-Id: 1701645 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=ktPWTj+j; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N6c063Z2Tz23lT for ; Wed, 9 Nov 2022 18:23:50 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 77BAD388B69A for ; Wed, 9 Nov 2022 07:23:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 77BAD388B69A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667978628; bh=RggD1Vm/Jdi0f7jbQ5OReSxaGHia3RrXeR/9/dOlaWc=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=ktPWTj+jgsLMMtZIk6Rk3quICbmVW0rLGMyppBv0PlT9fRsaUV7laMg6AZKAqNPCA 1aNTY0sWVLOTftICGQjpYaK7AgvWgz5oxPhuaiNK2kipoxa6HZnlB8u/uD5ETdmOEN DtjpzQA7AcQAGqCvDnJzjgACCzq+A7JHK44s18G0= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from xry111.site (xry111.site [89.208.246.23]) by sourceware.org (Postfix) with ESMTPS id 1D4C83861C4D for ; Wed, 9 Nov 2022 07:22:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1D4C83861C4D Received: from xry111-x57s1.. (unknown [IPv6:240e:358:113a:1300:dc73:854d:832e:2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 05EA165DCC; Wed, 9 Nov 2022 02:22:31 -0500 (EST) To: gcc-patches@gcc.gnu.org Cc: Lulu Cheng , Wang Xuerui , Chenghua Xu , Xiaolin Tang , Xi Ruoyao Subject: [PATCH 1/4] LoongArch: Rename frint_ to rint2 Date: Wed, 9 Nov 2022 15:21:44 +0800 Message-Id: <20221109072147.789090-2-xry111@xry111.site> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221109072147.789090-1-xry111@xry111.site> References: <20221109072147.789090-1-xry111@xry111.site> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FROM_SUSPICIOUS_NTLD, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, LIKELY_SPAM_FROM, PDS_OTHER_BAD_TLD, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Xi Ruoyao via Gcc-patches From: Xi Ruoyao Reply-To: Xi Ruoyao Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Use standard name so __builtin_rint{,f} can be expanded to one instruction. gcc/ChangeLog: * config/loongarch/loongarch.md (frint_): Rename to .. (rint2): .. this. gcc/testsuite/ChangeLog: * gcc.target/loongarch/frint.c: New test. --- gcc/config/loongarch/loongarch.md | 4 ++-- gcc/testsuite/gcc.target/loongarch/frint.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/loongarch/frint.c diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index bda34d0f3db..a14ab14ac24 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -2012,8 +2012,8 @@ (define_insn "lui_h_hi12" [(set_attr "type" "move")] ) -;; Convert floating-point numbers to integers -(define_insn "frint_" +;; Round floating-point numbers to integers +(define_insn "rint2" [(set (match_operand:ANYF 0 "register_operand" "=f") (unspec:ANYF [(match_operand:ANYF 1 "register_operand" "f")] UNSPEC_FRINT))] diff --git a/gcc/testsuite/gcc.target/loongarch/frint.c b/gcc/testsuite/gcc.target/loongarch/frint.c new file mode 100644 index 00000000000..3ee6a8f973a --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/frint.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mdouble-float" } */ +/* { dg-final { scan-assembler "frint\\.s" } } */ +/* { dg-final { scan-assembler "frint\\.d" } } */ + +double +my_rint (double a) +{ + return __builtin_rint (a); +} + +float +my_rintf (float a) +{ + return __builtin_rintf (a); +} From patchwork Wed Nov 9 07:21:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xi Ruoyao X-Patchwork-Id: 1701641 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=ZdTCOcsT; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N6bzF473nz23mK for ; Wed, 9 Nov 2022 18:23:05 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 23FE43888C4E for ; Wed, 9 Nov 2022 07:23:03 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 23FE43888C4E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667978583; bh=i9WLwBIVHh9rzyXRnfdeQQv1Ec0mxTtvUW5vDxPf8rc=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=ZdTCOcsTgozCSgbjd3fBqGRuhrrmuGbA3YPPjzB6rIEbvxFSNh+rcZ0BlgoaZdgKI btOVAp+rxGi2bzULIMskYZsTOm8gYD6VTyiaW0R0/XblR5gFMdyRwTB+/C6KDCFcWE eDcVOaUPX8iT3KI0THqJcU9bFOl+vBEnHSkllLsw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from xry111.site (xry111.site [89.208.246.23]) by sourceware.org (Postfix) with ESMTPS id CDCD83858D38 for ; Wed, 9 Nov 2022 07:22:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CDCD83858D38 Received: from xry111-x57s1.. (unknown [IPv6:240e:358:113a:1300:dc73:854d:832e:2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 32CD165DC9; Wed, 9 Nov 2022 02:22:35 -0500 (EST) To: gcc-patches@gcc.gnu.org Cc: Lulu Cheng , Wang Xuerui , Chenghua Xu , Xiaolin Tang , Xi Ruoyao Subject: [PATCH 2/4] LoongArch: Add ftint{,rm,rp}.{w,l}.{s,d} instructions Date: Wed, 9 Nov 2022 15:21:45 +0800 Message-Id: <20221109072147.789090-3-xry111@xry111.site> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221109072147.789090-1-xry111@xry111.site> References: <20221109072147.789090-1-xry111@xry111.site> MIME-Version: 1.0 X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FROM_SUSPICIOUS_NTLD, GIT_PATCH_0, KAM_SHORT, LIKELY_SPAM_FROM, PDS_OTHER_BAD_TLD, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Xi Ruoyao via Gcc-patches From: Xi Ruoyao Reply-To: Xi Ruoyao Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" This allows to optimize the following builtins if -fno-math-errno: - __builtin_lrint{,f} - __builtin_lfloor{,f} - __builtin_lceil{,f} Inspired by https://gcc.gnu.org/pipermail/gcc-patches/2022-November/605287.html. ANYFI is added so the compiler won't try ftint.l.s if -mfpu=32. If we simply used GPR here an ICE would be triggered with __builtin_lrintf and -mfpu=32. Note that the .w.{s,d} variants are not tested because we don't support ILP32 for now. gcc/ChangeLog: * config/loongarch/loongarch.md (UNSPEC_FTINT): New unspec. (UNSPEC_FTINTRM): Likewise. (UNSPEC_FTINTRP): Likewise. (LRINT): New define_int_iterator. (lrint_pattern): New define_int_attr. (lrint_submenmonic): Likewise. (ANYFI): New define_mode_iterator. (lrint): New instruction template. gcc/testsuite/ChangeLog: * gcc.target/loongarch/ftint.c: New test. --- gcc/config/loongarch/loongarch.md | 28 ++++++++++++++ gcc/testsuite/gcc.target/loongarch/ftint.c | 44 ++++++++++++++++++++++ 2 files changed, 72 insertions(+) create mode 100644 gcc/testsuite/gcc.target/loongarch/ftint.c diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index a14ab14ac24..35cef272060 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -38,6 +38,9 @@ (define_c_enum "unspec" [ UNSPEC_FMAX UNSPEC_FMIN UNSPEC_FCOPYSIGN + UNSPEC_FTINT + UNSPEC_FTINTRM + UNSPEC_FTINTRP ;; Override return address for exception handling. UNSPEC_EH_RETURN @@ -374,6 +377,11 @@ (define_mode_iterator QHWD [QI HI SI (DI "TARGET_64BIT")]) (define_mode_iterator ANYF [(SF "TARGET_HARD_FLOAT") (DF "TARGET_DOUBLE_FLOAT")]) +;; Iterator for fixed-point modes which can be hold by a hardware +;; floating-point register. +(define_mode_iterator ANYFI [(SI "TARGET_HARD_FLOAT") + (DI "TARGET_DOUBLE_FLOAT")]) + ;; A mode for which moves involving FPRs may need to be split. (define_mode_iterator SPLITF [(DF "!TARGET_64BIT && TARGET_DOUBLE_FLOAT") @@ -515,6 +523,16 @@ (define_code_attr fcond [(unordered "cun") (define_code_attr sel [(eq "masknez") (ne "maskeqz")]) (define_code_attr selinv [(eq "maskeqz") (ne "masknez")]) +;; Iterator and attributes for floating-point to fixed-point conversion +;; instructions. +(define_int_iterator LRINT [UNSPEC_FTINT UNSPEC_FTINTRM UNSPEC_FTINTRP]) +(define_int_attr lrint_pattern [(UNSPEC_FTINT "lrint") + (UNSPEC_FTINTRM "lfloor") + (UNSPEC_FTINTRP "lceil")]) +(define_int_attr lrint_submenmonic [(UNSPEC_FTINT "") + (UNSPEC_FTINTRM "rm") + (UNSPEC_FTINTRP "rp")]) + ;; ;; .................... ;; @@ -2022,6 +2040,16 @@ (define_insn "rint2" [(set_attr "type" "fcvt") (set_attr "mode" "")]) +;; Convert floating-point numbers to integers +(define_insn "2" + [(set (match_operand:ANYFI 0 "register_operand" "=f") + (unspec:ANYFI [(match_operand:ANYF 1 "register_operand" "f")] + LRINT))] + "TARGET_HARD_FLOAT" + "ftint.. %0,%1" + [(set_attr "type" "fcvt") + (set_attr "mode" "")]) + ;; Load the low word of operand 0 with operand 1. (define_insn "load_low" [(set (match_operand:SPLITF 0 "register_operand" "=f,f") diff --git a/gcc/testsuite/gcc.target/loongarch/ftint.c b/gcc/testsuite/gcc.target/loongarch/ftint.c new file mode 100644 index 00000000000..9c3c3a8a756 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/ftint.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-mabi=lp64d -mdouble-float -fno-math-errno" } */ +/* { dg-final { scan-assembler "ftint\\.l\\.s" } } */ +/* { dg-final { scan-assembler "ftint\\.l\\.d" } } */ +/* { dg-final { scan-assembler "ftintrm\\.l\\.s" } } */ +/* { dg-final { scan-assembler "ftintrm\\.l\\.d" } } */ +/* { dg-final { scan-assembler "ftintrp\\.l\\.s" } } */ +/* { dg-final { scan-assembler "ftintrp\\.l\\.d" } } */ + +long +my_lrint (double a) +{ + return __builtin_lrint (a); +} + +long +my_lrintf (float a) +{ + return __builtin_lrintf (a); +} + +long +my_lfloor (double a) +{ + return __builtin_lfloor (a); +} + +long +my_lfloorf (float a) +{ + return __builtin_lfloorf (a); +} + +long +my_lceil (double a) +{ + return __builtin_lceil (a); +} + +long +my_lceilf (float a) +{ + return __builtin_lceilf (a); +} From patchwork Wed Nov 9 07:21:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xi Ruoyao X-Patchwork-Id: 1701642 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=nYNN0LTS; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N6bzJ5N2Lz23lT for ; Wed, 9 Nov 2022 18:23:08 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BB5DF3889E18 for ; Wed, 9 Nov 2022 07:23:06 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BB5DF3889E18 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667978586; bh=q6BJmSZeiDN6A/S31KGvVuTfjqIHvw6Sm2Uq+c4xrqg=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=nYNN0LTS2PN6Y7uWumMGlhYJVC6va9WpB6Hoo86i8H7CYN/GLOAhLBrdSC0p2ePnD y0u0/PMLHweUwkPA4mZpq1JFh0sIG5q7xnaUHyZnpgAVn5tcvpMdSVr/XJ4PQ8Rk9Q bPHVW2oL1hLdyMue1OHhereXexrTwhVrwkE96QZk= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from xry111.site (xry111.site [IPv6:2001:470:683e::1]) by sourceware.org (Postfix) with ESMTPS id 21FDB3858D3C for ; Wed, 9 Nov 2022 07:22:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 21FDB3858D3C Received: from xry111-x57s1.. (unknown [IPv6:240e:358:113a:1300:dc73:854d:832e:2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 0424365DCC; Wed, 9 Nov 2022 02:22:40 -0500 (EST) To: gcc-patches@gcc.gnu.org Cc: Lulu Cheng , Wang Xuerui , Chenghua Xu , Xiaolin Tang , Xi Ruoyao Subject: [PATCH 3/4] LoongArch: Add fscaleb.{s, d} instructions as ldexp{sf, df}3 Date: Wed, 9 Nov 2022 15:21:46 +0800 Message-Id: <20221109072147.789090-4-xry111@xry111.site> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221109072147.789090-1-xry111@xry111.site> References: <20221109072147.789090-1-xry111@xry111.site> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FROM_SUSPICIOUS_NTLD, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, LIKELY_SPAM_FROM, PDS_OTHER_BAD_TLD, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Xi Ruoyao via Gcc-patches From: Xi Ruoyao Reply-To: Xi Ruoyao Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" This allows optimizing __builtin_ldexp{,f} and __builtin_scalbn{,f} with -fno-math-errno. IMODE is added because we can't hard code SI for operand 2: fscaleb.d instruction always take the high half of both source registers into account. See my_ldexp_long in the test case. gcc/ChangeLog: * config/loongarch/loongarch.md (UNSPEC_FSCALEB): New unspec. (type): Add fscaleb. (IMODE): New mode attr. (ldexp3): New instruction template. gcc/testsuite/ChangeLog: * gcc.target/loongarch/fscaleb.c: New test. --- gcc/config/loongarch/loongarch.md | 26 ++++++++++- gcc/testsuite/gcc.target/loongarch/fscaleb.c | 48 ++++++++++++++++++++ 2 files changed, 72 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/loongarch/fscaleb.c diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index 35cef272060..9070ac4e2f8 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -41,6 +41,7 @@ (define_c_enum "unspec" [ UNSPEC_FTINT UNSPEC_FTINTRM UNSPEC_FTINTRP + UNSPEC_FSCALEB ;; Override return address for exception handling. UNSPEC_EH_RETURN @@ -220,6 +221,7 @@ (define_attr "qword_mode" "no,yes" ;; fcmp floating point compare ;; fcopysign floating point copysign ;; fcvt floating point convert +;; fscaleb floating point scale ;; fsqrt floating point square root ;; frsqrt floating point reciprocal square root ;; multi multiword sequence (or user asm statements) @@ -231,8 +233,8 @@ (define_attr "type" "unknown,branch,jump,call,load,fpload,fpidxload,store,fpstore,fpidxstore, prefetch,prefetchx,condmove,mgtf,mftg,const,arith,logical, shift,slt,signext,clz,trap,imul,idiv,move, - fmove,fadd,fmul,fmadd,fdiv,frdiv,fabs,fneg,fcmp,fcopysign,fcvt,fsqrt, - frsqrt,accext,accmod,multi,atomic,syncloop,nop,ghost" + fmove,fadd,fmul,fmadd,fdiv,frdiv,fabs,fneg,fcmp,fcopysign,fcvt,fscaleb, + fsqrt,frsqrt,accext,accmod,multi,atomic,syncloop,nop,ghost" (cond [(eq_attr "jirl" "!unset") (const_string "call") (eq_attr "got" "load") (const_string "load") @@ -418,6 +420,10 @@ (define_mode_attr UNITMODE [(SF "SF") (DF "DF")]) ;; the controlling mode. (define_mode_attr HALFMODE [(DF "SI") (DI "SI") (TF "DI")]) +;; This attribute gives the integer mode that has the same size of a +;; floating-point mode. +(define_mode_attr IMODE [(SF "SI") (DF "DI")]) + ;; This code iterator allows signed and unsigned widening multiplications ;; to use the same template. (define_code_iterator any_extend [sign_extend zero_extend]) @@ -1011,7 +1017,23 @@ (define_insn "copysign3" "fcopysign.\t%0,%1,%2" [(set_attr "type" "fcopysign") (set_attr "mode" "")]) + +;; +;; .................... +;; +;; FLOATING POINT SCALE +;; +;; .................... +(define_insn "ldexp3" + [(set (match_operand:ANYF 0 "register_operand" "=f") + (unspec:ANYF [(match_operand:ANYF 1 "register_operand" "f") + (match_operand: 2 "register_operand" "f")] + UNSPEC_FSCALEB))] + "TARGET_HARD_FLOAT" + "fscaleb.\t%0,%1,%2" + [(set_attr "type" "fscaleb") + (set_attr "mode" "")]) ;; ;; ................... diff --git a/gcc/testsuite/gcc.target/loongarch/fscaleb.c b/gcc/testsuite/gcc.target/loongarch/fscaleb.c new file mode 100644 index 00000000000..f18470fbb8f --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/fscaleb.c @@ -0,0 +1,48 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno" } */ +/* { dg-final { scan-assembler-times "fscaleb\\.s" 3 } } */ +/* { dg-final { scan-assembler-times "fscaleb\\.d" 4 } } */ +/* { dg-final { scan-assembler-times "slli\\.w" 1 } } */ + +double +my_scalbln (double a, long b) +{ + return __builtin_scalbln (a, b); +} + +double +my_scalbn (double a, int b) +{ + return __builtin_scalbn (a, b); +} + +double +my_ldexp (double a, int b) +{ + return __builtin_ldexp (a, b); +} + +float +my_scalblnf (float a, long b) +{ + return __builtin_scalblnf (a, b); +} + +float +my_scalbnf (float a, int b) +{ + return __builtin_scalbnf (a, b); +} + +float +my_ldexpf (float a, int b) +{ + return __builtin_ldexpf (a, b); +} + +/* b must be sign-extended */ +double +my_ldexp_long (double a, long b) +{ + return __builtin_ldexp (a, b); +} From patchwork Wed Nov 9 07:21:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xi Ruoyao X-Patchwork-Id: 1701644 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=nsyhpBnU; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N6bzR4Mtyz23lT for ; Wed, 9 Nov 2022 18:23:15 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 803443889E00 for ; Wed, 9 Nov 2022 07:23:13 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 803443889E00 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667978593; bh=gmMmUX7GGDukYfwS7/exUxtK7KwqYw+fEcg1W5vRwDs=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=nsyhpBnUKBxzsKKYqW80j/hpWdD89oZDwlMQvZfJMghNFwT729j5PLIEvkp6uNZNY WCqnm4SXT7ZypDzo+Reng+c32Ig0v9u+FkQ7Q1PDrFQJPqaZ1ka+vtFXPG//DBab0o wJLm/jIpwrzAjpXT2B41bUgSt742JrQEIiDrUkt0= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from xry111.site (xry111.site [89.208.246.23]) by sourceware.org (Postfix) with ESMTPS id F123B3858002 for ; Wed, 9 Nov 2022 07:22:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org F123B3858002 Received: from xry111-x57s1.. (unknown [IPv6:240e:358:113a:1300:dc73:854d:832e:2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 01D3265DD0; Wed, 9 Nov 2022 02:22:44 -0500 (EST) To: gcc-patches@gcc.gnu.org Cc: Lulu Cheng , Wang Xuerui , Chenghua Xu , Xiaolin Tang , Xi Ruoyao Subject: [PATCH 4/4] LoongArch: Add flogb.{s, d} instructions and expand logb{sf, df}2 Date: Wed, 9 Nov 2022 15:21:47 +0800 Message-Id: <20221109072147.789090-5-xry111@xry111.site> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221109072147.789090-1-xry111@xry111.site> References: <20221109072147.789090-1-xry111@xry111.site> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FROM_SUSPICIOUS_NTLD, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, LIKELY_SPAM_FROM, PDS_OTHER_BAD_TLD, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Xi Ruoyao via Gcc-patches From: Xi Ruoyao Reply-To: Xi Ruoyao Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" On LoongArch, flogb instructions extract the exponent of a non-negative floating point value, but produces NaN for negative values. So we need to add a fabs instruction when we expand logb. gcc/ChangeLog: * config/loongarch/loongarch.md (UNSPEC_FLOGB): New unspec. (type): Add flogb. (logb_non_negative2): New instruction template. (logb2): New define_expand. gcc/testsuite/ChangeLog: * gcc.target/loongarch/flogb.c: New test. --- gcc/config/loongarch/loongarch.md | 35 ++++++++++++++++++++-- gcc/testsuite/gcc.target/loongarch/flogb.c | 18 +++++++++++ 2 files changed, 51 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/loongarch/flogb.c diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index 9070ac4e2f8..072c3163b75 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -42,6 +42,7 @@ (define_c_enum "unspec" [ UNSPEC_FTINTRM UNSPEC_FTINTRP UNSPEC_FSCALEB + UNSPEC_FLOGB ;; Override return address for exception handling. UNSPEC_EH_RETURN @@ -217,6 +218,7 @@ (define_attr "qword_mode" "no,yes" ;; fdiv floating point divide ;; frdiv floating point reciprocal divide ;; fabs floating point absolute value +;; flogb floating point exponent extract ;; fneg floating point negation ;; fcmp floating point compare ;; fcopysign floating point copysign @@ -233,8 +235,8 @@ (define_attr "type" "unknown,branch,jump,call,load,fpload,fpidxload,store,fpstore,fpidxstore, prefetch,prefetchx,condmove,mgtf,mftg,const,arith,logical, shift,slt,signext,clz,trap,imul,idiv,move, - fmove,fadd,fmul,fmadd,fdiv,frdiv,fabs,fneg,fcmp,fcopysign,fcvt,fscaleb, - fsqrt,frsqrt,accext,accmod,multi,atomic,syncloop,nop,ghost" + fmove,fadd,fmul,fmadd,fdiv,frdiv,fabs,flogb,fneg,fcmp,fcopysign,fcvt, + fscaleb,fsqrt,frsqrt,accext,accmod,multi,atomic,syncloop,nop,ghost" (cond [(eq_attr "jirl" "!unset") (const_string "call") (eq_attr "got" "load") (const_string "load") @@ -1036,6 +1038,35 @@ (define_insn "ldexp3" (set_attr "mode" "")]) ;; +;; .................... +;; +;; FLOATING POINT EXPONENT EXTRACT +;; +;; .................... + +(define_insn "logb_non_negative2" + [(set (match_operand:ANYF 0 "register_operand" "=f") + (unspec:ANYF [(match_operand:ANYF 1 "register_operand" "f")] + UNSPEC_FLOGB))] + "TARGET_HARD_FLOAT" + "flogb.\t%0,%1" + [(set_attr "type" "flogb") + (set_attr "mode" "")]) + +(define_expand "logb2" + [(set (match_operand:ANYF 0 "register_operand") + (unspec:ANYF [(abs:ANYF (match_operand:ANYF 1 "register_operand"))] + UNSPEC_FLOGB))] + "TARGET_HARD_FLOAT" +{ + rtx tmp = gen_reg_rtx (mode); + + emit_insn (gen_abs2 (tmp, operands[1])); + emit_insn (gen_logb_non_negative2 (operands[0], tmp)); + DONE; +}) + +;; ;; ................... ;; ;; Count leading zeroes. diff --git a/gcc/testsuite/gcc.target/loongarch/flogb.c b/gcc/testsuite/gcc.target/loongarch/flogb.c new file mode 100644 index 00000000000..1daefe54e13 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/flogb.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mdouble-float -fno-math-errno" } */ +/* { dg-final { scan-assembler "fabs\\.s" } } */ +/* { dg-final { scan-assembler "fabs\\.d" } } */ +/* { dg-final { scan-assembler "flogb\\.s" } } */ +/* { dg-final { scan-assembler "flogb\\.d" } } */ + +double +my_logb (double a) +{ + return __builtin_logb (a); +} + +float +my_logbf (float a) +{ + return __builtin_logbf (a); +}