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(unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id 80D7D33BF20; Sun, 30 Oct 2022 19:31:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154673; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VUWj1vNi/kmA99CHmKGYSr/Ec6inNpIFiOXgEL8aUck=; b=dptWFICBcIC69nxoDjsXDFvCnMa6BmOpKf/yFWZu45e8+YwIK+LsheIILVby/6Q7isdmTv pDidzpW7OG7vSd6BYL+vECmM9uCiwhgVkJeKCU9e6J/FfKpFNH7VxUXYWLt1YP042arKhB LlTHgiUqEvPRzo4IQscB62klJe1YGOvcaFKrSfFWuC87qQMD48CErVjBnNkL6X9ghOwoa6 AzA54Fa6Dzx/XpsdpYkqaTauyW6HLVUiTxgY434VrEeV2FBuUoNaXXra+2hxnLZkAdDBkn gxDUiroA7WcrIrZXUgnX8nVAucum6xPv4go98s1szRIqAIIWdLxMYgf0YZq2Lw== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 01/13] realtek: add switch core MFD driver Date: Sun, 30 Oct 2022 19:30:54 +0100 Message-Id: <73c053e4d93e8cb368b2f11942bc5fbe8225a744.1667154408.git.sander@svanheule.net> X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113123_795494_6185DD64 X-CRM114-Status: GOOD ( 24.40 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Realtek managed switch SoCs such as the RTL8380 consist of a MIPS CPU with a number of basic peripherals, and an ethernet switch peripheral. Besides performing ethernet related tasks, this switch core [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org Realtek managed switch SoCs such as the RTL8380 consist of a MIPS CPU with a number of basic peripherals, and an ethernet switch peripheral. Besides performing ethernet related tasks, this switch core also provides SoC management features. These switch core features are badly separated, and cannot be divided into distinct IO ranges. This MFD core driver is intended to manage the switch core regmap, and to expose some limited features that don't warrant their own driver, such as SoC identification. Currently the driver is left disabled on rtl930x and rtl931x since these are not yet supported. Signed-off-by: Sander Vanheule --- Changes in v3: - Merge symbol selection updates to ease bisecting --- .../drivers/mfd/realtek-switchcore.c | 217 ++++++++++++++++++ ...0-mfd-add-Realtek-switch-core-driver.patch | 46 ++++ target/linux/realtek/rtl838x/config-5.10 | 2 + target/linux/realtek/rtl839x/config-5.10 | 2 + target/linux/realtek/rtl930x/config-5.10 | 1 + target/linux/realtek/rtl931x/config-5.10 | 1 + 6 files changed, 269 insertions(+) create mode 100644 target/linux/realtek/files-5.10/drivers/mfd/realtek-switchcore.c create mode 100644 target/linux/realtek/patches-5.10/200-mfd-add-Realtek-switch-core-driver.patch diff --git a/target/linux/realtek/files-5.10/drivers/mfd/realtek-switchcore.c b/target/linux/realtek/files-5.10/drivers/mfd/realtek-switchcore.c new file mode 100644 index 000000000000..be9d96b8cb0a --- /dev/null +++ b/target/linux/realtek/files-5.10/drivers/mfd/realtek-switchcore.c @@ -0,0 +1,217 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct realtek_switchcore_ctrl; + +struct realtek_switchcore_data { + const struct mfd_cell *mfd_devices; + unsigned int mfd_device_count; + void (*probe_model_name)(const struct realtek_switchcore_ctrl *ctrl); +}; + +struct realtek_switchcore_ctrl { + struct device *dev; + struct regmap *map; + const struct realtek_switchcore_data *data; +}; + +/* + * Model name probe + * + * Reads the family-specific MODEL_NAME_INFO register + * to identify the SoC model and revision + */ +#define MODEL_NAME_CHAR_XLATE(val) ((val) ? 'A' + (val) - 1 : '\0') + +#define RTL83XX_MODEL_NAME_ID GENMASK(31, 16) +#define RTL83XX_MODEL_NAME_CHAR GENMASK(15, 11) + +#define RTL83XX_CHIP_INFO_UNLOCK GENMASK(31, 28) +#define RTL83XX_CHIP_INFO_UNLOCK_CODE 0xa +#define RTL83XX_CHIP_INFO_CHIP_REV GENMASK(20, 16) +#define RTL83XX_CHIP_INFO_RLID GENMASK(15, 0) + +/* Maple registers */ +#define RTL838X_REG_MODEL_NAME_INFO 0x00d4 +#define RTL838X_REG_CHIP_INFO 0x00d8 + +#define RTL838X_REG_INT_RW_CTRL 0x0058 +#define RTL838X_REG_MODE_DEFINE_CTL 0x1024 + +/* Cypress registers */ +#define RTL839X_REG_MODEL_NAME_INFO 0x0ff0 +#define RTL839X_REG_CHIP_INFO 0x0ff4 + +static void rtl83xx_read_chip_name(struct regmap *map, unsigned int reg, + unsigned int *model_id, char *model_first_char) +{ + u32 val = 0; + + regmap_read(map, reg, &val); + *model_id = FIELD_GET(RTL83XX_MODEL_NAME_ID, val); + *model_first_char = MODEL_NAME_CHAR_XLATE(FIELD_GET(RTL83XX_MODEL_NAME_CHAR, val)); +} + +static void rtl83xx_read_chip_info(struct regmap *map, unsigned int reg, + unsigned int *chip_rev, unsigned int *rl_id) +{ + u32 val = 0; + + val = FIELD_PREP(RTL83XX_CHIP_INFO_UNLOCK, RTL83XX_CHIP_INFO_UNLOCK_CODE); + regmap_write(map, reg, val); + + regmap_read(map, reg, &val); + *chip_rev = FIELD_GET(RTL83XX_CHIP_INFO_CHIP_REV, val); + *rl_id = FIELD_GET(RTL83XX_CHIP_INFO_RLID, val); +} + +static void rtl_swcore_chip_print(struct device *dev, unsigned int model_id, char model_suffix, + unsigned int chip_rev, unsigned int rl_id) +{ + dev_info(dev, "found RTL%04x%c rev. %c, RL:%04x\n", + model_id, model_suffix, 'A' + (char) chip_rev, rl_id); +} + +static void rtl838x_probe_model_name(const struct realtek_switchcore_ctrl *ctrl) +{ + unsigned int model_id = 0; + unsigned int chip_rev = 0; + char model_suffix = ' '; + unsigned int rl_id = 0; + u32 val = 0; + + /* + * CHIP_INFO register requires global register lock to be disabled. + * Leave the lock disabled as a side effect, to allow other switch core R/W operations. + */ + regmap_write(ctrl->map, RTL838X_REG_INT_RW_CTRL, 0x3); + + rtl83xx_read_chip_name(ctrl->map, RTL838X_REG_MODEL_NAME_INFO, &model_id, &model_suffix); + + if (model_id == 0x8380) { + regmap_read(ctrl->map, RTL838X_REG_MODE_DEFINE_CTL, &val); + /* + * Undocumented bit which is only set on RTL8380M. + * Possibly related to the presence of QSGMII ports for external phy. + */ + if (!(val & BIT(23))) + model_id = 0x8381; + } + + rtl83xx_read_chip_info(ctrl->map, RTL838X_REG_CHIP_INFO, &chip_rev, &rl_id); + /* 'A' cut is denoted by revision 1, etc. Non-838x revisions start at 0. */ + if (chip_rev > 0) + chip_rev--; + + rtl_swcore_chip_print(ctrl->dev, model_id, model_suffix, chip_rev, rl_id); +} + +static void rtl839x_probe_model_name(const struct realtek_switchcore_ctrl *ctrl) +{ + unsigned int model_id = 0; + unsigned int chip_rev = 0; + char model_suffix = ' '; + unsigned int rl_id = 0; + + rtl83xx_read_chip_name(ctrl->map, RTL839X_REG_MODEL_NAME_INFO, &model_id, &model_suffix); + rtl83xx_read_chip_info(ctrl->map, RTL839X_REG_CHIP_INFO, &chip_rev, &rl_id); + rtl_swcore_chip_print(ctrl->dev, model_id, model_suffix, chip_rev, rl_id); +} + +static const struct mfd_cell rtl838x_mfd_devices[] = { + { + .name = "realtek-switchcore-sys-led", + .of_compatible = "realtek,maple-sys-led", + }, + { + .name = "realtek-switchcore-port-leds", + .of_compatible = "realtek,maple-port-led", + }, + { + .name = "realtek-switchcore-pinctrl", + .of_compatible = "realtek,maple-pinctrl", + }, +}; + +static const struct realtek_switchcore_data rtl838x_switchcore_data = { + .mfd_devices = rtl838x_mfd_devices, + .mfd_device_count = ARRAY_SIZE(rtl838x_mfd_devices), + .probe_model_name = rtl838x_probe_model_name, +}; + +static const struct mfd_cell rtl839x_mfd_devices[] = { + { + .name = "realtek-switchcore-sys-led", + .of_compatible = "realtek,cypress-sys-led", + }, + { + .name = "realtek-switchcore-port-leds", + .of_compatible = "realtek,cypress-port-led", + }, + { + .name = "realtek-switchcore-pinctrl", + .of_compatible = "realtek,cypress-pinctrl", + }, +}; + +static const struct realtek_switchcore_data rtl839x_switchcore_data = { + .mfd_devices = rtl839x_mfd_devices, + .mfd_device_count = ARRAY_SIZE(rtl839x_mfd_devices), + .probe_model_name = rtl839x_probe_model_name, +}; + +static const struct of_device_id of_realtek_switchcore_match[] = { + { + .compatible = "realtek,maple-switchcore", + .data = &rtl838x_switchcore_data, + }, + { + .compatible = "realtek,cypress-switchcore", + .data = &rtl839x_switchcore_data, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, of_realtek_switchcore_match); + +static int realtek_switchcore_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct realtek_switchcore_ctrl *ctrl; + + ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); + if (!ctrl) + return -ENOMEM; + + ctrl->dev = dev; + ctrl->data = device_get_match_data(dev); + ctrl->map = syscon_node_to_regmap(dev->of_node); + if (!ctrl->map) + return dev_err_probe(dev, -ENXIO, "failed to get regmap\n"); + + ctrl->data->probe_model_name(ctrl); + + return mfd_add_devices(dev, 0, ctrl->data->mfd_devices, + ctrl->data->mfd_device_count, NULL, 0, NULL); +} + +static struct platform_driver realtek_switchcore_driver = { + .probe = realtek_switchcore_probe, + .driver = { + .name = "realtek-switchcore", + .of_match_table = of_realtek_switchcore_match + } +}; +module_platform_driver(realtek_switchcore_driver); + +MODULE_AUTHOR("Sander Vanheule "); +MODULE_DESCRIPTION("Realtek SoC switch core driver"); +MODULE_LICENSE("GPL v2"); diff --git a/target/linux/realtek/patches-5.10/200-mfd-add-Realtek-switch-core-driver.patch b/target/linux/realtek/patches-5.10/200-mfd-add-Realtek-switch-core-driver.patch new file mode 100644 index 000000000000..17bb79cf2d1b --- /dev/null +++ b/target/linux/realtek/patches-5.10/200-mfd-add-Realtek-switch-core-driver.patch @@ -0,0 +1,46 @@ +From 2b4df5433baaa10eeb23a58012329d4ec47216ba Mon Sep 17 00:00:00 2001 +From: Sander Vanheule +Date: Mon, 11 Jul 2022 09:24:18 +0200 +Subject: mfd: add Realtek switch core driver + +Realtek managed switch SoCs such as the RTL8380 consist of a MIPS CPU +with a number of basic peripherals, and an ethernet switch peripheral. +Besides performing ethernet related tasks, this switch core also +provides SoC management features. These switch core features are badly +separated, and cannot be divided into distinct IO ranges. + +This MFD core driver is intended to manage the switch core regmap, and +to expose some limited features that don't warrant their own driver, +such as SoC identification. + +Signed-off-by: Sander Vanheule +--- + +--- a/drivers/mfd/Kconfig ++++ b/drivers/mfd/Kconfig +@@ -1000,6 +1000,17 @@ config MFD_RETU + Retu and Tahvo are a multi-function devices found on Nokia + Internet Tablets (770, N800 and N810). + ++config MFD_REALTEK_SWITCHCORE ++ bool "Realtek switch core driver" ++ select MFD_CORE ++ select REGMAP_MMIO ++ default RTL83XX ++ help ++ Say yes here if you want to support the switch core found in RTL838x, ++ RTL839x, RTL930x, and RTL931x SoCs. The switch core provides ethernet ++ functionality, and management features for the SoC like pin control. ++ The mfd cell drivers have to be selected separately. ++ + config MFD_PCF50633 + tristate "NXP PCF50633" + depends on I2C +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -267,3 +267,5 @@ obj-$(CONFIG_MFD_KHADAS_MCU) += khadas- + obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o + obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o + obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o ++ ++obj-$(CONFIG_MFD_REALTEK_SWITCHCORE) += realtek-switchcore.o diff --git a/target/linux/realtek/rtl838x/config-5.10 b/target/linux/realtek/rtl838x/config-5.10 index d69345e30120..a642be8b2aee 100644 --- a/target/linux/realtek/rtl838x/config-5.10 +++ b/target/linux/realtek/rtl838x/config-5.10 @@ -126,6 +126,8 @@ CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVRES=y CONFIG_MDIO_I2C=y CONFIG_MEMFD_CREATE=y +CONFIG_MFD_CORE=y +CONFIG_MFD_REALTEK_SWITCHCORE=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y diff --git a/target/linux/realtek/rtl839x/config-5.10 b/target/linux/realtek/rtl839x/config-5.10 index 57eded97fcd9..51e6d5e8e072 100644 --- a/target/linux/realtek/rtl839x/config-5.10 +++ b/target/linux/realtek/rtl839x/config-5.10 @@ -120,6 +120,8 @@ CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVRES=y CONFIG_MDIO_I2C=y CONFIG_MEMFD_CREATE=y +CONFIG_MFD_CORE=y +CONFIG_MFD_REALTEK_SWITCHCORE=y CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y diff --git a/target/linux/realtek/rtl930x/config-5.10 b/target/linux/realtek/rtl930x/config-5.10 index 3b2b327f08fb..ab31186ae134 100644 --- a/target/linux/realtek/rtl930x/config-5.10 +++ b/target/linux/realtek/rtl930x/config-5.10 @@ -112,6 +112,7 @@ CONFIG_MDIO_DEVRES=y CONFIG_MDIO_I2C=y CONFIG_MDIO_SMBUS=y CONFIG_MEMFD_CREATE=y +# CONFIG_MFD_REALTEK_SWITCHCORE is not set CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y diff --git a/target/linux/realtek/rtl931x/config-5.10 b/target/linux/realtek/rtl931x/config-5.10 index 567421c8d4a7..00f751ce855a 100644 --- a/target/linux/realtek/rtl931x/config-5.10 +++ b/target/linux/realtek/rtl931x/config-5.10 @@ -113,6 +113,7 @@ CONFIG_MDIO_DEVRES=y CONFIG_MDIO_I2C=y CONFIG_MDIO_SMBUS=y CONFIG_MEMFD_CREATE=y +# CONFIG_MFD_REALTEK_SWITCHCORE is not set CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIPS=y From patchwork Sun Oct 30 18:30:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sander Vanheule X-Patchwork-Id: 1696841 X-Patchwork-Delegate: sander@svanheule.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.openwrt.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=zcine6oJ; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=svanheule.net header.i=@svanheule.net header.a=rsa-sha256 header.s=mail1707 header.b=HoNx6Ycf; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N0lN002Rbz23kv for ; Mon, 31 Oct 2022 05:35:43 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tGkQ/O31XbiQH5OHyiGo1wCT+lj4v7+IzOql6r86yxQ=; b=zcine6oJUOiFak YSZ1vE4uvSmdQiJY9uj0bbjV3ixDkJ/+wEpIeGj9gBEor+7VXopuX3ZsVgaCCC1fQiaXoskWHAVnn OLp/0P216f+RR8BUXtyt8efIBj0sRqogBoa7hq9o12cuRq5sG6p2XSIc1xwgAejPJ18yT8QybVuti GzHR8Zdk5OlPB0fZBWU4kvu6bgPqkHyvhTRbBfS5lTpYsL3Sxp+4VtVnOi2QPUdtScNCuxaFrto2A c7O9wMzJO842fV3NVlZ/0z7nA53NBZy7dwxjKuIx0lsSIKjRJBIPdZvVip/lc5D6ndfGHrAMpcDs4 XpkqmXuP/pmXCcvQ4XPQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1opD6a-001nQH-95; Sun, 30 Oct 2022 18:32:20 +0000 Received: from polaris.svanheule.net ([84.16.241.116]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1opD5f-001n4o-8k for openwrt-devel@lists.openwrt.org; Sun, 30 Oct 2022 18:31:28 +0000 Received: from terra.. (unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id 4241733BF21; Sun, 30 Oct 2022 19:31:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154674; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OJoq97K97c+KEl4uL2TMotH9JMP5KeaAXh2qlPiPIGg=; b=HoNx6YcfkpC+RRFtKXClPRCN78LCSNLdjvIsHWYCKoGncOEVJ3HUemleyua4tf9U22LUly 9ivVEKma5vb2xpdYM3R7N/xxQa8jNMlCjtWA0m9ZfD/9xH5m6lfEnDApwoCNUWj69ZpkRJ APpUe8MdnKTeotMavU8aRaC65L8kUykXCqaQi+sldj9Q1WfspKqo4z9zEONRh79mhMti/j KIWFFkxtvNJELi5pAjwKfLOPXceX6MdIEMDLWY21VWtP1/WGV63kyRM/qMuSkq/GI1DJLa F1+C+UIBoWRguGfotHUFis2ZSXty0BpdSjBGp7z0PVXaMyPJyl38AfJbFVHSzQ== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 02/13] realtek: add switch core pinctrl driver Date: Sun, 30 Oct 2022 19:30:55 +0100 Message-Id: X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113123_764454_69DA0245 X-CRM114-Status: GOOD ( 25.49 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Since control bits for different pin muxes are scattered throughout the switch core's register space, pin control features are provided by a table of regmap fields. This should be flexible enough to a [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org Since control bits for different pin muxes are scattered throughout the switch core's register space, pin control features are provided by a table of regmap fields. This should be flexible enough to allow support for currently unsupported pin muxes, and newer SoC generations providing similar features. This driver add initial support for Maple and Cypress managed gigabit switch SoCs, with RTL838xM and RTL839xM part numbers. The fast ethernet switch SoCs from these parts series, with numbers RTL833xM and RTL835xM, should also be supported, but have not been tested. Signed-off-by: Sander Vanheule --- Changes in v3: - Merge symbol selection updates to ease bisecting --- .../drivers/pinctrl/pinctrl-rtl-switchcore.c | 447 ++++++++++++++++++ ...inctrl-add-pinctrl-for-Realtek-maple.patch | 49 ++ target/linux/realtek/rtl838x/config-5.10 | 1 + target/linux/realtek/rtl839x/config-5.10 | 1 + 4 files changed, 498 insertions(+) create mode 100644 target/linux/realtek/files-5.10/drivers/pinctrl/pinctrl-rtl-switchcore.c create mode 100644 target/linux/realtek/patches-5.10/201-pinctrl-add-pinctrl-for-Realtek-maple.patch diff --git a/target/linux/realtek/files-5.10/drivers/pinctrl/pinctrl-rtl-switchcore.c b/target/linux/realtek/files-5.10/drivers/pinctrl/pinctrl-rtl-switchcore.c new file mode 100644 index 000000000000..15a8b08793c9 --- /dev/null +++ b/target/linux/realtek/files-5.10/drivers/pinctrl/pinctrl-rtl-switchcore.c @@ -0,0 +1,447 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "core.h" +#include "pinmux.h" + +/** + * struct rtl_swcore_mux_desc - switchcore pin group information + * + * Pins are frequently muxed between alternative functions, but the control + * bits for the muxes are scattered throughout the switchcore's register space. + * Provide a regmap-based interface to flexibly manage these mux fields, which + * may vary in size and do not always provide a GPIO function. + * + * @name: name to identify the pin group + * @field: register field with mux control bits + * @pins: array of numbers of the pins in this group + * @npins: number of pins in this group + */ +struct rtl_swcore_mux_desc { + const char *name; + struct reg_field field; + const unsigned int *pins; + unsigned int npins; +}; + +#define SWITCHCORE_MUX(_name, _field, _pins) { \ + .name = (_name), \ + .field = _field, \ + .pins = (_pins), \ + .npins = ARRAY_SIZE(_pins), \ + } + +/** + * struct rtl_swcore_mux_cfg - stored mux configuration + * + * @mux: pointer to the mux descriptor + * @setting: value to write in the mux's register field to apply this configuration + */ +struct rtl_swcore_mux_cfg { + const struct rtl_swcore_mux_desc *mux; + unsigned int setting; +}; + +/** + * struct rtl_swcore_function_desc - switchcore function information + * + * @name: name of this function + * @configs: list of mux configurations that enable this function on said mux + * @nconfigs: length of the @configs list + */ +struct rtl_swcore_function_desc { + const char *name; + const struct rtl_swcore_mux_cfg *configs; + unsigned int nconfigs; +}; + +#define SWITCHCORE_FUNCTION(_name, _configs) { \ + .name = (_name), \ + .configs = (_configs), \ + .nconfigs = ARRAY_SIZE(_configs), \ + } + +struct rtl_swcore_config { + const struct pinctrl_pin_desc *pins; + unsigned int npins; + const struct rtl_swcore_function_desc *functions; + unsigned int nfunctions; + const struct rtl_swcore_mux_desc **groups; + unsigned int ngroups; +}; + +struct rtl_swcore_pinctrl { + struct pinctrl_desc pdesc; + struct device *dev; + const struct rtl_swcore_config *config; + struct regmap_field **mux_fields; +}; + +/* + * RTL838x chips come in LQFP packages with 216 pins. Pins are indexed + * counter-clockwise, starting with pin 1 at the bottom left. + */ +static const struct pinctrl_pin_desc rtl838x_swcore_pins[] = { + /* JTAG pins */ + PINCTRL_PIN(28, "JTAG_TCK/GPIO13"), + PINCTRL_PIN(29, "JTAG_TMS/GPIO12"), + PINCTRL_PIN(30, "JTAG_TDO/GPIO10"), + PINCTRL_PIN(31, "JTAG_TDI/GPIO11"), + PINCTRL_PIN(32, "JTAG_TRST#/GPIO14"), + /* aux MDIO bus pins */ + PINCTRL_PIN(110, "GPIO3/AUX_MDIO"), + PINCTRL_PIN(111, "GPIO2/AUX_MDC"), + /* system LED pin */ + PINCTRL_PIN(113, "GPIO0/SYS_LED"), + /* UART1/SPI slave pins */ + PINCTRL_PIN(116, "SSPI_CS#/UART1_RX"), + PINCTRL_PIN(117, "SSPI_SO/UART1_TX"), + /* ethernet MDIO bus pins */ + PINCTRL_PIN(120, "MDC"), + PINCTRL_PIN(121, "MDIO"), +}; + +static const unsigned int rtl838x_jtag_pins[] = {28, 29, 30, 31, 32}; +static const unsigned int rtl838x_aux_mdio_pins[] = {110, 111}; +static const unsigned int rtl838x_sys_led_pins[] = {113}; +static const unsigned int rtl838x_uart1_pins[] = {116, 117}; + +static const struct rtl_swcore_mux_desc rtl838x_mux_jtag = + SWITCHCORE_MUX("jtag", REG_FIELD(0x1000, 2, 3), rtl838x_jtag_pins); + +static const struct rtl_swcore_mux_desc rtl838x_mux_aux_mdio = + SWITCHCORE_MUX("aux-mdio", REG_FIELD(0xa0e0, 0, 0), rtl838x_aux_mdio_pins); + +static const struct rtl_swcore_mux_desc rtl838x_mux_sys_led = + SWITCHCORE_MUX("sys-led", REG_FIELD(0xa000, 15, 15), rtl838x_sys_led_pins); + +static const struct rtl_swcore_mux_desc rtl838x_mux_uart1 = + SWITCHCORE_MUX("uart1", REG_FIELD(0x1000, 4, 4), rtl838x_uart1_pins); + +static const struct rtl_swcore_mux_desc *rtl838x_groups[] = { + &rtl838x_mux_jtag, + &rtl838x_mux_aux_mdio, + &rtl838x_mux_sys_led, + &rtl838x_mux_uart1, +}; + +static const struct rtl_swcore_mux_cfg rtl838x_gpio_configs[] = { + {&rtl838x_mux_jtag, 2}, + {&rtl838x_mux_aux_mdio, 0}, + {&rtl838x_mux_sys_led, 0}, +}; +static const struct rtl_swcore_mux_cfg rtl838x_aux_mdio_configs[] = { + {&rtl838x_mux_aux_mdio, 1}, +}; +static const struct rtl_swcore_mux_cfg rtl838x_sys_led_configs[] = { + {&rtl838x_mux_sys_led, 1}, +}; +static const struct rtl_swcore_mux_cfg rtl838x_uart1_configs[] = { + {&rtl838x_mux_uart1, 1}, +}; +static const struct rtl_swcore_mux_cfg rtl838x_spi_slave_configs[] = { + {&rtl838x_mux_uart1, 0}, +}; + +static const struct rtl_swcore_function_desc rtl838x_functions[] = { + SWITCHCORE_FUNCTION("gpio", rtl838x_gpio_configs), + SWITCHCORE_FUNCTION("aux-mdio", rtl838x_aux_mdio_configs), + SWITCHCORE_FUNCTION("sys-led", rtl838x_sys_led_configs), + SWITCHCORE_FUNCTION("uart1", rtl838x_uart1_configs), + SWITCHCORE_FUNCTION("spi-slave", rtl838x_spi_slave_configs), +}; + +static const struct rtl_swcore_config rtl838x_config = { + .pins = rtl838x_swcore_pins, + .npins = ARRAY_SIZE(rtl838x_swcore_pins), + .functions = rtl838x_functions, + .nfunctions = ARRAY_SIZE(rtl838x_functions), + .groups = rtl838x_groups, + .ngroups = ARRAY_SIZE(rtl838x_groups), +}; + +/* + * RTL839x chips are in BGA packages with 26×26 positions. Board designs number + * these as 1..26 for the rows, and A..AF for the columns, with position A1 in + * the bottom left corner. Letters I, O, Q, S, X, and Z are skipped; presumably + * to avoid ambiguities. + * This gives a total of 676 positions. Note that not all positions will + * actually have a pad, and many pads will be used for power. + * + * Index pins using (ROW + 26×COL), where ROW and COL mapped as: + * - ROW: {1..26} -> {0..25} + * - COL: {A..AF} -> {0..25} + * + * ROW | 1 2 3 4 5 6 7 8 9 10 11 12 13 + * COL | A B C D E F G H J K L M N + * ------|--------------------------------------- + * INDEX | 0 1 2 3 4 5 6 7 8 9 10 11 12 + * + * ROW | 14 15 16 17 18 19 20 21 22 23 24 25 26 + * COL | P R T U V W Y AA AB AC AD AE AF + * ------|--------------------------------------- + * INDEX | 13 14 15 16 17 18 19 20 21 22 23 24 25 + * + * Since there are no datasheets available, use a virtual pin range starting at + * 676 for pins with unknown positions. When actual pin positions are found + * (if ever), these can the be mapped to their real values. + */ +#define RTL839X_VPIN(num) (26 * 26 + (num)) +#define RTL839X_VPIN_DESC(num, name) PINCTRL_PIN(RTL839X_VPIN(num), name) + +static const struct pinctrl_pin_desc rtl839x_swcore_pins[] = { + /* sys-led, or gpio0 */ + RTL839X_VPIN_DESC(0, "GPIO0/SYS_LED"), + /* aux MDIO pins */ + RTL839X_VPIN_DESC(1, "AUX_MDC"), + RTL839X_VPIN_DESC(2, "AUX_MDIO"), + /* JTAG/UART1 pins, UART1 functions from RTL9301 pin correspondence */ + RTL839X_VPIN_DESC(3, "JTAG_TMS/UART1_RTS/GPIO3"), + RTL839X_VPIN_DESC(4, "JTAG_TCK/UART1_CTS/GPIO4"), + RTL839X_VPIN_DESC(5, "JTAG_TRST#/UART1_/GPIO5"), + RTL839X_VPIN_DESC(6, "JTAG_TDI/UART1_RX/GPIO6"), + RTL839X_VPIN_DESC(7, "JTAG_TDO/UART1_TX/GPIO7"), +}; + +static const unsigned int rtl839x_jtag_pins[] = { + RTL839X_VPIN(3), RTL839X_VPIN(4), RTL839X_VPIN(5), RTL839X_VPIN(6), RTL839X_VPIN(7) +}; +static const unsigned int rtl839x_aux_mdio_pins[] = { + RTL839X_VPIN(1), RTL839X_VPIN(2) +}; +static const unsigned int rtl839x_sys_led_pins[] = {RTL839X_VPIN(0)}; + +static const struct rtl_swcore_mux_desc rtl839x_mux_jtag = + SWITCHCORE_MUX("jtag", REG_FIELD(0x0004, 0, 1), rtl839x_jtag_pins); + +/* + * This field is three bits in size, but the SDK isn't clear on what it means + * When enabling the RTL8231 MDIO peripheral, it sets a value of 0x4. + */ +static const struct rtl_swcore_mux_desc rtl839x_mux_aux_mdio = + SWITCHCORE_MUX("aux-mdio", REG_FIELD(0x00e4, 18, 20), rtl839x_aux_mdio_pins); + +static const struct rtl_swcore_mux_desc rtl839x_mux_sys_led = + SWITCHCORE_MUX("sys-led", REG_FIELD(0x00e4, 14, 14), rtl839x_sys_led_pins); + +static const struct rtl_swcore_mux_desc *rtl839x_groups[] = { + &rtl839x_mux_jtag, + &rtl839x_mux_aux_mdio, + &rtl839x_mux_sys_led, +}; + +static const struct rtl_swcore_mux_cfg rtl839x_gpio_configs[] = { + {&rtl839x_mux_jtag, 2}, + {&rtl839x_mux_aux_mdio, 0}, /* TODO verify pin correspondence */ + {&rtl839x_mux_sys_led, 0}, +}; +static const struct rtl_swcore_mux_cfg rtl839x_aux_mdio_configs[] = { + {&rtl839x_mux_aux_mdio, 4}, +}; +static const struct rtl_swcore_mux_cfg rtl839x_jtag_configs[] = { + {&rtl839x_mux_jtag, 0}, +}; +static const struct rtl_swcore_mux_cfg rtl839x_sys_led_configs[] = { + {&rtl839x_mux_sys_led, 1}, +}; +static const struct rtl_swcore_mux_cfg rtl839x_uart1_configs[] = { + {&rtl839x_mux_jtag, 1}, +}; + +static const struct rtl_swcore_function_desc rtl839x_functions[] = { + SWITCHCORE_FUNCTION("gpio", rtl839x_gpio_configs), + SWITCHCORE_FUNCTION("aux-mdio", rtl839x_aux_mdio_configs), + SWITCHCORE_FUNCTION("jtag", rtl839x_jtag_configs), + SWITCHCORE_FUNCTION("sys-led", rtl839x_sys_led_configs), + SWITCHCORE_FUNCTION("uart1", rtl839x_uart1_configs), +}; + +static const struct rtl_swcore_config rtl839x_config = { + .pins = rtl839x_swcore_pins, + .npins = ARRAY_SIZE(rtl839x_swcore_pins), + .functions = rtl839x_functions, + .nfunctions = ARRAY_SIZE(rtl839x_functions), + .groups = rtl839x_groups, + .ngroups = ARRAY_SIZE(rtl839x_groups), +}; + +static int rtl_swcore_group_count(struct pinctrl_dev *pctldev) +{ + struct rtl_swcore_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + + return priv->config->ngroups; +} + +static const char *rtl_swcore_group_name(struct pinctrl_dev *pctldev, unsigned int selector) +{ + struct rtl_swcore_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + + return priv->config->groups[selector]->name; +}; + +static int rtl_swcore_group_pins(struct pinctrl_dev *pctldev, + unsigned int selector, const unsigned int **pins, + unsigned int *num_pins) +{ + struct rtl_swcore_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + + *pins = priv->config->groups[selector]->pins; + *num_pins = priv->config->groups[selector]->npins; + + return 0; +} + +static int rtl_swcore_set_mux(struct pinctrl_dev *pctldev, unsigned int selector, + unsigned int group) +{ + struct rtl_swcore_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + const struct rtl_swcore_function_desc *function; + const struct rtl_swcore_mux_cfg *cfg; + const struct rtl_swcore_mux_desc *mux; + unsigned int i; + + function = &priv->config->functions[selector]; + mux = priv->config->groups[group]; + + for (i = 0; i < function->nconfigs; i++) { + cfg = &function->configs[i]; + if (cfg->mux == mux) + return regmap_field_write(priv->mux_fields[group], cfg->setting); + } + + /* Should never hit this, unless something was misconfigured */ + return -ENODEV; +} + +static const struct pinctrl_ops rtl_swcore_pinctrl_ops = { + .get_groups_count = rtl_swcore_group_count, + .get_group_name = rtl_swcore_group_name, + .get_group_pins = rtl_swcore_group_pins, + .dt_node_to_map = pinconf_generic_dt_node_to_map_all, + .dt_free_map = pinconf_generic_dt_free_map, +}; + +static const struct pinmux_ops rtl_swcore_pinmux_ops = { + .get_functions_count = pinmux_generic_get_function_count, + .get_function_name = pinmux_generic_get_function_name, + .get_function_groups = pinmux_generic_get_function_groups, + .set_mux = rtl_swcore_set_mux, + .strict = true, +}; + +static int rtl_swcore_functions_init(struct pinctrl_dev *pctl, struct rtl_swcore_pinctrl *priv) +{ + const struct rtl_swcore_function_desc *function; + unsigned int ngroups; + const char **groups; + unsigned int f_idx; + unsigned int g_idx; + + for (f_idx = 0; f_idx < priv->config->nfunctions; f_idx++) { + function = &priv->config->functions[f_idx]; + ngroups = function->nconfigs; + + groups = devm_kcalloc(priv->dev, ngroups, sizeof(*groups), GFP_KERNEL); + if (!groups) + return -ENOMEM; + + for (g_idx = 0; g_idx < ngroups; g_idx++) + groups[g_idx] = function->configs[g_idx].mux->name; + + pinmux_generic_add_function(pctl, function->name, groups, ngroups, NULL); + } + + return 0; +} + +static const struct of_device_id of_rtl_swcore_pinctrl_match[] = { + { + .compatible = "realtek,maple-pinctrl", + .data = &rtl838x_config, + }, + { + .compatible = "realtek,cypress-pinctrl", + .data = &rtl839x_config, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, of_rtl_swcore_pinctrl_match); + +static int rtl_swcore_pinctrl_probe(struct platform_device *pdev) +{ + const struct rtl_swcore_config *config; + struct rtl_swcore_pinctrl *priv; + struct device *dev = &pdev->dev; + struct pinctrl_dev *pctldev; + struct regmap_field *field; + struct regmap *regmap; + unsigned int mux; + int err; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + config = of_device_get_match_data(dev); + if (!config) + return dev_err_probe(dev, -EINVAL, "no config\n"); + + regmap = device_node_to_regmap(of_get_parent(dev_of_node(dev))); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "failed to find parent regmap\n"); + + priv->dev = dev; + priv->config = config; + priv->pdesc.name = "realtek-switchcore-pinctrl"; + priv->pdesc.owner = THIS_MODULE; + priv->pdesc.pctlops = &rtl_swcore_pinctrl_ops; + priv->pdesc.pmxops = &rtl_swcore_pinmux_ops; + priv->pdesc.pins = config->pins; + priv->pdesc.npins = config->npins; + + priv->mux_fields = devm_kcalloc(dev, config->ngroups, sizeof(*priv->mux_fields), + GFP_KERNEL); + if (!priv->mux_fields) + return -ENOMEM; + + for (mux = 0; mux < config->ngroups; mux++) { + field = devm_regmap_field_alloc(dev, regmap, config->groups[mux]->field); + if (IS_ERR(field)) + return PTR_ERR(field); + + priv->mux_fields[mux] = field; + } + + err = devm_pinctrl_register_and_init(dev, &priv->pdesc, priv, &pctldev); + if (err) + return dev_err_probe(dev, err, "failed to register\n"); + + err = rtl_swcore_functions_init(pctldev, priv); + if (err) + return dev_err_probe(dev, err, "failed to generate function list\n"); + + err = pinctrl_enable(pctldev); + if (err) + return dev_err_probe(dev, err, "failed to enable\n"); + + return 0; +}; + +static struct platform_driver rtl_swcore_pinctrl_driver = { + .driver = { + .name = "realtek-switchcore-pinctrl", + .of_match_table = of_rtl_swcore_pinctrl_match + }, + .probe = rtl_swcore_pinctrl_probe, +}; +module_platform_driver(rtl_swcore_pinctrl_driver); diff --git a/target/linux/realtek/patches-5.10/201-pinctrl-add-pinctrl-for-Realtek-maple.patch b/target/linux/realtek/patches-5.10/201-pinctrl-add-pinctrl-for-Realtek-maple.patch new file mode 100644 index 000000000000..16819e37a1f6 --- /dev/null +++ b/target/linux/realtek/patches-5.10/201-pinctrl-add-pinctrl-for-Realtek-maple.patch @@ -0,0 +1,49 @@ +From 0efa8d564f27519d20fed39f5d650e50cbc34a0b Mon Sep 17 00:00:00 2001 +From: Sander Vanheule +Date: Mon, 11 Jul 2022 21:37:17 +0200 +Subject: pinctrl: add pinctrl for Realtek switch SoCs + +Since control bits for different pin muxes are scattered throughout the +switch core's register space, pin control features are provided by a +table of regmap fields. This should be flexible enough to allow support +for currently unsupported pin muxes, and newer SoC generations providing +similar features. + +This driver add initial support for Maple and Cypress managed gigabit +switch SoCs, with RTL838xM and RTL839xM part numbers. The fast ethernet +switch SoCs from these parts series, with numbers RTL833xM and RTL835xM, +should also be supported, but have not been tested. + +Signed-off-by: Sander Vanheule +--- + +--- a/drivers/pinctrl/Kconfig ++++ b/drivers/pinctrl/Kconfig +@@ -215,6 +215,17 @@ config PINCTRL_ROCKCHIP + select MFD_SYSCON + select OF_GPIO + ++config PINCTRL_RTL_SWITCHCORE ++ bool "Realtek switch core pinctrl driver" ++ default MFD_REALTEK_SWITCHCORE ++ depends on MFD_REALTEK_SWITCHCORE || COMPILE_TEST ++ select PINMUX ++ select GENERIC_PINMUX_FUNCTIONS ++ select MFD_SYSCON ++ help ++ Driver for pin control fields in RTL83xx and RTL93xx managed ethernet ++ switch SoCs. ++ + config PINCTRL_SINGLE + tristate "One-register-per-pin type device tree based pinctrl driver" + depends on OF +--- a/drivers/pinctrl/Makefile ++++ b/drivers/pinctrl/Makefile +@@ -30,6 +30,7 @@ obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl- + obj-$(CONFIG_PINCTRL_PIC32) += pinctrl-pic32.o + obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o + obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o ++obj-$(CONFIG_PINCTRL_RTL_SWITCHCORE) += pinctrl-rtl-switchcore.o + obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o + obj-$(CONFIG_PINCTRL_SIRF) += sirf/ + obj-$(CONFIG_PINCTRL_SX150X) += pinctrl-sx150x.o diff --git a/target/linux/realtek/rtl838x/config-5.10 b/target/linux/realtek/rtl838x/config-5.10 index a642be8b2aee..fdfbc2461c1b 100644 --- a/target/linux/realtek/rtl838x/config-5.10 +++ b/target/linux/realtek/rtl838x/config-5.10 @@ -183,6 +183,7 @@ CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y CONFIG_PHYLINK=y CONFIG_PINCTRL=y +CONFIG_PINCTRL_RTL_SWITCHCORE=y CONFIG_PM_OPP=y CONFIG_POWER_RESET=y CONFIG_POWER_RESET_GPIO_RESTART=y diff --git a/target/linux/realtek/rtl839x/config-5.10 b/target/linux/realtek/rtl839x/config-5.10 index 51e6d5e8e072..344e9f988209 100644 --- a/target/linux/realtek/rtl839x/config-5.10 +++ b/target/linux/realtek/rtl839x/config-5.10 @@ -178,6 +178,7 @@ CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y CONFIG_PHYLINK=y CONFIG_PINCTRL=y +CONFIG_PINCTRL_RTL_SWITCHCORE=y CONFIG_PM_OPP=y CONFIG_POWER_RESET=y CONFIG_POWER_RESET_GPIO_RESTART=y From patchwork Sun Oct 30 18:30:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sander Vanheule X-Patchwork-Id: 1696842 X-Patchwork-Delegate: sander@svanheule.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.openwrt.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=n4VvxQSA; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=svanheule.net header.i=@svanheule.net header.a=rsa-sha256 header.s=mail1707 header.b=cwjosicA; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N0lN06nvSz23lV for ; Mon, 31 Oct 2022 05:35:44 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=k8tLDk6pApKhUm6/wnGHi3CH9ct9IaLPYhmaD+Y3OBg=; b=n4VvxQSAMaOMWx fgmzxhZK4LQE/AknFQWhmNjHek5Iszd6n/4peRw7h5RnuXNOWkSF5ZlQnfqUxOKPcP+LuYbbV9vAZ 2bm823pBQecx8iAxKFyCrPVQ4CScumJhp9ExTK+30rQNlGuJ0ngd7Rvg4wP+EqFrSvfrhTMwVxlVW FN0CIUK8e7R+hYSqoK+cTrHEMJXyNxNERDmAqVKL0JGkM3QrtDqfD1wLbT3xrY/wDj/V9OFioCT8/ +79nyNgs62kCJwT/01yM4WZieopWypL5n4QMnF5MGUW9D2fzDTik3yk1Z5UocystJ6LtnUWU0KG0l 7Ww/sJOThkCmtIEM/IMQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1opD5z-001nFC-Uy; Sun, 30 Oct 2022 18:31:44 +0000 Received: from polaris.svanheule.net ([2a00:c98:2060:a004:1::200]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1opD5f-001n4I-1j for openwrt-devel@lists.openwrt.org; Sun, 30 Oct 2022 18:31:25 +0000 Received: from terra.. (unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id BAC9433BF22; Sun, 30 Oct 2022 19:31:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154674; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DiDZEouN1r9Fb8bo+Hifck+aVrC6qvZmXlkIfAxySO8=; b=cwjosicA8nBGn7HkVvlnQPA6NLnKURmy7jkE1fSpEylo5j0qCKAWhx3+GTz/NkLNAE1APy 1O5UUmJdb9tek4O0z9R0ALZSD/UVV75upoCY8ImOLjN1xJcU4/77l+ZO3F0ftKYkEHXiSB 607Sge/tvp4pK6/ASWTXUbCuGlbW0LVyaw7VSjdqLofwJcRpaBkPwHVYmhHdGmnnMbkB9w mxtV4YLf2j23RursUgPOOHUCUml2qD8/byOC0RoL7Ib5mo/WoAVkDPLx0j4fCRsruitxVq uhnJ96E2yEq5uB+M0eVzDtUX4wHzm4bd+UCzOswUfruOA72TQTwZ6Y8m0N3u1Q== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 03/13] realtek: add base register field LED support Date: Sun, 30 Oct 2022 19:30:56 +0100 Message-Id: <7467168728bb6733c30cac4e231fa4dbfbbd7f20.1667154408.git.sander@svanheule.net> X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113123_767346_B1F6B9F4 X-CRM114-Status: GOOD ( 22.13 ) X-Spam-Score: -2.5 (--) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Realtek LED hardware peripherals share some common features. They are typically controlled through a register field, a few bits in size. These allow the LED to be turned off or on, or toggled at one o [...] Content analysis details: (-2.5 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [2a00:c98:2060:a004:1:0:0:200 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org Realtek LED hardware peripherals share some common features. They are typically controlled through a register field, a few bits in size. These allow the LED to be turned off or on, or toggled at one of a number of intervals. Support for register field LEDs is added in a new directory, so Realtek LEDs drivers can be grouped together. Signed-off-by: Sander Vanheule --- Changes in v3: - Merge symbol selection updates to ease bisecting --- .../files-5.10/drivers/leds/realtek/Kconfig | 10 ++ .../files-5.10/drivers/leds/realtek/Makefile | 2 + .../drivers/leds/realtek/led-regfield.c | 99 +++++++++++++++++++ .../drivers/leds/realtek/led-regfield.h | 55 +++++++++++ ...s-add-Realtek-LED-hardware-directory.patch | 37 +++++++ target/linux/realtek/rtl838x/config-5.10 | 1 + target/linux/realtek/rtl839x/config-5.10 | 1 + target/linux/realtek/rtl930x/config-5.10 | 1 + target/linux/realtek/rtl931x/config-5.10 | 1 + 9 files changed, 207 insertions(+) create mode 100644 target/linux/realtek/files-5.10/drivers/leds/realtek/Kconfig create mode 100644 target/linux/realtek/files-5.10/drivers/leds/realtek/Makefile create mode 100644 target/linux/realtek/files-5.10/drivers/leds/realtek/led-regfield.c create mode 100644 target/linux/realtek/files-5.10/drivers/leds/realtek/led-regfield.h create mode 100644 target/linux/realtek/patches-5.10/202-leds-add-Realtek-LED-hardware-directory.patch diff --git a/target/linux/realtek/files-5.10/drivers/leds/realtek/Kconfig b/target/linux/realtek/files-5.10/drivers/leds/realtek/Kconfig new file mode 100644 index 000000000000..687be63f739c --- /dev/null +++ b/target/linux/realtek/files-5.10/drivers/leds/realtek/Kconfig @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: GPL-2.0-only +menuconfig LEDS_RTL + bool "Realtek LED support" + help + Say Y to enable support for LED peripherals found on Realtek switch + SoCs. + +if LEDS_RTL + +endif # LED_RTL diff --git a/target/linux/realtek/files-5.10/drivers/leds/realtek/Makefile b/target/linux/realtek/files-5.10/drivers/leds/realtek/Makefile new file mode 100644 index 000000000000..125dc45ff2ce --- /dev/null +++ b/target/linux/realtek/files-5.10/drivers/leds/realtek/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_LEDS_RTL) += led-regfield.o diff --git a/target/linux/realtek/files-5.10/drivers/leds/realtek/led-regfield.c b/target/linux/realtek/files-5.10/drivers/leds/realtek/led-regfield.c new file mode 100644 index 000000000000..dd669c94c62e --- /dev/null +++ b/target/linux/realtek/files-5.10/drivers/leds/realtek/led-regfield.c @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Base support for simple, monochromatic LEDs, configured by a short register + * field. The register field should allow the LED to be turned on or off, or + * toggled at a predetermined rate with a 50% duty cycle. + */ + +#include +#include + +#include "led-regfield.h" + +static int regfield_led_set_mode(struct regfield_led *led, unsigned int mode) +{ + int err; + + err = regmap_field_write(led->field, mode); + if (!err && led->commit) + led->commit(led); + + return err; +} + +static void regfield_led_brightness_set(struct led_classdev *led_cdev, + enum led_brightness brightness) +{ + struct regfield_led *led = to_regfield_led(led_cdev); + bool turn_off = brightness == 0; + + if ((!led->active_low && turn_off) || (led->active_low && !turn_off)) + regfield_led_set_mode(led, led->modes->off); + else + regfield_led_set_mode(led, led->modes->on); +} + +static enum led_brightness regfield_led_brightness_get(struct led_classdev *led_cdev) +{ + struct regfield_led *led = to_regfield_led(led_cdev); + u32 val = 0; + + regmap_field_read(led->field, &val); + + if ((!led->active_low && (val == led->modes->off)) || + (led->active_low && (val == led->modes->on))) + return 0; + else + return 1; +} + +static int regfield_led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on, + unsigned long *delay_off) +{ + struct regfield_led *led = to_regfield_led(led_cdev); + const struct regfield_led_blink_mode *blink = led->modes->blink; + u32 cycle_ms = *delay_on + *delay_off; + int err; + + if (cycle_ms == 0) + cycle_ms = 500; + + while (blink->toggle_ms && (blink + 1)->toggle_ms) { + /* + * Split at the arithmetic mean of intervals, which compares + * the half cycle interval (cycle_ms / 2) to the mean toggle + * interval ((blink->toggle_ms + (blink + 1)->toggle_ms) / 2). + * Since the (/ 2) is common on both sides, it can be dropped. + */ + if (cycle_ms < (blink->toggle_ms + (blink + 1)->toggle_ms)) + break; + blink++; + } + + err = regfield_led_set_mode(led, blink->mode); + if (err) + return err; + + *delay_on = blink->toggle_ms; + *delay_off = blink->toggle_ms; + + return 0; +} + +int regfield_led_init(struct regfield_led *led, struct regmap_field *field, + struct fwnode_handle *fwnode, const struct regfield_led_modes *modes) +{ + if (IS_ERR_OR_NULL(field) || !modes) + return -EINVAL; + + led->field = field; + led->modes = modes; + led->active_low = fwnode_property_read_bool(fwnode, "active-low"); + + led->cdev.max_brightness = 1; + led->cdev.brightness_set = regfield_led_brightness_set; + led->cdev.brightness_get = regfield_led_brightness_get; + led->cdev.blink_set = regfield_led_blink_set; + + return 0; +} diff --git a/target/linux/realtek/files-5.10/drivers/leds/realtek/led-regfield.h b/target/linux/realtek/files-5.10/drivers/leds/realtek/led-regfield.h new file mode 100644 index 000000000000..f0a7c02514ad --- /dev/null +++ b/target/linux/realtek/files-5.10/drivers/leds/realtek/led-regfield.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef LEDS_REALTEK_LED_REGFIELD_H +#define LEDS_REALTEK_LED_REGFIELD_H + +#include +#include +#include +#include +#include + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 16, 0) +#include +#else +#include +#endif + +/* + * Register field LED + * + * Next to being able to turn an LED on or off, Realtek provides LED management + * peripherals with hardware accelerated blinking modes with 50% duty cycle. + */ +struct regfield_led_blink_mode { + u16 toggle_ms; /* Toggle interval in ms */ + u8 mode; /* ASIC mode bits */ +}; + +struct regfield_led_modes { + u8 off; + u8 on; + /* + * List of blink modes. Must be sorted by interval and terminated by an + * entry where regfield_led_blink_mode::toggle_ms equals zero. + */ + struct regfield_led_blink_mode blink[]; +}; + +struct regfield_led { + struct led_classdev cdev; + const struct regfield_led_modes *modes; + struct regmap_field *field; + void (*commit)(struct regfield_led *led); + bool active_low; +}; + +static inline struct regfield_led *to_regfield_led(struct led_classdev *cdev) +{ + return container_of(cdev, struct regfield_led, cdev); +} + +int regfield_led_init(struct regfield_led *led, struct regmap_field *field, + struct fwnode_handle *led_node, const struct regfield_led_modes *modes); + +#endif diff --git a/target/linux/realtek/patches-5.10/202-leds-add-Realtek-LED-hardware-directory.patch b/target/linux/realtek/patches-5.10/202-leds-add-Realtek-LED-hardware-directory.patch new file mode 100644 index 000000000000..4866a09f5783 --- /dev/null +++ b/target/linux/realtek/patches-5.10/202-leds-add-Realtek-LED-hardware-directory.patch @@ -0,0 +1,37 @@ +From d71ec8184236356c50088b00b2417fb142e72bd9 Mon Sep 17 00:00:00 2001 +From: Sander Vanheule +Date: Sun, 10 Jul 2022 11:31:53 +0200 +Subject: leds: add Realtek LED hardware directory +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Realtek LED hardware peripherals share some common features. They are +typically controlled through a register field, a few bits in size. These +allow the LED to be turned off or on, or toggled at one of a number of +intervals. + +Signed-off-by: Sander Vanheule +--- + +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -944,4 +944,7 @@ config LEDS_UBNT_LEDBAR + comment "LED Triggers" + source "drivers/leds/trigger/Kconfig" + ++comment "Realtek LED drivers" ++source "drivers/leds/realtek/Kconfig" ++ + endif # NEW_LEDS +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -107,5 +107,8 @@ obj-$(CONFIG_LEDS_USER) += uleds.o + # LED Triggers + obj-$(CONFIG_LEDS_TRIGGERS) += trigger/ + ++# Realtek LED drivers ++obj-y += realtek/ ++ + # LED Blink + obj-y += blink/ diff --git a/target/linux/realtek/rtl838x/config-5.10 b/target/linux/realtek/rtl838x/config-5.10 index fdfbc2461c1b..574405e05f06 100644 --- a/target/linux/realtek/rtl838x/config-5.10 +++ b/target/linux/realtek/rtl838x/config-5.10 @@ -116,6 +116,7 @@ CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y CONFIG_JFFS2_ZLIB=y CONFIG_LEDS_GPIO=y +CONFIG_LEDS_RTL=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 CONFIG_LIBFDT=y diff --git a/target/linux/realtek/rtl839x/config-5.10 b/target/linux/realtek/rtl839x/config-5.10 index 344e9f988209..5bb76371b58e 100644 --- a/target/linux/realtek/rtl839x/config-5.10 +++ b/target/linux/realtek/rtl839x/config-5.10 @@ -109,6 +109,7 @@ CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y CONFIG_JFFS2_ZLIB=y CONFIG_LEDS_GPIO=y +CONFIG_LEDS_RTL=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 CONFIG_LIBFDT=y diff --git a/target/linux/realtek/rtl930x/config-5.10 b/target/linux/realtek/rtl930x/config-5.10 index ab31186ae134..e153caadd368 100644 --- a/target/linux/realtek/rtl930x/config-5.10 +++ b/target/linux/realtek/rtl930x/config-5.10 @@ -100,6 +100,7 @@ CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y CONFIG_JFFS2_ZLIB=y CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_RTL is not set CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 CONFIG_LIBFDT=y diff --git a/target/linux/realtek/rtl931x/config-5.10 b/target/linux/realtek/rtl931x/config-5.10 index 00f751ce855a..19ae6c2dce89 100644 --- a/target/linux/realtek/rtl931x/config-5.10 +++ b/target/linux/realtek/rtl931x/config-5.10 @@ -101,6 +101,7 @@ CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y CONFIG_JFFS2_ZLIB=y CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_RTL is not set CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 CONFIG_LIBFDT=y From patchwork Sun Oct 30 18:30:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sander Vanheule X-Patchwork-Id: 1696844 X-Patchwork-Delegate: sander@svanheule.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.openwrt.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=pD1JRe8Y; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=svanheule.net header.i=@svanheule.net header.a=rsa-sha256 header.s=mail1707 header.b=iCyKGeOG; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N0lN26TY9z23lX for ; Mon, 31 Oct 2022 05:35:46 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qEllAWTYkwX31XpDKAX8pVdSoxFp4jf6SU1KnznCdwM=; b=pD1JRe8Ymx1M8C n2RdmcxlKcFatxwl4O+qgX43beZtYpAODnG7APJZtbjrIBcU3nPcn7OFkj/LB+6mxs6uv9TFmE/J5 YnQNsqzcEPN1YO3Sl31DqhLNYSM1NbxRg5ghMEg9Qzd6g1nDuGv4aHtFB8Opz4TLiX37na0dVL3rA LFXnUQOI/i9gXTAEFDgTHYrxHBIsoJD5bSmgZRFz8/SL7QhR9dPVc4Q/1anZI9wxsjdwBYGVOj8LE p67PxBfvEyCp+OHkMhqesBIpZFHJAPwH+ahqYf2B7jfryc9MIROH0CWay1lQloe/mvVsewH3lRD2g qgbQal4uA8NpobXHiQ0w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1opD6B-001nJW-Ss; Sun, 30 Oct 2022 18:31:56 +0000 Received: from polaris.svanheule.net ([84.16.241.116]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1opD5f-001n4q-Cm for openwrt-devel@lists.openwrt.org; Sun, 30 Oct 2022 18:31:27 +0000 Received: from terra.. (unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id 53A2E33BF23; Sun, 30 Oct 2022 19:31:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154675; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cRfbi1j8tEj8iT9/iIMo+v1jqJlIdauSsSgdbXEi1ZE=; b=iCyKGeOG9VMFSxfvjditpHSTMioIZ9EPw9yWLfaNHPj2YcZXQ/hvyJ2OGdH6XSDrICksD9 +NijSyP/IPjIZ6nNeNCEgw2SbUTkYXJ2FJVz2fgmgTA4T+DHO+h7RcYt0DhAy7Dz40xDep ETAoVn0FM3GKwxqiSKj69E+aqAMQ3ZO4ni8Ntqcy4L1fKub7iCu1NjaQIeDO+GSZs39+kI PqLzrZmBWcJMhUPIEDSxol4zRoFRRD7KUkmfm2yHRybvQg09tT9AD4W6ajitgXwksRTWhF QSixnX1nKlVKzR7LW4gZ7nZZ9t9ZYNZZQUWrf44xJjtvl2BLz9XJA2SVdi6eJA== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 04/13] realtek: add system LED peripheral driver Date: Sun, 30 Oct 2022 19:30:57 +0100 Message-Id: X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113123_798828_6D062883 X-CRM114-Status: GOOD ( 18.61 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Small driver to manage the system LED or sys-led peripheral, leveraging the register field led functions. The sys-led supports only two blinking intervals, so most users will probably prefer to use a [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org Small driver to manage the system LED or sys-led peripheral, leveraging the register field led functions. The sys-led supports only two blinking intervals, so most users will probably prefer to use a GPIO controlled LED. To enable blink offloading, the sys-led/GPIO0 mux needs to be configured to enable sys-led support. Signed-off-by: Sander Vanheule --- Changes in v3: - Merge symbol selection updates to ease bisecting --- .../files-5.10/drivers/leds/realtek/Kconfig | 9 ++ .../files-5.10/drivers/leds/realtek/Makefile | 1 + .../leds/realtek/rtl-switch-sys-leds.c | 105 ++++++++++++++++++ target/linux/realtek/rtl838x/config-5.10 | 1 + target/linux/realtek/rtl839x/config-5.10 | 1 + 5 files changed, 117 insertions(+) create mode 100644 target/linux/realtek/files-5.10/drivers/leds/realtek/rtl-switch-sys-leds.c diff --git a/target/linux/realtek/files-5.10/drivers/leds/realtek/Kconfig b/target/linux/realtek/files-5.10/drivers/leds/realtek/Kconfig index 687be63f739c..fb78d3269dcc 100644 --- a/target/linux/realtek/files-5.10/drivers/leds/realtek/Kconfig +++ b/target/linux/realtek/files-5.10/drivers/leds/realtek/Kconfig @@ -7,4 +7,13 @@ menuconfig LEDS_RTL if LEDS_RTL +config LEDS_RTL_SWITCHCORE_SYSTEM + bool "Realtek switch SoC system LED support" + default MFD_REALTEK_SWITCHCORE + depends on LEDS_CLASS + depends on MFD_REALTEK_SWITCHCORE || COMPILE_TEST + select MFD_SYSCON + help + This option enables support for Realtek switch SoC system LEDs. + endif # LED_RTL diff --git a/target/linux/realtek/files-5.10/drivers/leds/realtek/Makefile b/target/linux/realtek/files-5.10/drivers/leds/realtek/Makefile index 125dc45ff2ce..2aa1607199be 100644 --- a/target/linux/realtek/files-5.10/drivers/leds/realtek/Makefile +++ b/target/linux/realtek/files-5.10/drivers/leds/realtek/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_LEDS_RTL) += led-regfield.o +obj-$(CONFIG_LEDS_RTL_SWITCHCORE_SYSTEM) += rtl-switch-sys-leds.o diff --git a/target/linux/realtek/files-5.10/drivers/leds/realtek/rtl-switch-sys-leds.c b/target/linux/realtek/files-5.10/drivers/leds/realtek/rtl-switch-sys-leds.c new file mode 100644 index 000000000000..2551d6c0faf6 --- /dev/null +++ b/target/linux/realtek/files-5.10/drivers/leds/realtek/rtl-switch-sys-leds.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include +#include +#include +#include +#include + +#include "led-regfield.h" + +/* + * Realtek hardware system LED + * + * The switch SoC supports one hardware managed direct LED output + * to manage a system LED, with two supported blinking rates. + */ + +#define RTL838X_REG_LED_GLB_CTRL 0xa000 +#define RTL839X_REG_LED_GLB_CTRL 0x00e4 +#define RTL930X_REG_LED_GLB_CTRL 0xcc00 +#define RTL931X_REG_LED_GLB_CTRL 0x0600 + +static const struct reg_field rtl838x_sys_led_field = REG_FIELD(RTL838X_REG_LED_GLB_CTRL, 16, 17); +static const struct reg_field rtl839x_sys_led_field = REG_FIELD(RTL839X_REG_LED_GLB_CTRL, 15, 16); +static const struct reg_field rtl930x_sys_led_field = REG_FIELD(RTL930X_REG_LED_GLB_CTRL, 13, 14); +static const struct reg_field rtl931x_sys_led_field = REG_FIELD(RTL931X_REG_LED_GLB_CTRL, 12, 13); + +static const struct regfield_led_modes rtl_sys_led_modes = { + .off = 0, + .on = 3, + .blink = { + {64, 1}, + {1024, 2}, + { /* sentinel */ } + }, +}; + +static const struct of_device_id of_rtl_sys_led_match[] = { + { + .compatible = "realtek,maple-sys-led", + .data = &rtl838x_sys_led_field, + }, + { + .compatible = "realtek,cypress-sys-led", + .data = &rtl839x_sys_led_field, + }, + { + .compatible = "realtek,longan-sys-led", + .data = &rtl930x_sys_led_field, + }, + { + .compatible = "realtek,mango-sys-led", + .data = &rtl931x_sys_led_field, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, of_rtl_sys_led_match); + +static int rtl_sys_led_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + struct led_init_data init_data = {}; + const struct reg_field *field_data; + struct regmap_field *field; + struct regfield_led *led; + struct regmap *map; + int err; + + map = syscon_node_to_regmap(of_get_parent(dev->of_node)); + if (!map) + return dev_err_probe(dev, -ENXIO, "failed to get regmap\n"); + + led = devm_kzalloc(dev, sizeof(*led), GFP_KERNEL); + if (!led) + return -ENOMEM; + + field_data = device_get_match_data(dev); + field = devm_regmap_field_alloc(dev, map, *field_data); + if (IS_ERR(field)) + return dev_err_probe(dev, PTR_ERR(field), "register field allocation failed\n"); + + err = regfield_led_init(led, field, of_fwnode_handle(np), &rtl_sys_led_modes); + if (err) + dev_err_probe(dev, err, "regfield_led initialisation failed\n"); + + init_data.fwnode = of_fwnode_handle(np); + + return devm_led_classdev_register_ext(dev, &led->cdev, &init_data); +} + +static struct platform_driver rtl_sys_led_driver = { + .probe = rtl_sys_led_probe, + .driver = { + .name = "realtek-sys-led", + .of_match_table = of_rtl_sys_led_match, + }, +}; +module_platform_driver(rtl_sys_led_driver); + +MODULE_AUTHOR("Sander Vanheule "); +MODULE_DESCRIPTION("Realtek switch SoC system LED driver"); +MODULE_LICENSE("GPL v2"); diff --git a/target/linux/realtek/rtl838x/config-5.10 b/target/linux/realtek/rtl838x/config-5.10 index 574405e05f06..7c440c4a6e69 100644 --- a/target/linux/realtek/rtl838x/config-5.10 +++ b/target/linux/realtek/rtl838x/config-5.10 @@ -117,6 +117,7 @@ CONFIG_IRQ_WORK=y CONFIG_JFFS2_ZLIB=y CONFIG_LEDS_GPIO=y CONFIG_LEDS_RTL=y +CONFIG_LEDS_RTL_SWITCHCORE_SYSTEM=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 CONFIG_LIBFDT=y diff --git a/target/linux/realtek/rtl839x/config-5.10 b/target/linux/realtek/rtl839x/config-5.10 index 5bb76371b58e..a071b78a8c04 100644 --- a/target/linux/realtek/rtl839x/config-5.10 +++ b/target/linux/realtek/rtl839x/config-5.10 @@ -110,6 +110,7 @@ CONFIG_IRQ_WORK=y CONFIG_JFFS2_ZLIB=y CONFIG_LEDS_GPIO=y CONFIG_LEDS_RTL=y +CONFIG_LEDS_RTL_SWITCHCORE_SYSTEM=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 CONFIG_LIBFDT=y From patchwork Sun Oct 30 18:30:58 2022 Content-Type: text/plain; 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(unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id 118BB33BF24; Sun, 30 Oct 2022 19:31:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154676; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aTvJ2HqJ2espFlYICgWhs/vysekQkVWiSAhqYdl7nSk=; b=HEl+lTg7nU0Tfwl9oOCoUo0slcJC2nnall9Rw41LbwC1CtElW5MLRScGYL+BI8eNlLqphP YAdG1S+CJaIHt2nzeC4miOQABAE+KSkliqBoDMy7Cd4E9EJmb0konK7hlOTp3Xj9Q1Cj29 gukbT2IEnQcCWk6K04I3NKm8xg+o9yVtRhga7XgSiOQ9KNzJOD0m+2NmuthnzrpASw7jzf X68ox8v8fzBY4c7go3XkT5Pxf2BVymvXiVRhhMf/Tvq3UUfQVEUSlwxgVBzIgSrG9QM3lB u2fZ1m2uHkDPHsUh5Kw3A2py6jRa4+t49oUWY1lngj5q/NNrwntarzZcTOdhXw== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 05/13] realtek: add switch port LED driver Date: Sun, 30 Oct 2022 19:30:58 +0100 Message-Id: <12b45f9ff8aad138725cabb0cd4e703e46707018.1667154408.git.sander@svanheule.net> X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113127_055195_B62BDA09 X-CRM114-Status: GOOD ( 32.59 ) X-Spam-Score: -2.5 (--) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: RTL83xx switch SoCs can control up to 3 LEDs per (non-CPU) switch port, typically to display the port link status. This driver allows to address these LEDs and provides direct control from userspace, [...] Content analysis details: (-2.5 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [2a00:c98:2060:a004:1:0:0:200 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org RTL83xx switch SoCs can control up to 3 LEDs per (non-CPU) switch port, typically to display the port link status. This driver allows to address these LEDs and provides direct control from userspace, blink offloading, and switch port status offloading. On Maple (RTL838x, RTL833x) 3×28 LEDs are supported. On Cypress (RTL839x, RTL835x) 3×52 LEDs are supported. The driver expects a list of devicetree nodes, one per physical LED, or LED component in the case of multi-color LEDs. The 'reg' property of these nodes has three cells: 1. Switch's internal port number (0-27 for Maple, 0-51 for Cypress) 2. Port LED index (0-2) 3. Port type index (0 for RJ45/primary, 1 for SFP/secondary) The driver refers to the RJ45 and SFP LEDs as "primary" and "secondary", since SFP LED values are always output from the peripheral after RJ45 LED values. Note that on Maple it is not possible to control these secondary LEDs from userspace. Nevertheless, if a combo port has one LED per physical medium, both need to be specified in the devicetree. Since offloading of the generic netdev trigger does not exist (yet), this driver provides a private trigger which achieves the same and is named "realtek-switchport". Each LED will have a file named "rtl_hw_trigger" in /sys/class/leds/$LED, where the requested trigger mode can be written to. It should be noted that port status offloading is always enabled simultaneously for the primary and secondary LED. When the custom trigger is activated, the LED will be added to a group of LEDs with the same trigger conditions. If it is not possible to add the LED to a group, e.g. when the number of control groups is exhausted, the user must first choose an already existing trigger condition, or use direct LED control. If an unsupported mode is requested, or the trigger cannot be activated, this will be reported to the user via a kernel message and write failure. Some common modes (i.e. values for "rtl_hw_trigger") are: - 1G/100M/10M Link present, blink on activity: 1f - 100M/10M link, blink on activity: f - 1G link present: 10 - blink on link activity: 3 To document a port LED trigger as specified on the device's front panel, the user can specify a u32 "realtek,led-port-trigger" property in the DTS, using the helper macros from the dt-bindings header. /* Port 8, LED index 1, primary LED: Link/Act 1G LED */ led@8.1.0 { reg = <8 1 0>; color = ; function = LED_FUNCTION_LAN linux,default-trigger = "realtek-switchport"; realtek,led-port-trigger = <(RTL_LED_ACT | RTL_LED_LINK_1000)>; }; Signed-off-by: Sander Vanheule Tested-by: Alexandru Gagniuc --- Changes in v3: - Also include disabled nodes to correctly count outputs in serial mode - Port LED DT trigger support, move trigger flags to dt-bindings - Set default HW offloading state before LED registration - Merge symbol selection updates to ease bisecting --- .../files-5.10/drivers/leds/realtek/Kconfig | 9 + .../files-5.10/drivers/leds/realtek/Makefile | 1 + .../leds/realtek/rtl-switch-port-leds.c | 973 ++++++++++++++++++ .../dt-bindings/leds/realtek-led-trigger.h | 25 + target/linux/realtek/rtl838x/config-5.10 | 1 + target/linux/realtek/rtl839x/config-5.10 | 1 + 6 files changed, 1010 insertions(+) create mode 100644 target/linux/realtek/files-5.10/drivers/leds/realtek/rtl-switch-port-leds.c create mode 100644 target/linux/realtek/files-5.10/include/dt-bindings/leds/realtek-led-trigger.h diff --git a/target/linux/realtek/files-5.10/drivers/leds/realtek/Kconfig b/target/linux/realtek/files-5.10/drivers/leds/realtek/Kconfig index fb78d3269dcc..f3400b52f990 100644 --- a/target/linux/realtek/files-5.10/drivers/leds/realtek/Kconfig +++ b/target/linux/realtek/files-5.10/drivers/leds/realtek/Kconfig @@ -7,6 +7,15 @@ menuconfig LEDS_RTL if LEDS_RTL +config LEDS_RTL_SWITCHCORE_PORT + bool "Realtek switch SoC port LED support" + default MFD_REALTEK_SWITCHCORE + depends on LEDS_CLASS + depends on MFD_REALTEK_SWITCHCORE || COMPILE_TEST + select MFD_SYSCON + help + This option enables support for Realtek switch SoC port LEDs. + config LEDS_RTL_SWITCHCORE_SYSTEM bool "Realtek switch SoC system LED support" default MFD_REALTEK_SWITCHCORE diff --git a/target/linux/realtek/files-5.10/drivers/leds/realtek/Makefile b/target/linux/realtek/files-5.10/drivers/leds/realtek/Makefile index 2aa1607199be..edcaf56bec70 100644 --- a/target/linux/realtek/files-5.10/drivers/leds/realtek/Makefile +++ b/target/linux/realtek/files-5.10/drivers/leds/realtek/Makefile @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_LEDS_RTL) += led-regfield.o +obj-$(CONFIG_LEDS_RTL_SWITCHCORE_PORT) += rtl-switch-port-leds.o obj-$(CONFIG_LEDS_RTL_SWITCHCORE_SYSTEM) += rtl-switch-sys-leds.o diff --git a/target/linux/realtek/files-5.10/drivers/leds/realtek/rtl-switch-port-leds.c b/target/linux/realtek/files-5.10/drivers/leds/realtek/rtl-switch-port-leds.c new file mode 100644 index 000000000000..b4bac813d747 --- /dev/null +++ b/target/linux/realtek/files-5.10/drivers/leds/realtek/rtl-switch-port-leds.c @@ -0,0 +1,973 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "led-regfield.h" + +/* + * Realtek switch port LED + * + * The switch ASIC can control multiple LEDs per phy, based on a number of + * matching conditions. Alternatively, each individual LED output can also be + * configured for manual control. + */ +enum rtl_led_output_mode { + RTL_LED_OUTPUT_SERIAL = 0, + RTL_LED_OUTPUT_SCAN_SINGLE = 1, + RTL_LED_OUTPUT_SCAN_BICOLOR = 2, + RTL_LED_OUTPUT_DISABLED = 3, +}; + +struct led_port_group { + unsigned int index; + struct regmap_field *setting; + unsigned int size; + /* bitmap to keep track of associated ports */ + unsigned long *ports; +}; + +#define GROUP_LIST_INDEX(cfg, grp, idx) ((cfg)->port_led_count * (grp) + (idx)) + +struct switch_port_led_ctrl; + +struct switch_port_led { + struct regfield_led led; + struct switch_port_led_ctrl *ctrl; + struct led_port_group *current_group; + u32 trigger_flags; + u8 port; + u8 index; + bool is_secondary; +}; + +struct switch_port_led_config { + /* Number of switch ports with configurable LEDs */ + unsigned int port_count; + /* Number of LEDs per port */ + unsigned int port_led_count; + /* Number of groups the LEDs can be assigned to for status offloading */ + unsigned int group_count; + /* Whether the secondary (SFP cage) LEDs can be controlled separately */ + bool independent_secondaries; + /* Port LED on/off/blink modes */ + const struct regfield_led_modes *modes; + /* reg_field storing the index-specific user mode */ + struct reg_field (*led_regfield)(unsigned int port, unsigned int index); + /* reg_field storing the index-specific offloaded group setting */ + struct reg_field (*group_regfield)(unsigned int group, unsigned int index); + /* Configure and start the peripheral */ + int (*init)(struct switch_port_led_ctrl *ctrl, enum rtl_led_output_mode mode); + /* Optional - Latch the updated LED configuration */ + void (*led_commit)(struct regfield_led *led); + /* Switch between HW offloading or user control */ + int (*set_hw_managed)(struct switch_port_led *led, bool hw_managed); + /* Translate a generic trigger to a gen-specific one */ + int (*trigger_xlate)(struct switch_port_led *led, u32 trigger); + /* + * Find the group the LED with this trigger setting can be assigned to. + * Can be either an existing group with identical settings, or an empty + * group. Return a group on success, or < 0 on failure. + */ + struct led_port_group *(*map_group)(struct switch_port_led *led, u32 trigger); + /* Configure the LED for HW offloading according to the provided group settings */ + int (*assign_group)(struct switch_port_led *led, struct led_port_group *group); +}; + +struct switch_port_led_mask { + /* TODO could use two :4 bit fields */ + u8 primary; + u8 secondary; +}; + +struct switch_port_led_ctrl { + struct device *dev; + struct regmap *map; + const struct switch_port_led_config *cfg; + struct mutex lock; + struct switch_port_led_mask *available_leds; + struct led_port_group *groups; +}; + +static inline struct switch_port_led *to_switch_port_led(struct led_classdev *cdev) +{ + return container_of(to_regfield_led(cdev), struct switch_port_led, led); +} + +static struct led_port_group *switch_port_led_get_group( + struct switch_port_led *pled, unsigned int group) +{ + unsigned int i = GROUP_LIST_INDEX(pled->ctrl->cfg, group, pled->index); + + return &pled->ctrl->groups[i]; +} + +static struct led_port_group *rtl_generic_port_led_map_group(struct switch_port_led *led, + u32 trigger) +{ + struct switch_port_led_ctrl *ctrl = led->ctrl; + int rtl_trg = ctrl->cfg->trigger_xlate(led, trigger); + unsigned int i; + u32 current_trg; + + if (rtl_trg < 0) + return ERR_PTR(rtl_trg); + + for (i = 0; i < led->ctrl->cfg->group_count; i++) { + struct led_port_group *group = switch_port_led_get_group(led, i); + int err = regmap_field_read(group->setting, ¤t_trg); + + if (err) + return ERR_PTR(err); + + if (current_trg == rtl_trg || bitmap_empty(group->ports, group->size)) + return group; + } + + dev_warn(ctrl->dev, "no available group for (%d,%d,%d) with trigger 0x%02x\n", + led->port, led->index, led->is_secondary, rtl_trg); + return ERR_PTR(-ENOSPC); +} + +/* Maple registers */ +#define RTL838X_REG_LED_MODE_SEL 0x1004 +#define RTL838X_REG_LED_GLB_CTRL 0xa000 +#define RTL838X_GLB_CTRL_COMBO_MODE GENMASK(8, 7) +#define RTL838X_GLB_CTRL_HIGH_PORTS GENMASK(5, 3) +#define RTL838X_GLB_CTRL_LOW_PORTS GENMASK(2, 0) +#define RTL838X_REG_LED_MODE_CTRL 0xa004 +#define RTL838X_REG_LED_P_EN_CTRL 0xa008 +#define RTL838X_REG_LED_SW_P_EN_CTRL(index) (0xa010 + 4 * (index)) +#define RTL838X_REG_LED_SW_CTRL(port) (0xa01c + 4 * (port)) +#define RTL838X_SW_SETTING_WIDTH 3 + +#define RTL838X_PORT_LED_COUNT 3 +#define RTL838X_GROUP_SETTING_WIDTH 5 +#define RTL838X_GROUP_SETTING_SHIFT(grp, idx) \ + (RTL838X_GROUP_SETTING_WIDTH * ((idx) + RTL838X_PORT_LED_COUNT * (grp))) + +#define RTL838X_PORT_COMBO_LOW 20 +#define RTL838X_PORT_COMBO_HIGH 24 + +/* Cypress registers */ +#define RTL839X_REG_LED_GLB_CTRL 0x00e4 +#define RTL839X_GLB_CTRL_LED_EN BIT(5) +#define RTL839X_GLB_CTRL_LED_NUM_SEL GENMASK(3, 2) +#define RTL839X_GLB_CTRL_LED_IF_SEL GENMASK(1, 0) +#define RTL839X_REG_LED_COPR_SET_SEL_CTRL(port) (0x00f0 + 4 * ((port) / 16)) +#define RTL839X_REG_LED_FIB_SET_SEL_CTRL(port) (0x0100 + 4 * ((port) / 16)) +#define RTL839X_REG_LED_COPR_PMASK_CTRL(port) (0x0110 + 4 * ((port) / 32)) +#define RTL839X_REG_LED_FIB_PMASK_CTRL(port) (0x0118 + 4 * ((port) / 32)) +#define RTL839X_REG_LED_COMBO_CTRL(port) (0x0120 + 4 * ((port) / 32)) +#define RTL839X_REG_LED_SW_CTRL 0x0128 +#define RTL839X_REG_LED_SW_P_EN_CTRL(port) (0x012c + 4 * ((port) / 10)) +#define RTL839X_REG_LED_SW_P_CTRL(port) (0x0144 + 4 * (port)) + +#define RTL839X_PORT_LED_COUNT 3 +#define RTL839X_SW_SETTING_WIDTH 3 +#define RTL839X_GROUP_SETTING_WIDTH 5 +#define RTL839X_GROUP_SETTING_REG(grp) (0x00ec - 4 * ((grp) / 2)) +#define RTL839X_GROUP_SETTING_SHIFT(grp, idx) \ + (RTL839X_GROUP_SETTING_WIDTH * ((idx) + RTL839X_PORT_LED_COUNT * ((grp) % 2))) + +/* Maple and Cypress have mostly the same trigger configuration values */ +enum rtl83xx_port_trigger { + RTL83XX_TRIG_LINK_ACT = 0, + RTL83XX_TRIG_LINK = 1, + RTL83XX_TRIG_ACT = 2, + RTL83XX_TRIG_ACT_RX = 3, + RTL83XX_TRIG_ACT_TX = 4, + RTL83XX_TRIG_DUPLEX_MODE = 6, + RTL83XX_TRIG_LINK_1G = 7, + RTL83XX_TRIG_LINK_100M = 8, + RTL83XX_TRIG_LINK_10M = 9, + RTL83XX_TRIG_LINK_ACT_1G = 10, + RTL83XX_TRIG_LINK_ACT_100M = 11, + RTL83XX_TRIG_LINK_ACT_10M = 12, + RTL83XX_TRIG_LINK_ACT_1G_100M = 13, + RTL83XX_TRIG_LINK_ACT_1G_10M = 14, + RTL83XX_TRIG_LINK_ACT_100M_10M = 15, + RTL83XX_TRIG_LINK_ACT_10G = 21, + RTL83XX_TRIG_DISABLED = 31, +}; + +static int rtl83xx_port_trigger_xlate(u32 port_led_trigger) +{ + switch (port_led_trigger) { + case RTL_LED_NONE: + return RTL83XX_TRIG_DISABLED; + case RTL_LED_ACT_RX: + return RTL83XX_TRIG_ACT_RX; + case RTL_LED_ACT_TX: + return RTL83XX_TRIG_ACT_TX; + case RTL_LED_ACT: + return RTL83XX_TRIG_ACT; + case RTL_LED_LINK_10 | RTL_LED_LINK_100 | RTL_LED_LINK_1000: + return RTL83XX_TRIG_LINK; + case RTL_LED_LINK_10: + return RTL83XX_TRIG_LINK_10M; + case RTL_LED_LINK_100: + return RTL83XX_TRIG_LINK_100M; + case RTL_LED_LINK_1000: + return RTL83XX_TRIG_LINK_1G; + case RTL_LED_ACT | RTL_LED_LINK_10 | RTL_LED_LINK_100 | RTL_LED_LINK_1000: + return RTL83XX_TRIG_LINK_ACT; + case RTL_LED_ACT | RTL_LED_LINK_10: + return RTL83XX_TRIG_LINK_ACT_10M; + case RTL_LED_ACT | RTL_LED_LINK_100: + return RTL83XX_TRIG_LINK_ACT_100M; + case RTL_LED_ACT | RTL_LED_LINK_1000: + return RTL83XX_TRIG_LINK_ACT_1G; + case RTL_LED_ACT | RTL_LED_LINK_10000: + return RTL83XX_TRIG_LINK_ACT_10G; + case RTL_LED_ACT | RTL_LED_LINK_10 | RTL_LED_LINK_100: + return RTL83XX_TRIG_LINK_ACT_100M_10M; + case RTL_LED_ACT | RTL_LED_LINK_10 | RTL_LED_LINK_1000: + return RTL83XX_TRIG_LINK_ACT_1G_10M; + case RTL_LED_ACT | RTL_LED_LINK_100 | RTL_LED_LINK_1000: + return RTL83XX_TRIG_LINK_ACT_1G_100M; + default: + return -EINVAL; + } +} + +/* + * SoC specific implementation for RTL8380 series (Maple) + */ +static int rtl838x_port_trigger_xlate(struct switch_port_led *led, u32 port_led_trigger) +{ + if (port_led_trigger & (RTL_LED_LINK_2500 | RTL_LED_LINK_5000 | RTL_LED_LINK_10000)) + return -EINVAL; + + return rtl83xx_port_trigger_xlate(port_led_trigger); +} + +/* + * Maple/RTL838x has two static groups: + * - group 0: ports 0-23 + * - group 1: ports 24-27 (high combo ports) + * + * When both groups need the same setting, the generic implementation would + * always return the first group. However, high ports can only be controlled + * via the second group, so we need an override of the generic implementation. + */ +static struct led_port_group *rtl838x_port_led_map_group(struct switch_port_led *led, u32 trigger) +{ + int rtl_trigger = rtl838x_port_trigger_xlate(led, trigger); + struct switch_port_led_ctrl *ctrl = led->ctrl; + struct led_port_group *group; + u32 current_trigger; + int err; + + if (rtl_trigger < 0) + return ERR_PTR(rtl_trigger); + + if (led->port < RTL838X_PORT_COMBO_HIGH) + group = switch_port_led_get_group(led, 0); + else + group = switch_port_led_get_group(led, 1); + + err = regmap_field_read(group->setting, ¤t_trigger); + if (err) + return ERR_PTR(err); + + if (current_trigger != rtl_trigger && !bitmap_empty(group->ports, group->size)) { + dev_warn(ctrl->dev, "cannot map (%d,%d) to group %d: 0x%02x != 0x%02x\n", + led->port, led->index, group->index, current_trigger, rtl_trigger); + return ERR_PTR(-ENOSPC); + } + + return group; +} + +int rtl838x_port_led_assign_group(struct switch_port_led *led, struct led_port_group *group) +{ + /* + * Since group assignments are static on Maple, this is a no-op. + * rtl838x_port_led_map_group() will provide the correct group assignments. + */ + return 0; +} + +static int rtl838x_port_led_set_hw_managed(struct switch_port_led *led, bool hw_managed) +{ + unsigned int reg = RTL838X_REG_LED_SW_P_EN_CTRL(led->index); + u32 val = hw_managed ? 0 : BIT(led->port); + + return regmap_update_bits(led->ctrl->map, reg, BIT(led->port), val); +} + +static struct reg_field rtl838x_port_led_regfield(unsigned int port, unsigned int index) +{ + unsigned int reg = RTL838X_REG_LED_SW_CTRL(port); + unsigned int shift = index * RTL838X_SW_SETTING_WIDTH; + + return (struct reg_field) REG_FIELD(reg, shift, shift + RTL838X_SW_SETTING_WIDTH - 1); +} + +static struct reg_field rtl838x_port_led_group_regfield(unsigned int group, unsigned int index) +{ + unsigned int reg = RTL838X_REG_LED_MODE_CTRL; + unsigned int shift = RTL838X_GROUP_SETTING_SHIFT(group, index); + + return (struct reg_field) REG_FIELD(reg, shift, shift + RTL838X_GROUP_SETTING_WIDTH - 1); +} + +static int rtl838x_port_led_init(struct switch_port_led_ctrl *ctrl, enum rtl_led_output_mode mode) +{ + unsigned int led_possible_mask_high = 0; + unsigned int led_possible_mask_low = 0; + unsigned int combo_port_min = ctrl->cfg->port_count; + unsigned int combo_port_max = 0; + unsigned int combo_port_val = 0; + unsigned int port; + u32 glb_ctrl_mask; + u32 glb_ctrl_val; + int err; + + /* Disable all LEDs, (re-)enable when configuring */ + regmap_write(ctrl->map, RTL838X_REG_LED_P_EN_CTRL, 0); + + for (port = 0; port < ctrl->cfg->port_count; port++) { + const struct switch_port_led_mask *led_masks = &ctrl->available_leds[port]; + u32 port_mask = led_masks->primary | led_masks->secondary; + + if (!port_mask) + continue; + + if (port < RTL838X_PORT_COMBO_HIGH) + led_possible_mask_low |= port_mask; + else + led_possible_mask_high |= port_mask; + + if (led_masks->primary && led_masks->secondary) { + combo_port_min = min(combo_port_min, port); + combo_port_max = max(combo_port_max, port); + } + + /* Enable a port if any of its LED are used */ + err = regmap_update_bits(ctrl->map, RTL838X_REG_LED_P_EN_CTRL, + BIT(port), BIT(port)); + if (err) + return err; + } + + /* + * Combo ports are allowed in either [20, 23] or [24, 27]. + * Setting the combo port field to a non-zero value, will cause extra + * LED values to be scanned out. The field value determines if these + * follow the primary LED data for port 23 of 27. The number of extra + * LEDs depends on the number of ports that is enabled (LED wise) in + * the applicable range. + */ + if (combo_port_min < RTL838X_PORT_COMBO_LOW) { + dev_err(ctrl->dev, "combo ports < %d not supported\n", RTL838X_PORT_COMBO_LOW); + return -EINVAL; + } + if (combo_port_min < RTL838X_PORT_COMBO_HIGH && combo_port_max >= RTL838X_PORT_COMBO_HIGH) { + dev_err(ctrl->dev, "illegal combo port combination\n"); + return -EINVAL; + } + + if (combo_port_min < RTL838X_PORT_COMBO_HIGH) + combo_port_val = 1; + else if (combo_port_min < ctrl->cfg->port_count) + combo_port_val = 2; + + glb_ctrl_mask = RTL838X_GLB_CTRL_COMBO_MODE; + glb_ctrl_val = FIELD_PREP(RTL838X_GLB_CTRL_COMBO_MODE, combo_port_val); + + /* + * The number-of-LEDs-per-port fields require a mask instead of a number. + * All lowest bits must be set, so e.g. BIT(1) is disallowed. + * + * According to the SDK, the high port mask cannot be empty, even if + * none of the LEDs are used. If no LEDs are configured, we must use the + * value of the low port mask. + */ + if (!led_possible_mask_high) + led_possible_mask_high = led_possible_mask_low; + + if (led_possible_mask_low) + led_possible_mask_low = GENMASK(fls(led_possible_mask_low) - 1, 0); + if (led_possible_mask_high) + led_possible_mask_high = GENMASK(fls(led_possible_mask_high) - 1, 0); + + glb_ctrl_mask |= RTL838X_GLB_CTRL_HIGH_PORTS | RTL838X_GLB_CTRL_LOW_PORTS; + glb_ctrl_val |= FIELD_PREP(RTL838X_GLB_CTRL_LOW_PORTS, led_possible_mask_low); + glb_ctrl_val |= FIELD_PREP(RTL838X_GLB_CTRL_HIGH_PORTS, led_possible_mask_high); + + err = regmap_update_bits(ctrl->map, RTL838X_REG_LED_GLB_CTRL, glb_ctrl_mask, glb_ctrl_val); + if (err) + return err; + + /* Set mode to enable output */ + return regmap_write(ctrl->map, RTL838X_REG_LED_MODE_SEL, mode); +} + +static const struct regfield_led_modes rtl838x_port_led_modes = { + .off = 0, + .on = 5, + /* Modes 6 and 7 appear to be a late additions to the list */ + .blink = { + { 32, 1}, + { 64, 2}, + { 128, 3}, + { 256, 6}, + { 512, 4}, + {1024, 7}, + { /* sentinel */ } + }, +}; + +static const struct switch_port_led_config rtl838x_port_led_config = { + .port_count = 28, + .port_led_count = 3, + .group_count = 2, + .independent_secondaries = false, + .modes = &rtl838x_port_led_modes, + .led_regfield = rtl838x_port_led_regfield, + .group_regfield = rtl838x_port_led_group_regfield, + .init = rtl838x_port_led_init, + .set_hw_managed = rtl838x_port_led_set_hw_managed, + .trigger_xlate = rtl838x_port_trigger_xlate, + .map_group = rtl838x_port_led_map_group, + .assign_group = rtl838x_port_led_assign_group, +}; + +/* + * SoC specific implementation for RTL8390 series (Cypress) + */ +static void rtl839x_port_led_commit(struct regfield_led *rled) +{ + const struct switch_port_led *led = container_of(rled, struct switch_port_led, led); + + /* + * Could trigger the latching with delayed work, + * but that's probably not worth the overhead + */ + regmap_write(led->ctrl->map, RTL839X_REG_LED_SW_CTRL, 1); +} + +static int rtl839x_port_trigger_xlate(struct switch_port_led *led, u32 port_led_trigger) +{ + if (port_led_trigger & (RTL_LED_LINK_2500 | RTL_LED_LINK_5000)) + return -EINVAL; + + return rtl83xx_port_trigger_xlate(port_led_trigger); +} + +int rtl839x_port_led_assign_group(struct switch_port_led *led, struct led_port_group *group) +{ + unsigned int shift = 2 * (led->port % 16); + u32 mask = GENMASK(1, 0) << shift; + u32 val = group->index << shift; + unsigned int reg_set; + + if (led->is_secondary) + reg_set = RTL839X_REG_LED_FIB_SET_SEL_CTRL(led->port); + else + reg_set = RTL839X_REG_LED_COPR_SET_SEL_CTRL(led->port); + + return regmap_update_bits(led->ctrl->map, reg_set, mask, val); +} + +static int rtl839x_port_led_set_hw_managed(struct switch_port_led *led, bool hw_managed) +{ + u32 port_field_mask = BIT(3 * (led->port % 10) + led->index); + int reg = RTL839X_REG_LED_SW_P_EN_CTRL(led->port); + u32 val = hw_managed ? 0 : port_field_mask; + + return regmap_update_bits(led->ctrl->map, reg, port_field_mask, val); +} + +static struct reg_field rtl839x_port_led_regfield(unsigned int port, unsigned int index) +{ + unsigned int reg = RTL839X_REG_LED_SW_P_CTRL(port); + unsigned int shift = index * RTL839X_SW_SETTING_WIDTH; + + return (struct reg_field) REG_FIELD(reg, shift, shift + RTL839X_SW_SETTING_WIDTH - 1); +} + +static struct reg_field rtl839x_port_led_group_regfield(unsigned int group, unsigned int index) +{ + unsigned int reg = RTL839X_GROUP_SETTING_REG(group); + unsigned int shift = RTL839X_GROUP_SETTING_SHIFT(group, index); + + return (struct reg_field) REG_FIELD(reg, shift, shift + RTL839X_GROUP_SETTING_WIDTH - 1); +} + +static int rtl839x_port_led_init(struct switch_port_led_ctrl *ctrl, enum rtl_led_output_mode mode) +{ + u32 led_count = 0; + unsigned int port; + u32 reg_mask; + u32 reg_val; + u32 pmask; + int err; + + /* Clear {COPR,FIB}_PMASK and COMBO_CTRL registers to disable all LEDs */ + for (port = 0; port < ctrl->cfg->port_count; port += 32) { + regmap_write(ctrl->map, RTL839X_REG_LED_COPR_PMASK_CTRL(port), 0); + regmap_write(ctrl->map, RTL839X_REG_LED_FIB_PMASK_CTRL(port), 0); + regmap_write(ctrl->map, RTL839X_REG_LED_COMBO_CTRL(port), 0); + } + + for (port = 0; port < ctrl->cfg->port_count; port++) { + struct switch_port_led_mask *led_mask = &ctrl->available_leds[port]; + + if (!led_mask->primary && !led_mask->secondary) + continue; + + led_count = max_t(u32, led_count, fls(led_mask->primary | led_mask->secondary)); + pmask = BIT(port % 32); + + /* + * SDK will only set the COPR_PMASK bit if an RJ45 port is + * present, and FIB_PMASK if an SFP cage is present. + * Here instead, always trigger on both port types (i.e. set + * COPR_PMASK and FIB_PMASK), but tell the hardware there is + * only one LED for our (fake) combo port by also setting + * COMBO_CTRL. + * A real combo port with one LED should thus only ever need to + * specify a primary LED, consistent with the physical LED + * layout. + */ + err = regmap_update_bits(ctrl->map, RTL839X_REG_LED_COPR_PMASK_CTRL(port), + pmask, pmask); + if (err) + return err; + err = regmap_update_bits(ctrl->map, RTL839X_REG_LED_FIB_PMASK_CTRL(port), + pmask, pmask); + if (err) + return err; + + if (led_mask->primary && led_mask->secondary) + continue; + + err = regmap_update_bits(ctrl->map, RTL839X_REG_LED_COMBO_CTRL(port), pmask, pmask); + if (err) + return err; + } + + reg_mask = RTL839X_GLB_CTRL_LED_EN; + reg_mask |= RTL839X_GLB_CTRL_LED_NUM_SEL; + reg_mask |= RTL839X_GLB_CTRL_LED_IF_SEL; + reg_val = RTL839X_GLB_CTRL_LED_EN; + reg_val |= FIELD_PREP(RTL839X_GLB_CTRL_LED_NUM_SEL, led_count); + reg_val |= FIELD_PREP(RTL839X_GLB_CTRL_LED_IF_SEL, mode); + + return regmap_update_bits(ctrl->map, RTL839X_REG_LED_GLB_CTRL, reg_mask, reg_val); +} + +static const struct regfield_led_modes rtl839x_port_led_modes = { + .off = 0, + .on = 7, + .blink = { + { 32, 1}, + { 64, 2}, + { 128, 3}, + { 256, 4}, + { 512, 5}, + {1024, 6}, + { /* sentinel */ } + }, +}; + +static const struct switch_port_led_config rtl839x_port_led_config = { + .port_count = 52, + .port_led_count = 3, + .group_count = 4, + .independent_secondaries = true, + .modes = &rtl839x_port_led_modes, + .led_regfield = rtl839x_port_led_regfield, + .group_regfield = rtl839x_port_led_group_regfield, + .led_commit = rtl839x_port_led_commit, + .init = rtl839x_port_led_init, + .set_hw_managed = rtl839x_port_led_set_hw_managed, + .trigger_xlate = rtl839x_port_trigger_xlate, + .map_group = rtl_generic_port_led_map_group, + .assign_group = rtl839x_port_led_assign_group, +}; + +/* + * Custom LED trigger interface + */ +static struct led_hw_trigger_type switch_port_rtl_hw_trigger_type; + +static ssize_t rtl_hw_trigger_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct led_classdev *cdev = dev_get_drvdata(dev); + struct switch_port_led *pled = to_switch_port_led(cdev); + + return sprintf(buf, "%x\n", pled->trigger_flags); +} + +/* + * Add an LED to a group, leaving the old group as required. + * To enable HW offloading, the HW trigger must be enabled separately. + */ +static int rtl_hw_trigger_assign(struct switch_port_led *led, int trigger) +{ + const struct switch_port_led_config *cfg = led->ctrl->cfg; + struct led_port_group *group; + u32 rtl_trigger; + int err; + + rtl_trigger = cfg->trigger_xlate(led, trigger); + if (rtl_trigger < 0) + return rtl_trigger; + + /* + * Need to leave old group first, since we may need this to allocate a + * new group. On assignment failure, this needs to be rolled back. + */ + if (led->current_group) + bitmap_clear(led->current_group->ports, led->port, 1); + + group = cfg->map_group(led, trigger); + if (IS_ERR(group)) { + err = PTR_ERR(group); + goto err_out; + } + + if (bitmap_empty(group->ports, group->size)) { + err = regmap_field_write(group->setting, rtl_trigger); + if (err) + goto err_out; + } + + err = cfg->assign_group(led, group); + if (err) + goto err_out; + + bitmap_set(group->ports, led->port, 1); + led->current_group = group; + + return 0; + +err_out: + if (led->current_group) + bitmap_set(led->current_group->ports, led->port, 1); + + return err; +} + +static ssize_t rtl_hw_trigger_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct led_classdev *cdev = dev_get_drvdata(dev); + struct switch_port_led *pled = to_switch_port_led(cdev); + struct switch_port_led_ctrl *ctrl = pled->ctrl; + int err = 0; + int trigger; + int nchars; + int value; + + if (sscanf(buf, "%x%n", &value, &nchars) != 1 || nchars + 1 < count) + return -EINVAL; + + if (pled->trigger_flags == value) + return count; + + trigger = ctrl->cfg->trigger_xlate(pled, value); + if (trigger < 0) + return trigger; + + mutex_lock(&ctrl->lock); + + if (pled->current_group) { + err = rtl_hw_trigger_assign(pled, value); + if (err) + goto out; + } + + pled->trigger_flags = value; + +out: + mutex_unlock(&ctrl->lock); + + if (err) + return err; + + return count; +} +static DEVICE_ATTR_RW(rtl_hw_trigger); + +/* TODO Change to tx/rx/link sysfs attributes like netdev? */ +static struct attribute *rtl_hw_trigger_attrs[] = { + &dev_attr_rtl_hw_trigger.attr, + NULL +}; +ATTRIBUTE_GROUPS(rtl_hw_trigger); + +static int switch_port_led_trigger_activate(struct led_classdev *led_cdev) +{ + struct switch_port_led *pled = to_switch_port_led(led_cdev); + int err = 0; + + mutex_lock(&pled->ctrl->lock); + + err = rtl_hw_trigger_assign(pled, pled->trigger_flags); + if (err) + goto out; + + err = pled->ctrl->cfg->set_hw_managed(pled, true); + +out: + mutex_unlock(&pled->ctrl->lock); + + return err; +} + +static void switch_port_led_trigger_deactivate(struct led_classdev *led_cdev) +{ + struct switch_port_led *pled = to_switch_port_led(led_cdev); + + mutex_lock(&pled->ctrl->lock); + + if (pled->ctrl->cfg->set_hw_managed(pled, false)) + goto out; + + bitmap_clear(pled->current_group->ports, pled->port, 1); + pled->current_group = NULL; + +out: + mutex_unlock(&pled->ctrl->lock); +} + +static struct led_trigger switch_port_rtl_hw_trigger = { + .name = "realtek-switchport", + .activate = switch_port_led_trigger_activate, + .deactivate = switch_port_led_trigger_deactivate, + .trigger_type = &switch_port_rtl_hw_trigger_type, +}; + +static int switch_port_register_classdev(struct switch_port_led *pled, struct fwnode_handle *fwnode) +{ + struct led_init_data init_data = {}; + struct regmap_field *field; + + field = devm_regmap_field_alloc(pled->ctrl->dev, pled->ctrl->map, + pled->ctrl->cfg->led_regfield(pled->port, pled->index)); + if (IS_ERR(field)) + return PTR_ERR(field); + + regfield_led_init(&pled->led, field, fwnode, pled->ctrl->cfg->modes); + + pled->led.commit = pled->ctrl->cfg->led_commit; + pled->led.cdev.trigger_type = &switch_port_rtl_hw_trigger_type; + pled->led.cdev.groups = rtl_hw_trigger_groups; + + init_data.fwnode = fwnode; + + return devm_led_classdev_register_ext(pled->ctrl->dev, &pled->led.cdev, &init_data); +} + +static struct switch_port_led *switch_port_led_probe_single( + struct switch_port_led_ctrl *ctrl, struct device_node *np) +{ + struct fwnode_handle *fwnode = of_fwnode_handle(np); + struct switch_port_led *pled; + unsigned int port_index; + unsigned int led_index; + const __be32 *addr; + bool is_secondary; + u32 trigger = 0; + int err; + + addr = of_get_address(np, 0, NULL, NULL); + if (!addr) { + dev_warn(ctrl->dev, "failed to read led address\n"); + return ERR_PTR(-ENODEV); + } + + port_index = of_read_number(addr, 1); + led_index = of_read_number(addr + 1, 1); + is_secondary = of_read_number(addr + 2, 1); + + if (port_index >= ctrl->cfg->port_count) { + dev_warn(ctrl->dev, "invalid port number %d\n", port_index); + return ERR_PTR(-ENODEV); + } + if (led_index >= ctrl->cfg->port_led_count) { + dev_warn(ctrl->dev, "invalid LED index %d\n", led_index); + return ERR_PTR(-ENODEV); + } + + /* Even if LED is disabled, use it to count the number of used outputs. */ + if (!is_secondary) + ctrl->available_leds[port_index].primary |= BIT(led_index); + else + ctrl->available_leds[port_index].secondary |= BIT(led_index); + + if (!fwnode_device_is_available(fwnode)) + return NULL; + + /* + * On Cypress and newer, secondary LEDs can be software controlled and + * have an independent hardware trigger. On Maple this is not possible. + * We should not register a classdev for secondary LEDs on Maple. + */ + if (is_secondary && !ctrl->cfg->independent_secondaries) + return NULL; + + pled = devm_kzalloc(ctrl->dev, sizeof(*pled), GFP_KERNEL); + if (!pled) + return ERR_PTR(-ENOMEM); + + pled->ctrl = ctrl; + pled->port = port_index; + pled->index = led_index; + pled->is_secondary = is_secondary; + + /* Optional trigger, matching on-device labeling */ + fwnode_property_read_u32(fwnode, "realtek,port-led-trigger", &trigger); + if (ctrl->cfg->trigger_xlate(pled, trigger) < 0) + dev_warn(ctrl->dev, "invalid LED trigger %x", trigger); + else + pled->trigger_flags = trigger; + + ctrl->cfg->set_hw_managed(pled, false); + + err = switch_port_register_classdev(pled, fwnode); + if (err) + return ERR_PTR(err); + + return pled; +} + +static int realtek_port_led_probe(struct platform_device *pdev) +{ + struct switch_port_led_ctrl *ctrl; + struct device *dev = &pdev->dev; + struct device_node *np, *child; + unsigned int member_map_count; + enum rtl_led_output_mode mode; + struct switch_port_led *pled; + unsigned int i_grp, i_led; + const char *mode_name; + int err; + + np = dev->of_node; + + ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); + if (!ctrl) + return -ENOMEM; + + mutex_init(&ctrl->lock); + + ctrl->dev = dev; + ctrl->cfg = device_get_match_data(dev); + ctrl->map = syscon_node_to_regmap(of_get_parent(np)); + if (IS_ERR_OR_NULL(ctrl->map)) + return dev_err_probe(dev, PTR_ERR(ctrl->map), "failed to find parent regmap\n"); + + err = fwnode_property_read_string(dev_fwnode(dev), "realtek,output-mode", &mode_name); + if (err) + return dev_err_probe(dev, err, "failed to read realtek,output-mode\n"); + + if (strcmp(mode_name, "serial") == 0) + mode = RTL_LED_OUTPUT_SERIAL; + else if (strcmp(mode_name, "single-color-scan") == 0) + mode = RTL_LED_OUTPUT_SCAN_SINGLE; + else if (strcmp(mode_name, "bi-color-scan") == 0) + mode = RTL_LED_OUTPUT_SCAN_BICOLOR; + else + return dev_err_probe(dev, -EINVAL, "realtek,output-mode invalid\n"); + + member_map_count = ctrl->cfg->port_led_count * ctrl->cfg->group_count; + ctrl->groups = devm_kcalloc(dev, member_map_count, sizeof(*ctrl->groups), GFP_KERNEL); + if (!ctrl->groups) + return -ENOMEM; + + ctrl->available_leds = devm_kcalloc(dev, ctrl->cfg->port_count, + sizeof(*ctrl->available_leds), GFP_KERNEL); + if (!ctrl->available_leds) + return -ENOMEM; + + for (i_grp = 0; i_grp < ctrl->cfg->group_count; i_grp++) { + for (i_led = 0; i_led < ctrl->cfg->port_led_count; i_led++) { + struct reg_field group_field = ctrl->cfg->group_regfield(i_grp, i_led); + struct led_port_group *group; + + group = &ctrl->groups[GROUP_LIST_INDEX(ctrl->cfg, i_grp, i_led)]; + group->index = i_grp; + group->size = ctrl->cfg->port_count; + group->setting = devm_regmap_field_alloc(dev, ctrl->map, group_field); + if (!group->setting) + return -ENOMEM; + + group->ports = devm_bitmap_zalloc(dev, ctrl->cfg->port_count, GFP_KERNEL); + if (!group->ports) + return -ENOMEM; + } + } + + err = devm_led_trigger_register(dev, &switch_port_rtl_hw_trigger); + if (err) + return dev_err_probe(dev, err, "failed to register private trigger"); + + for_each_child_of_node(np, child) { + if (of_n_addr_cells(child) != 3) { + of_node_put(child); + return dev_err_probe(dev, -EINVAL, "#address-cells (%d) is not 3\n", + (u32) of_n_addr_cells(child)); + } + + if (of_n_size_cells(child) != 0) { + of_node_put(child); + return dev_err_probe(dev, -EINVAL, "#size-cells (%d) is not 0\n", + (u32) of_n_size_cells(child)); + } + + if (!of_node_name_eq(child, "led")) { + dev_dbg(dev, "skipping unsupported node %s\n", of_node_full_name(child)); + continue; + } + + pled = switch_port_led_probe_single(ctrl, child); + if (IS_ERR(pled)) + dev_warn(dev, "failed to register led: %ld\n", PTR_ERR(pled)); + } + + return ctrl->cfg->init(ctrl, mode); +} + +static const struct of_device_id of_switch_port_led_match[] = { + { + .compatible = "realtek,maple-port-led", + .data = &rtl838x_port_led_config, + }, + { + .compatible = "realtek,cypress-port-led", + .data = &rtl839x_port_led_config, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, of_switch_port_led_match); + +static struct platform_driver realtek_switch_port_led_driver = { + .probe = realtek_port_led_probe, + .driver = { + .name = "realtek-switch-port-led", + .of_match_table = of_switch_port_led_match, + } +}; +module_platform_driver(realtek_switch_port_led_driver); + +MODULE_AUTHOR("Sander Vanheule "); +MODULE_DESCRIPTION("Realtek SoC switch port LED driver"); +MODULE_LICENSE("GPL v2"); diff --git a/target/linux/realtek/files-5.10/include/dt-bindings/leds/realtek-led-trigger.h b/target/linux/realtek/files-5.10/include/dt-bindings/leds/realtek-led-trigger.h new file mode 100644 index 000000000000..2591285f4de0 --- /dev/null +++ b/target/linux/realtek/files-5.10/include/dt-bindings/leds/realtek-led-trigger.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2022 Sander Vanheule + * + * Realtek switch port trigger flags + */ +#ifndef __DT_BINDINGS_LEDS_REALTEK_LED_TRIGGER_H +#define __DT_BINDINGS_LEDS_REALTEK_LED_TRIGGER_H + +#define RTL_LED_NONE 0 +#define RTL_LED_ACT_RX (1 << 0) +#define RTL_LED_ACT_TX (1 << 1) +#define RTL_LED_LINK_10 (1 << 2) +#define RTL_LED_LINK_100 (1 << 3) +#define RTL_LED_LINK_1000 (1 << 4) +#define RTL_LED_LINK_2500 (1 << 5) +#define RTL_LED_LINK_5000 (1 << 6) +#define RTL_LED_LINK_10000 (1 << 7) + +/* Frequently used combinations */ +#define RTL_LED_ACT (RTL_LED_ACT_RX | RTL_LED_ACT_TX) +#define RTL_LED_LINK_10_100 (RTL_LED_LINK_10 | RTL_LED_LINK_100) +#define RTL_LED_LINK_10_100_1000 (RTL_LED_LINK_10 | RTL_LED_LINK_100 | RTL_LED_LINK_1000) + +#endif /* __DT_BINDINGS_LEDS_REALTEK_LED_TRIGGER_H */ diff --git a/target/linux/realtek/rtl838x/config-5.10 b/target/linux/realtek/rtl838x/config-5.10 index 7c440c4a6e69..afed9401ab0f 100644 --- a/target/linux/realtek/rtl838x/config-5.10 +++ b/target/linux/realtek/rtl838x/config-5.10 @@ -117,6 +117,7 @@ CONFIG_IRQ_WORK=y CONFIG_JFFS2_ZLIB=y CONFIG_LEDS_GPIO=y CONFIG_LEDS_RTL=y +CONFIG_LEDS_RTL_SWITCHCORE_PORT=y CONFIG_LEDS_RTL_SWITCHCORE_SYSTEM=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 diff --git a/target/linux/realtek/rtl839x/config-5.10 b/target/linux/realtek/rtl839x/config-5.10 index a071b78a8c04..43a08c98a54d 100644 --- a/target/linux/realtek/rtl839x/config-5.10 +++ b/target/linux/realtek/rtl839x/config-5.10 @@ -110,6 +110,7 @@ CONFIG_IRQ_WORK=y CONFIG_JFFS2_ZLIB=y CONFIG_LEDS_GPIO=y CONFIG_LEDS_RTL=y +CONFIG_LEDS_RTL_SWITCHCORE_PORT=y CONFIG_LEDS_RTL_SWITCHCORE_SYSTEM=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 From patchwork Sun Oct 30 18:30:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sander Vanheule X-Patchwork-Id: 1696846 X-Patchwork-Delegate: sander@svanheule.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.openwrt.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=O+tyysYg; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=svanheule.net header.i=@svanheule.net header.a=rsa-sha256 header.s=mail1707 header.b=hbnNRdnD; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N0lN34cB2z23lV for ; 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(unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id AE2AA33BF25; Sun, 30 Oct 2022 19:31:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154677; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xdF73anHNtb/WfCv5pXZ11wCmN+2EE+BCo7YYSDVIZU=; b=hbnNRdnDQSeNEad4CCJmJFcsMGfLRaVANgXuSVavVIQAaYxw/R+bkqVytJqK+AMzqrj0wl +uf2EIiouttef1Iup5K8ZmwBRi2YfzToephEQUd3zK7C6jKbp0/kULfIosCW69JPN/ena0 Dwzny6tTvXoKsL/G7S9CQIG5IduOkGZQD7aSs5iZL3fusRXbH/pIbvBwmF/zMhp4HYXt4c JjnvnGm147FsJAxNrTLQKSgMm6XZzfJzHM4OTLYH68yqFALPVOIMmVeyy+MUBRHuBxNiKj Ic8+FnX7CjZvJVLdMSTjbdGpzsGxLafzEwP4Qi9aua/ietNTAkga8Uw6vcmgqg== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 06/13] realtek: rtl838x: replace pinctrl nodes Date: Sun, 30 Oct 2022 19:30:59 +0100 Message-Id: X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113127_667281_837BAE8D X-CRM114-Status: UNSURE ( 7.74 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Replace the current "pinctrl-single" nodes by the new "realtek,maple-pinctrl" node. This allows users to specify pin groups and features without having to dig into SoC documentation. Signed-off-by: Sander Vanheule --- target/linux/realtek/dts-5.10/rtl838x.dtsi | 43 ++++++++ 1 file changed, 16 insertions(+), 27 deletions(-) Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org Replace the current "pinctrl-single" nodes by the new "realtek,maple-pinctrl" node. This allows users to specify pin groups and features without having to dig into SoC documentation. Signed-off-by: Sander Vanheule --- target/linux/realtek/dts-5.10/rtl838x.dtsi | 43 ++++++++-------------- 1 file changed, 16 insertions(+), 27 deletions(-) diff --git a/target/linux/realtek/dts-5.10/rtl838x.dtsi b/target/linux/realtek/dts-5.10/rtl838x.dtsi index 64e13e1ff37a..a953db7c328b 100644 --- a/target/linux/realtek/dts-5.10/rtl838x.dtsi +++ b/target/linux/realtek/dts-5.10/rtl838x.dtsi @@ -226,33 +226,22 @@ }; }; - pinmux: pinmux@1b001000 { - compatible = "pinctrl-single"; - reg = <0x1b001000 0x4>; - - pinctrl-single,bit-per-mux; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0x1>; - #pinctrl-cells = <2>; - - enable_uart1: pinmux_enable_uart1 { - pinctrl-single,bits = <0x0 0x10 0x10>; - }; - }; - - /* LED_GLB_CTRL */ - pinmux_led: pinmux@1b00a000 { - compatible = "pinctrl-single"; - reg = <0x1b00a000 0x4>; - - pinctrl-single,bit-per-mux; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0x1>; - #pinctrl-cells = <2>; - - /* enable GPIO 0 */ - pinmux_disable_sys_led: disable_sys_led { - pinctrl-single,bits = <0x0 0x0 0x8000>; + switchcore: switchcore-bus@1b000000 { + compatible = "realtek,maple-switchcore", "syscon"; + reg = <0x1b000000 0x10000>; + + pinctrl { + compatible = "realtek,maple-pinctrl"; + + pinmux_disable_sys_led: pinmux-sys-led-gpio { + groups = "sys-led"; + function = "gpio"; + }; + + enable_uart1: pinmux-uart1 { + groups = "uart1"; + function = "uart1"; + }; }; }; From patchwork Sun Oct 30 18:31:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sander Vanheule X-Patchwork-Id: 1696847 X-Patchwork-Delegate: sander@svanheule.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.openwrt.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=4Kx9t4z/; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=svanheule.net header.i=@svanheule.net header.a=rsa-sha256 header.s=mail1707 header.b=E55wTXaW; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N0lNH1mCGz23kv for ; Mon, 31 Oct 2022 05:35:59 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/Mg3uyLJXeSQrrG1eZpGcBrjITesBrF0nctxq+yPNgY=; b=4Kx9t4z/wQc87h 3SL0JN4w15ie4Oww3OKZtCDuujE9vic0C68aAMVN1ebnYzUettzlEOX1qkgX9WBarm03FoN7FQtlq DEsz+SnyZTs7deh6R5Al2EbfqnrgKS2JtNNx0cIgOwTNU/IGzZFik23eenv0ntDxPWE8KGHvHctXr tQxNqmQ2A7Bt/SfFWDb8+slUyGr5pAJ6mVpI6jhX2RCTFi8DD1MDYlq3dtAj8+VQHSxlfxRDJ2Wny ViKtGmRHr6qECCCCXXo0085nkTKCyGzuoEMWFieQAKcudkrpKNF3slf4CoSIMK2FJJtl4+dVk6wML qyFBCaSy183VQqesnVOA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1opD7B-001nh1-Df; Sun, 30 Oct 2022 18:32:57 +0000 Received: from polaris.svanheule.net ([84.16.241.116]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1opD5k-001n8b-Sp for openwrt-devel@lists.openwrt.org; Sun, 30 Oct 2022 18:31:30 +0000 Received: from terra.. (unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id 3633333BF26; Sun, 30 Oct 2022 19:31:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154677; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HvO+jvQweew3gdDPpcAlujP/65Hn82gqNxMk0TFIrbQ=; b=E55wTXaWG2WUjzFLB5wdmqx4fTtxXW4e7clwaTbR55W63ZVEf/b/Tczi9tQdv0H72Vv9aU x6Mbokbn+gy0lCBjhT9hn+ClwyXU34NHrAFIyg+GDXgdEqzHTkyQdl10uEOz5l/tbz6Gny z+sxtG0d5SdX2tZB8e1EC4nA5z76YhNeEuAlsRkeNHbL4OuslSzfPNcSDZX1hjMTOPkIIW qsOwdmg2WGKIyOrxhdn1/0RMNuO5pmtQlPZmk/udcg1qIjbcJ00WNIRZkCtNmFLggXfOna QYhPWeW+Pyv+mcrWvqQqMXwrjVQi9nMOeuXFwo5QrVskADRTqGWaeEyrTvmGBQ== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 07/13] realtek: rtl838x: add sys-led node Date: Sun, 30 Oct 2022 19:31:00 +0100 Message-Id: X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113129_096918_4ED323DA X-CRM114-Status: UNSURE ( 8.52 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: All devices that can use the system LED peripheral to control an actual LED currently use this as a GPIO-controlled LED. A GPIO LED provides more fine-grained control of blink rates, at the cost of so [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org All devices that can use the system LED peripheral to control an actual LED currently use this as a GPIO-controlled LED. A GPIO LED provides more fine-grained control of blink rates, at the cost of some CPU cycles. Users may anyhow prefer to use the sys-led peripheral, so add the sys-led node as "disabled" Signed-off-by: Sander Vanheule --- target/linux/realtek/dts-5.10/rtl838x.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/linux/realtek/dts-5.10/rtl838x.dtsi b/target/linux/realtek/dts-5.10/rtl838x.dtsi index a953db7c328b..f1c5ae6a3f22 100644 --- a/target/linux/realtek/dts-5.10/rtl838x.dtsi +++ b/target/linux/realtek/dts-5.10/rtl838x.dtsi @@ -230,6 +230,11 @@ compatible = "realtek,maple-switchcore", "syscon"; reg = <0x1b000000 0x10000>; + hw_sys_led: sys-led { + compatible = "realtek,maple-sys-led"; + status = "disabled"; + }; + pinctrl { compatible = "realtek,maple-pinctrl"; From patchwork Sun Oct 30 18:31:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sander Vanheule X-Patchwork-Id: 1696848 X-Patchwork-Delegate: sander@svanheule.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.openwrt.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=0QuSkJi2; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=svanheule.net header.i=@svanheule.net header.a=rsa-sha256 header.s=mail1707 header.b=v6B6k7e3; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N0lNZ68rKz23kv for ; Mon, 31 Oct 2022 05:36:14 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=JlRbHOz+RbRBLBblcxiiSispWEFCV+9G7t/rQYTeEeY=; b=0QuSkJi2DQ9EsQ v+Jstv/Q53qA3W465nHQWzxbijkz14j78X6YJbQSb1J/AvZ8/pe5oPgaiGIwFzL2npL18NnLJKGHT Vx4AuguhT47HS5rMiU0FhrpiqCd9w0Si49HDIXSk0H0vhgygNhjRKOEZoOeJJN4ZKVOsbcconnE90 aAE15ZHCHV3BWiuQrfKChKvrAqamesVtMtVD0A4GYNwUumoTV5kQ4K8vo62WbNiRl3YWhObcK3fsz Qlghx5UrBp1+AkXEVFD/HLfMkNXsvHcFzvnU+W+rayfVjIfZ5kSWBh6G33uD/LRRTCDjYkbo5NGlq WI9REPfKmDQNIVm/Fthw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1opD7h-001nwM-9G; Sun, 30 Oct 2022 18:33:30 +0000 Received: from polaris.svanheule.net ([84.16.241.116]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1opD5l-001n8h-4m for openwrt-devel@lists.openwrt.org; Sun, 30 Oct 2022 18:31:30 +0000 Received: from terra.. (unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id BF6AD33BF27; Sun, 30 Oct 2022 19:31:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154678; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ocR3dYwHnuv7nWfoOzoQYJ1X7qRaTL4pgY4kjaKtuek=; b=v6B6k7e31rPRiKrYfr7xTWzhJoZJvxn+RDqNjtF/PYlriwMAV6WClUscbJxjfIHYyuRKUZ /O+UKqnnHNW8Ve4rlAzI9Ie4YBIq6fyMxmvtNrp7/t1zXZR7j4iMnjrWKKa957Ye0S9CDB VMeSjhC+tjyp3LLd8+m7n0SE5PILioMg0GQMDtLCbGlXkRjHGUSXaedZmM+U9n2cbtD9j7 ySb3s8Z9qm2OhQCUYBg9CQHTZ9RxJP7bK2YHwK5CzNnYCeO2jvsw9Uy6EKOg039wlCXN7P +yWTebQyW3P4X/njgFJgpUUZQJ8+S6P4s51w/EJsyr5rj8Upww43OQzN23gqLw== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 08/13] realtek: Zyxel GS1900-8: define port LEDs Date: Sun, 30 Oct 2022 19:31:01 +0100 Message-Id: <8aabcbe7f0074c6157ab3bada5cda2dbfaa73cd9.1667154408.git.sander@svanheule.net> X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113129_353656_021F2709 X-CRM114-Status: UNSURE ( 7.78 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: The GS1900-8 has one green status LED per port. To reproduce the same behaviour as stock firmware, the LEDs need to light up on all supported link speeds, and blink on link activity. Signed-off-by: Sander Vanheule --- Changes in v3: - Add LED triggers --- .../dts-5.10/rtl8380_zyxel_gs1900-8.dts | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org The GS1900-8 has one green status LED per port. To reproduce the same behaviour as stock firmware, the LEDs need to light up on all supported link speeds, and blink on link activity. Signed-off-by: Sander Vanheule --- Changes in v3: - Add LED triggers --- .../dts-5.10/rtl8380_zyxel_gs1900-8.dts | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-8.dts b/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-8.dts index e9c5efe60392..6de1a2442edc 100644 --- a/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-8.dts +++ b/target/linux/realtek/dts-5.10/rtl8380_zyxel_gs1900-8.dts @@ -1,5 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-or-later +#include +#include + #include "rtl8380_zyxel_gs1900.dtsi" / { @@ -10,3 +13,86 @@ &gpio1 { /delete-node/ poe_enable; }; + +&switchcore { + port-leds { + compatible = "realtek,maple-port-led"; + #address-cells = <3>; + #size-cells = <0>; + + realtek,output-mode = "serial"; + + led@8.0.0 { + reg = <8 0 0>; + label = "green:lan-1"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@9.0.0 { + reg = <9 0 0>; + label = "green:lan-2"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@10.0.0 { + reg = <10 0 0>; + label = "green:lan-3"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <3>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@11.0.0 { + reg = <11 0 0>; + label = "green:lan-4"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <4>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@12.0.0 { + reg = <12 0 0>; + label = "green:lan-5"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <5>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@13.0.0 { + reg = <13 0 0>; + label = "green:lan-6"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <6>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@14.0.0 { + reg = <14 0 0>; + label = "green:lan-7"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <7>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@15.0.0 { + reg = <15 0 0>; + label = "green:lan-8"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <8>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + }; +}; From patchwork Sun Oct 30 18:31:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sander Vanheule X-Patchwork-Id: 1696851 X-Patchwork-Delegate: sander@svanheule.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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(unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id 39B7833BF28; Sun, 30 Oct 2022 19:31:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154678; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DovAa3WZ5COxad/50pQiDsNQ1yMUzTn+mN1na7Ys040=; b=pEjcowbCoXkC99tXNkpA7Udt++880v8ObqlQfDqEpd6/Fxup+g6cWsgKNE9iVP/MiXPnnh VmyMvy9tRPFBeaRpEUKNeo0U0IYFn23pSL0eKGWimXcPvF6tduMOk9tX4YSMfdoW5/RsnQ i8Z55NUHjlZZn+a0OsGufcWFgoJOmwvkml2JR3Tyns99ePdwQlfEZcTkTC47c1BBy0ZfnP yWffk5NhqYmsXu4SS3gCa77S4UVepDrz6Wo246OKcjPEPNjGr/4Sp/JmUmMDLc6VQleMTo shajQ0TWYnuSUzQd8pWkurbMZNwhq0wETHItE4PKbr2eirZf16KAFDLXtaZTFg== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 09/13] realtek: Netgear GS110TPPv1: define port LEDs Date: Sun, 30 Oct 2022 19:31:02 +0100 Message-Id: <39a1c9e5db81116b69662e8b13d7abe43101ea32.1667154408.git.sander@svanheule.net> X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113130_157280_9A010638 X-CRM114-Status: UNSURE ( 7.86 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.5 (--) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: The GS110TPPv1 has a green and amber bi-color status LED per port. To reproduce the same behaviour as stock firmware, the green LEDs need to light up on gigabit link speeds, and the amber LEDs on 100M [...] Content analysis details: (-2.5 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [2a00:c98:2060:a004:1:0:0:200 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org The GS110TPPv1 has a green and amber bi-color status LED per port. To reproduce the same behaviour as stock firmware, the green LEDs need to light up on gigabit link speeds, and the amber LEDs on 100M/10M link speeds. For all link speeds, the LEDs should blink on link activity. Signed-off-by: Sander Vanheule --- .../dts-5.10/rtl8380_netgear_gs110tpp-v1.dts | 192 ++++++++++++++++++ 1 file changed, 192 insertions(+) diff --git a/target/linux/realtek/dts-5.10/rtl8380_netgear_gs110tpp-v1.dts b/target/linux/realtek/dts-5.10/rtl8380_netgear_gs110tpp-v1.dts index b61af62ea536..d9ce5d317213 100644 --- a/target/linux/realtek/dts-5.10/rtl8380_netgear_gs110tpp-v1.dts +++ b/target/linux/realtek/dts-5.10/rtl8380_netgear_gs110tpp-v1.dts @@ -2,6 +2,7 @@ #include "rtl8380_netgear_gigabit_1xx.dtsi" #include +#include / { compatible = "netgear,gs110tpp-v1", "realtek,rtl838x-soc"; @@ -55,3 +56,194 @@ SWITCH_PORT(17, 10, qsgmii) }; }; + +&switchcore { + port-leds { + compatible = "realtek,maple-port-led"; + #address-cells = <3>; + #size-cells = <0>; + + realtek,output-mode = "serial"; + + led@8.0.0 { + reg = <8 0 0>; + label = "green:lan-1"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_1000)>; + }; + led@8.1.0 { + reg = <8 1 0>; + label = "amber:lan-1"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100)>; + }; + led@9.0.0 { + reg = <9 0 0>; + label = "green:lan-2"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_1000)>; + }; + led@9.1.0 { + reg = <9 1 0>; + label = "amber:lan-2"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100)>; + }; + led@10.0.0 { + reg = <10 0 0>; + label = "green:lan-3"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <3>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_1000)>; + }; + led@10.1.0 { + reg = <10 1 0>; + label = "amber:lan-3"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <3>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100)>; + }; + led@11.0.0 { + reg = <11 0 0>; + label = "green:lan-4"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <4>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_1000)>; + }; + led@11.1.0 { + reg = <11 1 0>; + label = "amber:lan-4"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <4>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100)>; + }; + led@12.0.0 { + reg = <12 0 0>; + label = "green:lan-5"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <5>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_1000)>; + }; + led@12.1.0 { + reg = <12 1 0>; + label = "amber:lan-5"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <5>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100)>; + }; + led@13.0.0 { + reg = <13 0 0>; + label = "green:lan-6"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <6>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_1000)>; + }; + led@13.1.0 { + reg = <13 1 0>; + label = "amber:lan-6"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <6>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100)>; + }; + led@14.0.0 { + reg = <14 0 0>; + label = "green:lan-7"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <7>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_1000)>; + }; + led@14.1.0 { + reg = <14 1 0>; + label = "amber:lan-7"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <7>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100)>; + }; + led@15.0.0 { + reg = <15 0 0>; + label = "green:lan-8"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <8>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_1000)>; + }; + led@15.1.0 { + reg = <15 1 0>; + label = "amber:lan-8"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <8>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100)>; + }; + led@16.0.0 { + reg = <16 0 0>; + label = "green:lan-9"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <9>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_1000)>; + }; + led@16.1.0 { + reg = <16 1 0>; + label = "amber:lan-9"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <9>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100)>; + }; + led@17.0.0 { + reg = <17 0 0>; + label = "green:lan-10"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <10>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_1000)>; + }; + led@17.1.0 { + reg = <17 1 0>; + label = "amber:lan-10"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <10>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100)>; + }; + }; +}; From patchwork Sun Oct 30 18:31:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sander Vanheule X-Patchwork-Id: 1696850 X-Patchwork-Delegate: sander@svanheule.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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(unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id C021C33BF29; Sun, 30 Oct 2022 19:31:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154679; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cz8yu0p2IsXF703E3xjZqN4ODpo4Ac8oNVKuZKcCQpM=; b=ueaDBglWDrrBsZ2Tlu7t9BCBKj+/x8YNc1v9zUtB4cyYXAlG6YJzd55ktmUDbIkomqgs1H 0syO5SzMnNS2Dvk2Bx1aclhyssBJdyoRQgl0ewR9zf6HLCuet6Cfyh3UQ2Pxl5nrox2+dH sQbtsEuPHGv79vKa78G+VWhpSNcJ7aD5Y6gA1Udeg+m6mR2Li2XikkDKbREuJ7qLCCBo38 WYenrWOwoC7lW8+F+qA98wYdv3ppkvtjNJLm8DroRBvu03ljVmZy688FFS5wXPBgtezSED ZhMIBusDzxWl+Idzqak775lVVjFEZPWKKREfOe39rNcraZuwhfXJEWSyUlbF5g== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 10/13] realtek: rtl839x: replace pinctrl nodes Date: Sun, 30 Oct 2022 19:31:03 +0100 Message-Id: X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113130_448590_AEE20525 X-CRM114-Status: UNSURE ( 7.78 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Replace the current "pinctrl-single" nodes by the new "realtek,cypress-pinctrl" node. This allows users to specify pin groups and features without having to dig into SoC documentation. Signed-off-by: Sander Vanheule --- target/linux/realtek/dts-5.10/rtl839x.dtsi | 52 +++++++++ 1 file changed, 21 insertions(+), 31 deletions(-) Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org Replace the current "pinctrl-single" nodes by the new "realtek,cypress-pinctrl" node. This allows users to specify pin groups and features without having to dig into SoC documentation. Signed-off-by: Sander Vanheule --- target/linux/realtek/dts-5.10/rtl839x.dtsi | 52 +++++++++------------- 1 file changed, 21 insertions(+), 31 deletions(-) diff --git a/target/linux/realtek/dts-5.10/rtl839x.dtsi b/target/linux/realtek/dts-5.10/rtl839x.dtsi index 91d6e17a9ea1..98c4b2010c5f 100644 --- a/target/linux/realtek/dts-5.10/rtl839x.dtsi +++ b/target/linux/realtek/dts-5.10/rtl839x.dtsi @@ -252,37 +252,27 @@ }; - pinmux@1b000004 { - compatible = "pinctrl-single"; - reg = <0x1b000004 0x4>; - - pinctrl-single,bit-per-mux; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0x1>; - #pinctrl-cells = <2>; - - enable_uart1: pinmux_enable_uart1 { - pinctrl-single,bits = <0x0 0x1 0x3>; - }; - - disable_jtag: pinmux_disable_jtag { - pinctrl-single,bits = <0x0 0x2 0x3>; - }; - }; - - /* LED_GLB_CTRL */ - pinmux@1b0000e4 { - compatible = "pinctrl-single"; - reg = <0x1b0000e4 0x4>; - - pinctrl-single,bit-per-mux; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0x1>; - #pinctrl-cells = <2>; - - /* enable GPIO 0 */ - pinmux_disable_sys_led: disable_sys_led { - pinctrl-single,bits = <0x0 0x0 0x4000>; + switchcore: switchcore-bus@1b000000 { + compatible = "realtek,cypress-switchcore", "syscon"; + reg = <0x1b000000 0x10000>; + + pinctrl: pinctrl { + compatible = "realtek,cypress-pinctrl"; + + enable_uart1: pinmux-jtag-uart1 { + groups = "jtag"; + function = "uart1"; + }; + + disable_jtag: pinmux-jtag-gpio { + groups = "jtag"; + function = "gpio"; + }; + + pinmux_disable_sys_led: pinmux-sysled-gpio { + groups = "sys-led"; + function = "gpio"; + }; }; }; From patchwork Sun Oct 30 18:31:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sander Vanheule X-Patchwork-Id: 1696852 X-Patchwork-Delegate: sander@svanheule.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.openwrt.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=FeNlZvUW; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=svanheule.net header.i=@svanheule.net header.a=rsa-sha256 header.s=mail1707 header.b=TEtQ3iO6; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N0lW42SGnz1ygr for ; Mon, 31 Oct 2022 05:41:52 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=BgQOzRq1WlJ/r73SqYDSTG/c24ka2NuHDrTRB6DTVgE=; b=FeNlZvUWTvAsS0 WY2NupH5eSRu+62+N6OkzS21kW95IVRWhOAAvBgC8TqK/kX5cDplOcNHSDCn09zkCthOHnrYF1JsF ht6QiJTKNYvF7YrswYBcWKnHMqnIDaA/evGLKdA31aGsnNESDGzpzlkvMPPzmHYGAdMe+8Iw/8Dyv GqTGwcKgG1gxAvTbmlS1ukjlR8NKUdcy4R46KElVDiYMUV9dlfTvj/AAZonPQgMmaNabd2sp5EDGc +zH23UbqaGGrqoYqQsxvNSPiFGRYUX2KW76wItXj3hKzOfsGTg6vj9JuapUk0hcNzapvNVSXnZv3q vJ3N4cKSrXYnyaXYqfyA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1opDDH-001qcD-JW; Sun, 30 Oct 2022 18:39:17 +0000 Received: from polaris.svanheule.net ([2a00:c98:2060:a004:1::200]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1opD5n-001nAj-HQ for openwrt-devel@lists.openwrt.org; Sun, 30 Oct 2022 18:31:33 +0000 Received: from terra.. (unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id 487C133BF2A; Sun, 30 Oct 2022 19:31:19 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154679; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UVot6zkIm8UFKxQT94fWJCQA9LXSikgY8tLOxvMqcJE=; b=TEtQ3iO6WByCO1iXcjbjbwbuWrQu3ykCeqPLiFsLkTy4zRM3M8OT7Et5+BsOnS61GtV/3P n+udQjiPPNll9Aw3E/IMuwmhX0BEEj+s9SQoN3h4YP08yjgRoyjOaLXRCaHEqtzg4+2ugi 9NSYjpFRRUsG8fHkwefd97G3o7Lf3z9GaAiEGYDUVy1NTw64qVJKSt0WI0of2ZTT8fa2+d UljVn4ua8PksVX8WYVRbjQrNtnMVUPK8q6xFSAi0t85NlzOLahhdk1b8bbHlC/j8TeDqK3 5kfsmLcMwC5kcWNEfKBhGD570TzVuCYuqhMXEa1GRG+wsV6hna7Phmh50UCRoQ== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 11/13] realtek: rtl839x: add sys-led node Date: Sun, 30 Oct 2022 19:31:04 +0100 Message-Id: X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113131_754380_0F396887 X-CRM114-Status: UNSURE ( 8.41 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.5 (--) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: All devices that can use the system LED peripheral to control an actual LED currently use this as a GPIO-controlled LED. A GPIO LED provides more fine-grained control of blink rates, at the cost of so [...] Content analysis details: (-2.5 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [2a00:c98:2060:a004:1:0:0:200 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org All devices that can use the system LED peripheral to control an actual LED currently use this as a GPIO-controlled LED. A GPIO LED provides more fine-grained control of blink rates, at the cost of some CPU cycles. Users may anyhow prefer to use the sys-led peripheral, so add the sys-led node as "disabled". Signed-off-by: Sander Vanheule --- target/linux/realtek/dts-5.10/rtl839x.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/linux/realtek/dts-5.10/rtl839x.dtsi b/target/linux/realtek/dts-5.10/rtl839x.dtsi index 98c4b2010c5f..095dc1e8ac53 100644 --- a/target/linux/realtek/dts-5.10/rtl839x.dtsi +++ b/target/linux/realtek/dts-5.10/rtl839x.dtsi @@ -256,6 +256,11 @@ compatible = "realtek,cypress-switchcore", "syscon"; reg = <0x1b000000 0x10000>; + hw_sys_led: sys-led { + compatible = "realtek,cypress-sys-led"; + status = "disabled"; + }; + pinctrl: pinctrl { compatible = "realtek,cypress-pinctrl"; From patchwork Sun Oct 30 18:31:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sander Vanheule X-Patchwork-Id: 1696854 X-Patchwork-Delegate: sander@svanheule.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.openwrt.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=MZiWk7P3; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=svanheule.net header.i=@svanheule.net header.a=rsa-sha256 header.s=mail1707 header.b=f4BSQzG7; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N0lbs0kDhz20S2 for ; Mon, 31 Oct 2022 05:45:59 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=FpIgBqpndrg7WsuNQHTOXDjR9bev+B4IxPzrMsg0+HY=; b=MZiWk7P3NLEv0f 5D4MRgZu0iGv2cd9bU/HL+beH4JN6KR8dEZNr1goADgBGYElBL9h4GVZ/KIXcB5VFyNMToB8tEEs3 xrFS3NLqJCDu9ItXAO/ovNsusMPeUKh44gjH1XNXqyh5p6FWT7D7LJNOSTtcsNG3BbOMDlCanXo9D eONOWy1qyupbA0tyW/LrhaMd67Drrr2Ol5WsPq0zdFjbB4vFBag/zXHGLwgyMndqfwSJBdQvzri4e 3sok9jarTm3pQVsgsP6YZ/fOzD+mZt6BmLLlyPo81TnYpbXroF/t7s4zVdTLSqDu6wQxhOmGYLa3C 3g1AZ4eOwiPYKOuJXi3w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1opDH3-001sIY-Dq; Sun, 30 Oct 2022 18:43:10 +0000 Received: from polaris.svanheule.net ([84.16.241.116]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1opD5o-001nAs-4a for openwrt-devel@lists.openwrt.org; Sun, 30 Oct 2022 18:31:34 +0000 Received: from terra.. (unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id C7ACC33BF2B; Sun, 30 Oct 2022 19:31:19 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154680; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jT4DISYjmPrqYZ81ZrAZxE7K4X2QKlJGmzqfVV95JO4=; b=f4BSQzG7UBX3avYGftQAv59MifiavojHYQLSTEcFOMZSaPQX9aTSH5hmd3ayylPsuDUEtF yTELefLL3X8vnPIQwqjy4u7oXOz4k3CPKAGcPUgx5jgtMRp2OiQa0wGQr4r09sJW0pToQ8 rk9wnJIG/6B057ARD6x223yx3a9FW4tbeO5X2zPBG4ZowYQJ4U/Z+f5No7fXSKTmi8WD1y zyFdHG6EOW/OWwPAOJ04g/bpp07Xnq5GLttpTQnI39pMBxCT06sLMnTyRanPeRUwTOCK2e 1+InBqk8Cwa/IRhOM0JihP+IpDyAqkHB0qapViNYCAYdPHAPNl6OsnfovfijTg== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 12/13] realtek: Zyxel GS1900-48: define port LEDs Date: Sun, 30 Oct 2022 19:31:05 +0100 Message-Id: <432b2f503f563bd40f4681f26335ea7a0d06d807.1667154408.git.sander@svanheule.net> X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113132_506156_F0785FCD X-CRM114-Status: UNSURE ( 7.59 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: The GS1900-48 has 48 RJ45 ports, and two dedicated SFP ports, each having one associated green LED to indicate port status. Add 50 nodes to allow individual control of each LED. Signed-off-by: Sander Vanheule --- Changes in v3: - Add triggers matching device label --- .../dts-5.10/rtl8393_zyxel_gs1900-48.dts | 463 ++++++++++++++++++ 1 file changed, 463 [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org The GS1900-48 has 48 RJ45 ports, and two dedicated SFP ports, each having one associated green LED to indicate port status. Add 50 nodes to allow individual control of each LED. Signed-off-by: Sander Vanheule --- Changes in v3: - Add triggers matching device label --- .../dts-5.10/rtl8393_zyxel_gs1900-48.dts | 463 ++++++++++++++++++ 1 file changed, 463 insertions(+) diff --git a/target/linux/realtek/dts-5.10/rtl8393_zyxel_gs1900-48.dts b/target/linux/realtek/dts-5.10/rtl8393_zyxel_gs1900-48.dts index dd392c5a9beb..2df69db74849 100644 --- a/target/linux/realtek/dts-5.10/rtl8393_zyxel_gs1900-48.dts +++ b/target/linux/realtek/dts-5.10/rtl8393_zyxel_gs1900-48.dts @@ -3,6 +3,8 @@ #include "rtl839x.dtsi" #include +#include +#include #include / { @@ -318,3 +320,464 @@ }; }; }; + +&switchcore { + port-leds { + compatible = "realtek,cypress-port-led"; + #address-cells = <3>; + #size-cells = <0>; + + realtek,output-mode = "single-color-scan"; + + led@0.0.0 { + reg = <0 0 0>; + label = "green:lan-1"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@1.0.0 { + reg = <1 0 0>; + label = "green:lan-2"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@2.0.0 { + reg = <2 0 0>; + label = "green:lan-3"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <3>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@3.0.0 { + reg = <3 0 0>; + label = "green:lan-4"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <4>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@4.0.0 { + reg = <4 0 0>; + label = "green:lan-5"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <5>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@5.0.0 { + reg = <5 0 0>; + label = "green:lan-6"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <6>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@6.0.0 { + reg = <6 0 0>; + label = "green:lan-7"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <7>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@7.0.0 { + reg = <7 0 0>; + label = "green:lan-8"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <8>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@8.0.0 { + reg = <8 0 0>; + label = "green:lan-9"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <9>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@9.0.0 { + reg = <9 0 0>; + label = "green:lan-10"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <10>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@10.0.0 { + reg = <10 0 0>; + label = "green:lan-11"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <11>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@11.0.0 { + reg = <11 0 0>; + label = "green:lan-12"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <12>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@12.0.0 { + reg = <12 0 0>; + label = "green:lan-13"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <13>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@13.0.0 { + reg = <13 0 0>; + label = "green:lan-14"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <14>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@14.0.0 { + reg = <14 0 0>; + label = "green:lan-15"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <15>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@15.0.0 { + reg = <15 0 0>; + label = "green:lan-16"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <16>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@16.0.0 { + reg = <16 0 0>; + label = "green:lan-17"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <17>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@17.0.0 { + reg = <17 0 0>; + label = "green:lan-18"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <18>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@18.0.0 { + reg = <18 0 0>; + label = "green:lan-19"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <19>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@19.0.0 { + reg = <19 0 0>; + label = "green:lan-20"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <20>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@20.0.0 { + reg = <20 0 0>; + label = "green:lan-21"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <21>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@21.0.0 { + reg = <21 0 0>; + label = "green:lan-22"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <22>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@22.0.0 { + reg = <22 0 0>; + label = "green:lan-23"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <23>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@23.0.0 { + reg = <23 0 0>; + label = "green:lan-24"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <24>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@24.0.0 { + reg = <24 0 0>; + label = "green:lan-25"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <25>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@25.0.0 { + reg = <25 0 0>; + label = "green:lan-26"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <26>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@26.0.0 { + reg = <26 0 0>; + label = "green:lan-27"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <27>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@27.0.0 { + reg = <27 0 0>; + label = "green:lan-28"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <28>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@28.0.0 { + reg = <28 0 0>; + label = "green:lan-29"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <29>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@29.0.0 { + reg = <29 0 0>; + label = "green:lan-30"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <30>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@30.0.0 { + reg = <30 0 0>; + label = "green:lan-31"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <31>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@31.0.0 { + reg = <31 0 0>; + label = "green:lan-32"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <32>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@32.0.0 { + reg = <32 0 0>; + label = "green:lan-33"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <33>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@33.0.0 { + reg = <33 0 0>; + label = "green:lan-34"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <34>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@34.0.0 { + reg = <34 0 0>; + label = "green:lan-35"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <35>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@35.0.0 { + reg = <35 0 0>; + label = "green:lan-36"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <36>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@36.0.0 { + reg = <36 0 0>; + label = "green:lan-37"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <37>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@37.0.0 { + reg = <37 0 0>; + label = "green:lan-38"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <38>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@38.0.0 { + reg = <38 0 0>; + label = "green:lan-39"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <39>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@39.0.0 { + reg = <39 0 0>; + label = "green:lan-40"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <40>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@40.0.0 { + reg = <40 0 0>; + label = "green:lan-41"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <41>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@41.0.0 { + reg = <41 0 0>; + label = "green:lan-42"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <42>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@42.0.0 { + reg = <42 0 0>; + label = "green:lan-43"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <43>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@43.0.0 { + reg = <43 0 0>; + label = "green:lan-44"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <44>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@44.0.0 { + reg = <44 0 0>; + label = "green:lan-45"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <45>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@45.0.0 { + reg = <45 0 0>; + label = "green:lan-46"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <46>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@46.0.0 { + reg = <46 0 0>; + label = "green:lan-47"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <47>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@47.0.0 { + reg = <47 0 0>; + label = "green:lan-48"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <48>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@48.0.0 { + reg = <48 0 0>; + label = "green:lan-49"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <49>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + led@49.0.0 { + reg = <49 0 0>; + label = "green:lan-50"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <50>; + linux,default-trigger = "realtek-switchport"; + realtek,port-led-trigger = <(RTL_LED_ACT | RTL_LED_LINK_10_100_1000)>; + }; + }; +}; From patchwork Sun Oct 30 18:31:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sander Vanheule X-Patchwork-Id: 1696853 X-Patchwork-Delegate: sander@svanheule.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.openwrt.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=SARYiPsZ; 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(unknown [IPv6:2a02:a03f:eaf9:8401:aa9f:5d01:1b2a:e3cd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sander@svanheule.net) by polaris.svanheule.net (Postfix) with ESMTPSA id 579E833BF2C; Sun, 30 Oct 2022 19:31:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svanheule.net; s=mail1707; t=1667154680; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mOTJ3W3xHqXHM4EgK1PBFH/LmeHxjRbOU2eIEipZ0Yw=; b=S2/HzQSutbqKZr30nGaMoWG/otWOOJGiou3R2zO8O63UcrgEVBTxMooJTQ9pgMTpaNX4DJ OEuJU/8xE1z1oxN7fYhim7zIIZxg4oCmfcmMV9rI/bzlNRG5YBFm7X+aXIUP3rE7q3tJIj iAn1+on4uebtJ8+CP+TN+oej4zvcrhzWvaJIIM1jfsdOEbakUY/hI1vBxeZeXTMN0k5Snt /tzjY2j5pNMi110qayOfK20LaX4HPDDLBrWkxSQ4EHQOW3gA67SOe5/H+xuZIPWjze0NE8 vFSYxDGwtIKPEPIz2J0PO0kv5pglxQSCgLjQ3U/xZrBuzYTFW/fYdWqZpq19yw== From: Sander Vanheule To: openwrt-devel@lists.openwrt.org, Olliver Schinagl , Alexandru Gagniuc Cc: INAGAKI Hiroshi , Markus Stockhausen , Stijn Segers , Sander Vanheule Subject: [PATCH v3 13/13] realtek: add target TODO.md Date: Sun, 30 Oct 2022 19:31:06 +0100 Message-Id: X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221030_113132_573168_5EE9A51A X-CRM114-Status: GOOD ( 13.03 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: To keep track of current work items, add a TODO file inspired by upstream code that is still in driver/staging. This should provide room for developers to leave issues open, or features unsupported, a [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org To keep track of current work items, add a TODO file inspired by upstream code that is still in driver/staging. This should provide room for developers to leave issues open, or features unsupported, and give new contributors a list of topics that still require attention. Signed-off-by: Sander Vanheule --- target/linux/realtek/TODO.md | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 target/linux/realtek/TODO.md diff --git a/target/linux/realtek/TODO.md b/target/linux/realtek/TODO.md new file mode 100644 index 000000000000..6d1922f4e753 --- /dev/null +++ b/target/linux/realtek/TODO.md @@ -0,0 +1,22 @@ +# Realtek switch support to do list + +This file intends to keep track of known issues and shortcomings with current +downstream OpenWrt driver. These drivers are of insufficient quality, or the +knowledge of the hardware they control has too many gaps, to allow for these +drivers to be submitted upstream. + +The action items are sorted per driver/peripheral, roughly ordered by +importance. Every driver should have a listed developer or contact, usually the +original driver author. + + +## Switch core support + +### Switch port LED driver +Sander Vanheule + +* Changing the HW offloading state will affect both the primary and secondary + LEDs of a port. This is currently not propagated, leaving the sibbling LED + with an incorrect trigger value. +* Reading the LED brightness will always return the user-controlled brightness + setting. When HW offloading is active, this value may be incorrect.