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Wed, 12 Oct 2022 06:48:23 +0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 29C6mLCk27328768 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 12 Oct 2022 06:48:21 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8A84D4C040; Wed, 12 Oct 2022 06:48:21 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BF6C94C046; Wed, 12 Oct 2022 06:48:20 +0000 (GMT) Received: from pike.rch.stglabs.ibm.com (unknown [9.5.12.127]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 12 Oct 2022 06:48:20 +0000 (GMT) To: gcc-patches@gcc.gnu.org Subject: [PATCH V4] rs6000: cannot_force_const_mem for HIGH code rtx[PR106460] Date: Wed, 12 Oct 2022 14:48:20 +0800 Message-Id: <20221012064820.151529-1-guojiufu@linux.ibm.com> X-Mailer: git-send-email 2.17.1 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: nkLgUXVSWy-VARgnbWQdsYANZedwc9u0 X-Proofpoint-ORIG-GUID: 4v-n4vJhym9HDnlucdWKdwNmPAXAYS__ X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-12_03,2022-10-11_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 phishscore=0 malwarescore=0 adultscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 impostorscore=0 suspectscore=0 priorityscore=1501 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210120042 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jiufu Guo via Gcc-patches From: Jiufu Guo Reply-To: Jiufu Guo Cc: dje.gcc@gmail.com, segher@kernel.crashing.org, linkw@gcc.gnu.org Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi, As the issue in PR106460, a rtx 'high:DI (symbol_ref:DI ("var_48")' is tried to store into constant pool and ICE occur. But actually, this rtx represents partial incomplete address and can not be put into a .rodata section. This patch updates rs6000_cannot_force_const_mem to return true for rtx(s) with HIGH code, because these rtx(s) indicate part of address and are not ok for constant pool. Below are some examples: (high:DI (const:DI (plus:DI (symbol_ref:DI ("xx") (const_int 12 [0xc]))))) (high:DI (symbol_ref:DI ("var_1")..))) This patch updated the patchV3 according previous comments. https://gcc.gnu.org/pipermail/gcc-patches/2022-September/602308.html Bootstrap and regtest pass on ppc64 and ppc64le. Is this ok for trunk. BR, Jeff(Jiufu) PR target/106460 gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_cannot_force_const_mem): Return true for HIGH code rtx. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr106460.c: New test. --- gcc/config/rs6000/rs6000.cc | 7 +++++-- gcc/testsuite/gcc.target/powerpc/pr106460.c | 12 ++++++++++++ 2 files changed, 17 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr106460.c diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 5f347e9574f..dab66f9213a 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -9759,8 +9759,11 @@ rs6000_init_stack_protect_guard (void) static bool rs6000_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { - if (GET_CODE (x) == HIGH - && GET_CODE (XEXP (x, 0)) == UNSPEC) + /* If GET_CODE (x) is HIGH, the 'X' represets the high part of a symbol_ref. + It can not be put into a constant pool. e.g. + (high:DI (unspec:DI [(symbol_ref/u:DI ("*.LC0")..) + (high:DI (symbol_ref:DI ("var")..)). */ + if (GET_CODE (x) == HIGH) return true; /* A TLS symbol in the TOC cannot contain a sum. */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr106460.c b/gcc/testsuite/gcc.target/powerpc/pr106460.c new file mode 100644 index 00000000000..aae4b015bba --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr106460.c @@ -0,0 +1,12 @@ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-O1 -mdejagnu-cpu=power10" } */ + +/* (high:DI (symbol_ref:DI ("var_48")..))) should not cause ICE. */ +extern short var_48; +void +foo (double *r) +{ + if (var_48) + *r = 1234.5678; +} +