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Mon, 12 Sep 2022 15:38:46 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 40D5110002A; Mon, 12 Sep 2022 15:38:45 +0200 (CEST) Received: from Webmail-eu.st.com (eqndag1node4.st.com [10.75.129.133]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 036182309E8; Mon, 12 Sep 2022 15:38:45 +0200 (CEST) Received: from [10.201.21.93] (10.75.127.122) by EQNDAG1NODE4.st.com (10.75.129.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Mon, 12 Sep 2022 15:38:44 +0200 Message-ID: Date: Mon, 12 Sep 2022 15:38:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Content-Language: en-US To: Arnd Bergmann , Olof Johansson , Kevin Hilman , SoC Team , arm-soc CC: Alexandre TORGUE , "linux-stm32@st-md-mailman.stormreply.com" , "linux-arm-kernel@lists.infradead.org" From: Alexandre TORGUE Subject: [GIT PULL] STM32 DT changes for v6.1 #1 X-Originating-IP: [10.75.127.122] X-ClientProxiedBy: GPXDAG2NODE4.st.com (10.75.127.68) To EQNDAG1NODE4.st.com (10.75.129.133) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-12_09,2022-09-12_01,2022-06-22_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220912_063857_814037_94D46660 X-CRM114-Status: GOOD ( 14.13 ) X-Spam-Score: -0.8 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Hi ARM SoC maintainers, Please consider this first round of STM32 DT updates for v6.1. Thanks Alex Content analysis details: (-0.8 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [91.207.212.93 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org Hi ARM SoC maintainers, Please consider this first round of STM32 DT updates for v6.1. Thanks Alex The following changes since commit 568035b01cfb107af8d2e4bd2fb9aea22cf5b868: Linux 6.0-rc1 (2022-08-14 15:50:18 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git tags/stm32-dt-for-v6.1-1 for you to fetch changes up to 04c26c5a2da8591fe7e37146592d907ef37492bd: ARM: dts: stm32: argon: remove spidev node (2022-09-12 15:19:12 +0200) ---------------------------------------------------------------- STM32 DT for v6.1, round 1 Highlights: ---------- - MPU: - General: - Add I2C support (5 instances) on STM32MP13. - Add SPI support (5 instabces) on STM32MP13. - Add timer interrupts support on STM32MP15. - ST boards: - Enable I2C1 and I2C5 on stm32mp135f-dk board. - Add SPI5 on stm32mp135f-dk board but disabled as only available on the GPIO expansion connector. - ARGON: - Remove spidev node as not used by the code. ---------------------------------------------------------------- Alain Volmat (4): ARM: dts: stm32: add i2c nodes into stm32mp131.dtsi ARM: dts: stm32: enable i2c1 and i2c5 on stm32mp135f-dk.dts ARM: dts: stm32: add spi nodes into stm32mp131.dtsi ARM: dts: stm32: add pinctrl and disabled spi5 node in stm32mp135f-dk Jagan Teki (1): ARM: dts: stm32: Fix typo in license text for Engicam boards Patrice Chotard (1): ARM: dts: stm32: Create separate pinmux for qspi cs pin in stm32mp15-pinctrl.dtsi Uwe Kleine-König (1): ARM: dts: stm32: Add timer interrupts on stm32mp15 Wolfram Sang (1): ARM: dts: stm32: argon: remove spidev node arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 57 ++++++++ arch/arm/boot/dts/stm32mp131.dtsi | 160 +++++++++++++++++++++ arch/arm/boot/dts/stm32mp135f-dk.dts | 33 +++++ arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 50 ++++--- arch/arm/boot/dts/stm32mp151.dtsi | 34 +++++ .../stm32mp157a-icore-stm32mp1-ctouch2-of10.dts | 2 +- .../dts/stm32mp157a-icore-stm32mp1-ctouch2.dts | 2 +- .../dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts | 2 +- arch/arm/boot/dts/stm32mp157a-icore-stm32mp1.dtsi | 2 +- ...m32mp157a-microgea-stm32mp1-microdev2.0-of7.dts | 2 +- .../stm32mp157a-microgea-stm32mp1-microdev2.0.dts | 2 +- .../boot/dts/stm32mp157a-microgea-stm32mp1.dtsi | 2 +- arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi | 6 - arch/arm/boot/dts/stm32mp157c-ev1.dts | 12 +- 14 files changed, 334 insertions(+), 32 deletions(-)