From patchwork Wed Sep 7 23:29:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julius Werner X-Patchwork-Id: 1675408 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=ehzYxHgo; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4MNJPW4YJZz1yhP for ; Thu, 8 Sep 2022 09:29:35 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229973AbiIGX3a (ORCPT ); Wed, 7 Sep 2022 19:29:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229459AbiIGX33 (ORCPT ); Wed, 7 Sep 2022 19:29:29 -0400 Received: from mail-pg1-x529.google.com (mail-pg1-x529.google.com [IPv6:2607:f8b0:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF5B2B7E9 for ; Wed, 7 Sep 2022 16:29:21 -0700 (PDT) Received: by mail-pg1-x529.google.com with SMTP id t70so9213321pgc.5 for ; Wed, 07 Sep 2022 16:29:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date; bh=nAzRb5IG40N9kD80lZ5f/eFJ3lUDj53vPPmtb3g2dNA=; b=ehzYxHgobx7obM5HHdDeMRSpB773IBQaabyUfdYTjMa+y945g0J9mPBOGR+LNF8RON kfz0/JBcMnTaDtjoQVaFkl6ad1O8zOSnIA/wAJBRDV7JHiLBCz11ms9/gK0LKThoSkw2 1/Jk05Bgn/su1PLyKkPwnjsyEAswVGF5HejoQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date; bh=nAzRb5IG40N9kD80lZ5f/eFJ3lUDj53vPPmtb3g2dNA=; b=FHL/9HM+03xSJwBOnDKsj5ZCZb2wxKlB3Q8r12W4/SWkNCFwnEgpF2Eq7z4weaKz3T tadcJ6Mbzv5+5aI7D7R5utz9UdiS2GFPxLrXIdO4gvS0198pFyINwDwNkCgMPf6NNUF8 IwcjBU7pti7UOd0iSgtmIoybzF3EI5+l15WmagWRT+ZBN9G6IIvJrObjkVBTg9Pb5TwZ vkYno0IbD1jtUFiDxSypxgPHA02yZexF+c9fbDvspaTS/gOS4hLRNSAGb7hKXX2STQ6V LX8LvuSUNIPJxVmVoMluTQjkt3wOuJpXgT+gwh0d7kGltvzNnkrFmGcgdZE2ZpV9E87/ CnNw== X-Gm-Message-State: ACgBeo0kci26/87JvKnUo3qfLtVnDFhozFpsgQkvHk1v/U+EhF44zle7 1ZYctoOR6YfdQ8dBlhJqFiDuwA== X-Google-Smtp-Source: AA6agR4hRE71BSSsnmKj9liCm/uZXU6+UW0r4qW60BKhrPdWz9/EkOJlUWuePemEvBGQ+ixkNBPUAw== X-Received: by 2002:a05:6a00:1d1a:b0:537:d750:65b5 with SMTP id a26-20020a056a001d1a00b00537d75065b5mr6318852pfx.85.1662593361201; Wed, 07 Sep 2022 16:29:21 -0700 (PDT) Received: from jwerner-p920.mtv.corp.google.com ([2620:15c:202:201:1cee:f8f:cc9f:568f]) by smtp.gmail.com with ESMTPSA id g6-20020a17090a708600b002000dabc356sm201521pjk.45.2022.09.07.16.29.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Sep 2022 16:29:20 -0700 (PDT) From: Julius Werner To: Krzysztof Kozlowski Cc: Rob Herring , Dmitry Osipenko , Doug Anderson , Jian-Jia Su , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Julius Werner Subject: [PATCH 1/4 v2] dt-bindings: memory: Factor out common properties of LPDDR bindings Date: Wed, 7 Sep 2022 16:29:11 -0700 Message-Id: <20220907232914.243502-1-jwerner@chromium.org> X-Mailer: git-send-email 2.37.2.789.g6183377224-goog MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The bindings for different LPDDR versions mostly use the same kinds of properties, so in order to reduce duplication when we're adding support for more versions, this patch creates a new lpddr-props subschema that can be referenced by the others to define these common parts. (This will consider a few smaller I/O width and density numbers "legal" for LPDDR3 that are usually not used there, but this should be harmless.) Signed-off-by: Julius Werner Acked-by: Rob Herring --- .../ddr/jedec,lpddr-props.yaml | 52 +++++++++++++++++++ .../memory-controllers/ddr/jedec,lpddr2.yaml | 40 ++------------ .../memory-controllers/ddr/jedec,lpddr3.yaml | 32 ++---------- 3 files changed, 60 insertions(+), 64 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml Changelog: - v2: - removed minItems - reordered io-width enum from lowest to highest - moved `$ref` below `mainainers` - removed part about undeprecating manufacturer-id diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml new file mode 100644 index 00000000000000..02700ac3c387ec --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-props.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common properties for LPDDR types + +description: + Different LPDDR types generally use the same properties and only differ in the + range of legal values for each. This file defines the common parts that can be + reused for each type. + +maintainers: + - Krzysztof Kozlowski + +properties: + revision-id: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Revision IDs read from Mode Register 6 and 7. One byte per uint32 cell (i.e. ). + maxItems: 2 + items: + minimum: 0 + maximum: 255 + + density: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Density in megabits of SDRAM chip. Decoded from Mode Register 8. + enum: + - 64 + - 128 + - 256 + - 512 + - 1024 + - 2048 + - 4096 + - 8192 + - 16384 + - 32768 + + io-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + IO bus width in bits of SDRAM chip. Decoded from Mode Register 8. + enum: + - 8 + - 16 + - 32 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml index 9d78f140609b6c..65f4926d39c254 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml @@ -9,6 +9,9 @@ title: LPDDR2 SDRAM compliant to JEDEC JESD209-2 maintainers: - Krzysztof Kozlowski +allOf: + - $ref: "jedec,lpddr-props.yaml#" + properties: compatible: oneOf: @@ -41,41 +44,6 @@ properties: Property is deprecated, use revision-id instead. deprecated: true - revision-id: - $ref: /schemas/types.yaml#/definitions/uint32-array - description: | - Revision IDs read from Mode Register 6 and 7. One byte per uint32 cell (i.e. ). - minItems: 2 - maxItems: 2 - items: - minimum: 0 - maximum: 255 - - density: - $ref: /schemas/types.yaml#/definitions/uint32 - description: | - Density in megabits of SDRAM chip. Obtained from device datasheet. - enum: - - 64 - - 128 - - 256 - - 512 - - 1024 - - 2048 - - 4096 - - 8192 - - 16384 - - 32768 - - io-width: - $ref: /schemas/types.yaml#/definitions/uint32 - description: | - IO bus width in bits of SDRAM chip. Obtained from device datasheet. - enum: - - 32 - - 16 - - 8 - tRRD-min-tck: $ref: /schemas/types.yaml#/definitions/uint32 maximum: 16 @@ -168,7 +136,7 @@ required: - density - io-width -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml index 48908a19473c3f..91b64943062472 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml @@ -9,6 +9,9 @@ title: LPDDR3 SDRAM compliant to JEDEC JESD209-3 maintainers: - Krzysztof Kozlowski +allOf: + - $ref: "jedec,lpddr-props.yaml#" + properties: compatible: items: @@ -20,24 +23,6 @@ properties: const: 1 deprecated: true - density: - $ref: /schemas/types.yaml#/definitions/uint32 - description: | - Density in megabits of SDRAM chip. - enum: - - 4096 - - 8192 - - 16384 - - 32768 - - io-width: - $ref: /schemas/types.yaml#/definitions/uint32 - description: | - IO bus width in bits of SDRAM chip. - enum: - - 32 - - 16 - manufacturer-id: $ref: /schemas/types.yaml#/definitions/uint32 description: | @@ -45,15 +30,6 @@ properties: deprecated, manufacturer should be derived from the compatible. deprecated: true - revision-id: - $ref: /schemas/types.yaml#/definitions/uint32-array - minItems: 2 - maxItems: 2 - items: - maximum: 255 - description: | - Revision value of SDRAM chip read from Mode Registers 6 and 7. - '#size-cells': const: 0 deprecated: true @@ -206,7 +182,7 @@ required: - density - io-width -additionalProperties: false +unevaluatedProperties: false examples: - | From patchwork Wed Sep 7 23:29:12 2022 Content-Type: text/plain; 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Wed, 07 Sep 2022 16:29:21 -0700 (PDT) From: Julius Werner To: Krzysztof Kozlowski Cc: Rob Herring , Dmitry Osipenko , Doug Anderson , Jian-Jia Su , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Julius Werner Subject: [PATCH 2/4 v2] dt-bindings: memory: Add numeric LPDDR compatible string variant Date: Wed, 7 Sep 2022 16:29:12 -0700 Message-Id: <20220907232914.243502-2-jwerner@chromium.org> X-Mailer: git-send-email 2.37.2.789.g6183377224-goog In-Reply-To: <20220907232914.243502-1-jwerner@chromium.org> References: <20220907232914.243502-1-jwerner@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch allows a new kind of compatible string for LPDDR parts in the device tree bindings, in addition to the existing hardcoded , strings. The new format contains manufacturer and part (revision) information in numerical form, such as lpddr3-ff,0201 for an LPDDR3 part with manufacturer ID ff and revision ID 0201. This helps cases where LPDDR parts are probed at runtime by boot firmware and cannot be matched to hardcoded part numbers, such as the firmware on the qcom/sc7280-herobrine boards does (which supports 4 different memory configurations at the moment, and more are expected to be added later at a point where the boot firmware can no longer be updated to specifically accomodate them). Signed-off-by: Julius Werner Acked-by: Rob Herring --- .../memory-controllers/ddr/jedec,lpddr-props.yaml | 10 ++++++++++ .../memory-controllers/ddr/jedec,lpddr2.yaml | 8 +++++--- .../memory-controllers/ddr/jedec,lpddr3.yaml | 12 ++++++++---- 3 files changed, 23 insertions(+), 7 deletions(-) Changelog: - v2 - Updated commit message to describe intended use case as an example diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml index 02700ac3c387ec..4114cfa8de67f1 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml @@ -15,6 +15,16 @@ maintainers: - Krzysztof Kozlowski properties: + compatible: + description: + Compatible strings can be either explicit vendor names and part numbers + (e.g. elpida,ECB240ABACN), or generated strings of the form + lpddrX-YY,ZZZZ where X is the LPDDR version, YY is the manufacturer ID + (from MR5) and ZZZZ is the revision ID (from MR6 and MR7). Both IDs are + formatted in lower case hexadecimal representation with leading zeroes. + The latter form can be useful when LPDDR nodes are created at runtime by + boot firmware that doesn't have access to static part number information. + revision-id: $ref: /schemas/types.yaml#/definitions/uint32-array description: diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml index 65f4926d39c254..400d8025f7f204 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml @@ -20,13 +20,15 @@ properties: - elpida,ECB240ABACN - elpida,B8132B2PB-6D-F - enum: - - jedec,lpddr2-s4 - - items: - - enum: + - jedec,lpddr2-nvm - jedec,lpddr2-s2 + - jedec,lpddr2-s4 - items: + - pattern: "^lpddr2-[0-9a-f]{2},[0-9a-f]{4}$" - enum: - jedec,lpddr2-nvm + - jedec,lpddr2-s2 + - jedec,lpddr2-s4 revision-id1: $ref: /schemas/types.yaml#/definitions/uint32 diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml index 91b64943062472..153066a352cd67 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml @@ -14,10 +14,14 @@ allOf: properties: compatible: - items: - - enum: - - samsung,K3QF2F20DB - - const: jedec,lpddr3 + oneOf: + - items: + - enum: + - samsung,K3QF2F20DB + - const: jedec,lpddr3 + - items: + - pattern: "^lpddr3-[0-9a-f]{2},[0-9a-f]{4}$" + - const: jedec,lpddr3 '#address-cells': const: 1 From patchwork Wed Sep 7 23:29:13 2022 Content-Type: text/plain; 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Wed, 07 Sep 2022 16:29:22 -0700 (PDT) From: Julius Werner To: Krzysztof Kozlowski Cc: Rob Herring , Dmitry Osipenko , Doug Anderson , Jian-Jia Su , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Julius Werner Subject: [PATCH 3/4 v2] dt-bindings: memory: Add jedec,lpddr4 and jedec,lpddr5 bindings Date: Wed, 7 Sep 2022 16:29:13 -0700 Message-Id: <20220907232914.243502-3-jwerner@chromium.org> X-Mailer: git-send-email 2.37.2.789.g6183377224-goog In-Reply-To: <20220907232914.243502-1-jwerner@chromium.org> References: <20220907232914.243502-1-jwerner@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds bindings for LPDDR4 and LPDDR5 memory analogous to the existing bindings for LPDDR2 and LPDDR3. For now, the new types are only needed for topology description, so other properties like timing parameters are omitted. They can be added later if needed. Signed-off-by: Julius Werner --- .../ddr/jedec,lpddr-props.yaml | 4 ++ .../memory-controllers/ddr/jedec,lpddr4.yaml | 36 ++++++++++++++ .../memory-controllers/ddr/jedec,lpddr5.yaml | 47 +++++++++++++++++++ 3 files changed, 87 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml Changelog: - v2 - removed minItems - moved `$ref` below `maintainers` - renamed example node from `lpddr4` to `lpddr` diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml index 4114cfa8de67f1..92ef660888f318 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml @@ -45,9 +45,13 @@ properties: - 512 - 1024 - 2048 + - 3072 - 4096 + - 6144 - 8192 + - 12288 - 16384 + - 24576 - 32768 io-width: diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml new file mode 100644 index 00000000000000..0b2394c032797f --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr4.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LPDDR4 SDRAM compliant to JEDEC JESD209-4 + +maintainers: + - Krzysztof Kozlowski + +allOf: + - $ref: "jedec,lpddr-props.yaml#" + +properties: + compatible: + items: + - pattern: "^lpddr4-[0-9a-f]{2},[0-9a-f]{4}$" + - const: jedec,lpddr4 + +required: + - compatible + - density + - io-width + +unevaluatedProperties: false + +examples: + - | + lpddr { + compatible = "lpddr4-ff,0100", "jedec,lpddr4"; + density = <8192>; + io-width = <16>; + manufacturer-id = <255>; + revision-id = <1 0>; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml new file mode 100644 index 00000000000000..d86e1e30380e47 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LPDDR5 SDRAM compliant to JEDEC JESD209-5 + +maintainers: + - Krzysztof Kozlowski + +allOf: + - $ref: "jedec,lpddr-props.yaml#" + +properties: + compatible: + items: + - pattern: "^lpddr5-[0-9a-f]{2},[0-9a-f]{4}$" + - const: jedec,lpddr5 + + serial-id: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Serial IDs read from Mode Registers 47 through 54. One byte per uint32 + cell (i.e. ). + maxItems: 8 + items: + minimum: 0 + maximum: 255 + +required: + - compatible + - density + - io-width + +unevaluatedProperties: false + +examples: + - | + lpddr { + compatible = "lpddr5-01,0200", "jedec,lpddr5"; + density = <8192>; + io-width = <8>; + manufacturer-id = <1>; + revision-id = <2 0>; + serial-id = <3 1 0 0 0 0 0 0>; + }; From patchwork Wed Sep 7 23:29:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julius Werner X-Patchwork-Id: 1675411 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=U1fDmxOv; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4MNJPY13Nxz1yp5 for ; Thu, 8 Sep 2022 09:29:37 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229974AbiIGX3d (ORCPT ); Wed, 7 Sep 2022 19:29:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229766AbiIGX33 (ORCPT ); Wed, 7 Sep 2022 19:29:29 -0400 Received: from mail-pf1-x431.google.com (mail-pf1-x431.google.com [IPv6:2607:f8b0:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70FA0DF2 for ; Wed, 7 Sep 2022 16:29:24 -0700 (PDT) Received: by mail-pf1-x431.google.com with SMTP id e68so3087841pfe.1 for ; Wed, 07 Sep 2022 16:29:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=26wB+6oXeV+aXPEoFQTjCmUsxTTyO/pi90w6t818OkM=; b=U1fDmxOvdHdgBxeIILx9x2+dLBCv/pMqLs1GzGsq7/ItBQYLs6cDgF2gqlrN930pFn RV8JxEr8o2vnEHMVTkb7x243vJB45shDFUNxmTHMJbKpcnotqzMCVVen6KVaibOdDx1G dIu9pgcVDFluuZikhsozAcGVXt7AfBTaupFHI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=26wB+6oXeV+aXPEoFQTjCmUsxTTyO/pi90w6t818OkM=; b=G3t4PlIE1kKWprWb9DL+285fWL0zDZ057cSO7bUdY2Fqs+ZPNn1rBM/2uBi/0YV46E 1PcxKjuMJktbjQeLozIrY/Ne6uXiwZePsFNA4Ukb4XJ2su4nJgwjFjj00FT437uD9JDw AaszjV/Vbc1HRfWPRs+dtTKbzT2YiUpr4HXRMJcanQLQNnlfDspieW3M4FUBDtXMzsXH DWpHq1GF4oXr5F+KK/j53PIqlQ7ViKOhkkLNHreJst2nzDhzfOrwqb4KJWsE1R/S/PXb tVRIOEt/h67Bo4VX4kXxDh+gi58RvopR1LGRytxMF2hcv8AZIYKiPx7mhxdyaTOOli2V NZDA== X-Gm-Message-State: ACgBeo2hnpJuHlJFlBH2MSVjw2mMCLjm6bHM+0ZYeQudf9jbeVMvg9h+ WEauqoY3wrUB8OAfjfYghi07kQ== X-Google-Smtp-Source: AA6agR5b7K8tACMSsGn6UNcBaEz94v2BcGAn53I1UyCfWlngqmdPNuJdvAeaDzei0kkefy6JhblGJw== X-Received: by 2002:aa7:9193:0:b0:536:62e6:1a84 with SMTP id x19-20020aa79193000000b0053662e61a84mr6150333pfa.20.1662593363930; Wed, 07 Sep 2022 16:29:23 -0700 (PDT) Received: from jwerner-p920.mtv.corp.google.com ([2620:15c:202:201:1cee:f8f:cc9f:568f]) by smtp.gmail.com with ESMTPSA id g6-20020a17090a708600b002000dabc356sm201521pjk.45.2022.09.07.16.29.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Sep 2022 16:29:23 -0700 (PDT) From: Julius Werner To: Krzysztof Kozlowski Cc: Rob Herring , Dmitry Osipenko , Doug Anderson , Jian-Jia Su , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Julius Werner Subject: [PATCH 4/4 v2] dt-bindings: memory: Add jedec,lpddrX-channel binding Date: Wed, 7 Sep 2022 16:29:14 -0700 Message-Id: <20220907232914.243502-4-jwerner@chromium.org> X-Mailer: git-send-email 2.37.2.789.g6183377224-goog In-Reply-To: <20220907232914.243502-1-jwerner@chromium.org> References: <20220907232914.243502-1-jwerner@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds a new device tree binding for an LPDDR channel to serve as a top-level organizing node for LPDDR part nodes nested below it. An LPDDR channel needs to have an "io-width" property to describe its width (this is important because this width does not always match the io-width of the part number, indicating that multiple parts are wired in parallel on the same channel), as well as one or more nested "rank@X" nodes. Those represent information about the individual ranks of each LPDDR part connected on that channel and should match the existing "jedec,lpddrX" bindings for individual LPDDR parts. New platforms should be using this node -- the existing practice of providing a raw, toplevel "jedec,lpddrX" node without indication of how many identical parts are in the system should be considered deprecated. Signed-off-by: Julius Werner --- .../ddr/jedec,lpddr-channel.yaml | 146 ++++++++++++++++++ .../ddr/jedec,lpddr-props.yaml | 10 +- 2 files changed, 155 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml Changelog: - v2: - changed $ref for rank subnode to specifically match LPDDR type in compatible string - moved `reg` up to be listed right below `compatible` diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml new file mode 100644 index 00000000000000..34b5bd153f63e0 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml @@ -0,0 +1,146 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LPDDR channel with chip/rank topology description + +description: + An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS, + CK, etc.) that connect one or more LPDDR chips to a host system. The main + purpose of this node is to overall LPDDR topology of the system, including the + amount of individual LPDDR chips and the ranks per chip. + +maintainers: + - Julius Werner + +properties: + compatible: + enum: + - jedec,lpddr2-channel + - jedec,lpddr3-channel + - jedec,lpddr4-channel + - jedec,lpddr5-channel + + io-width: + description: + The number of DQ pins in the channel. If this number is different + from (a multiple of) the io-width of the LPDDR chip, that means that + multiple instances of that type of chip are wired in parallel on this + channel (with the channel's DQ pins split up between the different + chips, and the CA, CS, etc. pins of the different chips all shorted + together). This means that the total physical memory controlled by a + channel is equal to the sum of the densities of each rank on the + connected LPDDR chip, times the io-width of the channel divided by + the io-width of the LPDDR chip. + enum: + - 8 + - 16 + - 32 + - 64 + - 128 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^rank@[0-9]+$": + type: object + description: + Each physical LPDDR chip may have one or more ranks. Ranks are + internal but fully independent sub-units of the chip. Each LPDDR bus + transaction on the channel targets exactly one rank, based on the + state of the CS pins. Different ranks may have different densities and + timing requirements. + required: + - reg + +allOf: + - if: + properties: + compatible: + contains: + const: jedec,lpddr2-channel + then: + patternProperties: + "^rank@[0-9]+$": + $ref: /schemas/memory-controllers/ddr/jedec,lpddr2.yaml# + - if: + properties: + compatible: + contains: + const: jedec,lpddr3-channel + then: + patternProperties: + "^rank@[0-9]+$": + $ref: /schemas/memory-controllers/ddr/jedec,lpddr3.yaml# + - if: + properties: + compatible: + contains: + const: jedec,lpddr4-channel + then: + patternProperties: + "^rank@[0-9]+$": + $ref: /schemas/memory-controllers/ddr/jedec,lpddr4.yaml# + - if: + properties: + compatible: + contains: + const: jedec,lpddr5-channel + then: + patternProperties: + "^rank@[0-9]+$": + $ref: /schemas/memory-controllers/ddr/jedec,lpddr5.yaml# + +required: + - compatible + - io-width + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + lpddr-channel0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "jedec,lpddr3-channel"; + io-width = <32>; + + rank@0 { + compatible = "lpddr3-ff,0100", "jedec,lpddr3"; + reg = <0>; + density = <8192>; + io-width = <16>; + revision-id = <1 0>; + }; + }; + + lpddr-channel1 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "jedec,lpddr4-channel"; + io-width = <32>; + + rank@0 { + compatible = "lpddr4-05,0301", "jedec,lpddr4"; + reg = <0>; + density = <4096>; + io-width = <32>; + revision-id = <3 1>; + }; + + rank@1 { + compatible = "lpddr4-05,0301", "jedec,lpddr4"; + reg = <1>; + density = <2048>; + io-width = <32>; + revision-id = <3 1>; + }; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml index 92ef660888f318..30267ce701249a 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml @@ -9,7 +9,8 @@ title: Common properties for LPDDR types description: Different LPDDR types generally use the same properties and only differ in the range of legal values for each. This file defines the common parts that can be - reused for each type. + reused for each type. Nodes using this schema should generally be nested under + an LPDDR channel node. maintainers: - Krzysztof Kozlowski @@ -25,6 +26,13 @@ properties: The latter form can be useful when LPDDR nodes are created at runtime by boot firmware that doesn't have access to static part number information. + reg: + description: + The rank number of this LPDDR rank when used as a subnode to an LPDDR + channel. + minimum: 0 + maximum: 3 + revision-id: $ref: /schemas/types.yaml#/definitions/uint32-array description: