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Tue, 05 Jul 2022 12:17:09 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5131610002A; Tue, 5 Jul 2022 12:17:08 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 3AFC421BF51; Tue, 5 Jul 2022 12:17:08 +0200 (CEST) Received: from [10.201.21.93] (10.75.127.48) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2308.20; Tue, 5 Jul 2022 12:17:07 +0200 Message-ID: Date: Tue, 5 Jul 2022 12:17:07 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Content-Language: en-US From: Alexandre TORGUE Subject: [GIT PULL] STM32 DT changes for v5.20 #1 To: Arnd Bergmann , Olof Johansson , Kevin Hilman , SoC Team , arm-soc CC: Alexandre TORGUE , "linux-stm32@st-md-mailman.stormreply.com" , "linux-arm-kernel@lists.infradead.org" X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-05_08,2022-06-28_01,2022-06-22_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220705_031724_366722_BF14D319 X-CRM114-Status: GOOD ( 16.19 ) X-Spam-Score: -0.8 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Hi ARM SoC maintainers, Please consider this first round of STM32 DT updates for v5.20. It mainly adds a new DH board and enables SCMI / OPTEE for STM32MP13. This PR is based on the PR sent for fixes (tag: stm32-dt-for-v5.19 [...] Content analysis details: (-0.8 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [91.207.212.93 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org Hi ARM SoC maintainers, Please consider this first round of STM32 DT updates for v5.20. It mainly adds a new DH board and enables SCMI / OPTEE for STM32MP13. This PR is based on the PR sent for fixes (tag: stm32-dt-for-v5.19-fixes-2). Thanks Alex The following changes since commit 1d0c1aadf1fd9f3de95d1532b3651e8634546e71: ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15 (2022-07-04 09:10:24 +0200) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git tags/stm32-dt-for-v5.20-1 for you to fetch changes up to cc6280cf885ce9ab923b9f9779aa8fbe10983d20: ARM: dts: stm32: Add ST MIPID02 bindings to AV96 (2022-07-05 11:42:11 +0200) ---------------------------------------------------------------- STM32 DT for v5.20, round 1 Highlights: ---------- - MCU: -Fix whitespace coding style. No functional changes. - MPU: - General: - Remove specific IPCC wakeup interrupt on STM32MP15. - Enable OPTEE firmware and scmi support (clock/reset) on STM32MP13. It allows to enable RCC clock driver. - Add new pins configurations groups. - DH boards: - Add DHCOR based DRC Compact board. It embeds: 2xETH, 1xCAN, uSD, USB, eMMC and SDIO wifi. - Add ST MIPID02 bindings to AV96 (not enabled by default) - OSD32: - Correct vcc-supply for eeprom. - fix missing internally connected voltage regulator (ldo3 supplied by vdd_ddr). ---------------------------------------------------------------- Alexandre Torgue (1): dt-bindings: rcc: stm32: select the "secure" path for stm32mp13 Fabien Dessenne (1): ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151 Gabriel Fernandez (3): ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP13 ARM: dts: stm32: add RCC on STM32MP13x SoC family ARM: dts: stm32: add optee reserved memory on stm32mp135f-dk Krzysztof Kozlowski (1): ARM: dts: stm32: adjust whitespace around '=' on MCU boards Leonard Göhrs (2): ARM: dts: stm32: fix missing internally connected voltage regulator for OSD32MP1 ARM: dts: stm32: correct vcc-supply for eeprom on stm32mp15xx-osd32 Marek Vasut (12): ARM: dts: stm32: Move DHCOR BUCK3 VDD 2V9 adjustment to 1V8 DTSI ARM: dts: stm32: Fix SPI2 pinmux pin comments on stm32mp15 dt-bindings: arm: stm32: Add compatible string for DH electronics DHCOR DRC Compact ARM: dts: stm32: Add alternate pinmux for CAN1 pins ARM: dts: stm32: Add alternate pinmux for SPI2 pins ARM: dts: stm32: Add alternate pinmux for UART3 pins ARM: dts: stm32: Add alternate pinmux for UART4 pins ARM: dts: stm32: Add alternate pinmux for UART5 pins ARM: dts: stm32: Add DHCOR based DRC Compact board ARM: dts: stm32: Add alternate pinmux for DCMI pins ARM: dts: stm32: Add alternate pinmux for RCC pin ARM: dts: stm32: Add ST MIPID02 bindings to AV96 .../devicetree/bindings/arm/stm32/stm32.yaml | 8 +- .../devicetree/bindings/clock/st,stm32mp1-rcc.yaml | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/stm32429i-eval.dts | 8 +- arch/arm/boot/dts/stm32h743.dtsi | 4 +- arch/arm/boot/dts/stm32h743i-disco.dts | 8 +- arch/arm/boot/dts/stm32h743i-eval.dts | 8 +- arch/arm/boot/dts/stm32h750i-art-pi.dts | 8 +- arch/arm/boot/dts/stm32mp131.dtsi | 140 ++++----- arch/arm/boot/dts/stm32mp133.dtsi | 4 +- arch/arm/boot/dts/stm32mp135f-dk.dts | 11 + arch/arm/boot/dts/stm32mp13xc.dtsi | 3 +- arch/arm/boot/dts/stm32mp13xf.dtsi | 3 +- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 177 ++++++++++- arch/arm/boot/dts/stm32mp151.dtsi | 7 +- .../arm/boot/dts/stm32mp153c-dhcor-drc-compact.dts | 30 ++ arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi | 55 ++++ .../boot/dts/stm32mp15xx-dhcor-drc-compact.dtsi | 322 +++++++++++++++++++++ arch/arm/boot/dts/stm32mp15xx-dhcor-io1v8.dtsi | 5 + arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 4 +- arch/arm/boot/dts/stm32mp15xx-osd32.dtsi | 9 +- 21 files changed, 709 insertions(+), 107 deletions(-) create mode 100644 arch/arm/boot/dts/stm32mp153c-dhcor-drc-compact.dts create mode 100644 arch/arm/boot/dts/stm32mp15xx-dhcor-drc-compact.dtsi