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Mon, 04 Jul 2022 06:27:49 +0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 2646RkPB16449966 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 4 Jul 2022 06:27:46 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0083B5204E; Mon, 4 Jul 2022 06:27:46 +0000 (GMT) Received: from [9.200.45.33] (unknown [9.200.45.33]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 537F75205A; Mon, 4 Jul 2022 06:27:44 +0000 (GMT) Message-ID: <001654df-a083-c10f-6c0f-dfda0de6e87b@linux.ibm.com> Date: Mon, 4 Jul 2022 14:27:42 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Content-Language: en-US To: gcc-patches Subject: [PATCH v3, rs6000] Disable TImode from Bool expanders [PR100694, PR93123] X-TM-AS-GCONF: 00 X-Proofpoint-GUID: NO7CyvwYTj2ktfUsv1cGn1Zc_BNz8Omh X-Proofpoint-ORIG-GUID: 1FHK6NpESMpbSh9ogXArgrCzaSSD_tvP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-04_05,2022-06-28_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 clxscore=1015 malwarescore=0 mlxscore=0 mlxlogscore=999 phishscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 spamscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2204290000 definitions=main-2207040025 X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: HAO CHEN GUI via Gcc-patches From: HAO CHEN GUI Reply-To: HAO CHEN GUI Cc: Peter Bergner , David , Segher Boessenkool Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch fails TImode for all 128-bit logical operation expanders. So TImode splits to two DI registers during expand. Potential optimizations can be taken after expand pass. Originally, the TImode logical operations are split after reload pass. It's too late. The test case illustrates it. Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. Is this okay for trunk? Any recommendations? Thanks a lot. ChangeLog 2022-07-04 Haochen Gui gcc/ PR target/100694 * config/rs6000/rs6000.md (and3): Fail TImode. (ior3): Likewise. (xor3): Likewise. (nor3): Likewise. (andc3): Likewise. (eqv3): Likewise. (nand3): Likewise. (orc3): Likewise. (one_cmpl2): Define as an expand and fail TImode. (*one_cmpl2): Define as an anonymous insn pattern. gcc/testsuite/ PR target/100694 * gcc.target/powerpc/pr100694.c: New. * gcc.target/powerpc/pr92398.c: New. * gcc.target/powerpc/pr92398.h: Remove. * gcc.target/powerpc/pr92398.p9-.c: Remove. * gcc.target/powerpc/pr92398.p9+.c: Remove. patch.diff diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index c55ee7e171a..6e57aac3ebf 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -7078,27 +7078,38 @@ (define_expand "subti3" }) ;; 128-bit logical operations expanders +;; Fail TImode in all 128-bit logical operations expanders and split it into +;; two DI registers. (define_expand "and3" [(set (match_operand:BOOL_128 0 "vlogical_operand") (and:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand") (match_operand:BOOL_128 2 "vlogical_operand")))] "" - "") +{ + if (mode == TImode) + FAIL; +}) (define_expand "ior3" [(set (match_operand:BOOL_128 0 "vlogical_operand") (ior:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand") (match_operand:BOOL_128 2 "vlogical_operand")))] "" - "") +{ + if (mode == TImode) + FAIL; +}) (define_expand "xor3" [(set (match_operand:BOOL_128 0 "vlogical_operand") (xor:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand") (match_operand:BOOL_128 2 "vlogical_operand")))] "" - "") +{ + if (mode == TImode) + FAIL; +}) (define_expand "nor3" [(set (match_operand:BOOL_128 0 "vlogical_operand") @@ -7106,7 +7117,10 @@ (define_expand "nor3" (not:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand")) (not:BOOL_128 (match_operand:BOOL_128 2 "vlogical_operand"))))] "" - "") +{ + if (mode == TImode) + FAIL; +}) (define_expand "andc3" [(set (match_operand:BOOL_128 0 "vlogical_operand") @@ -7114,7 +7128,10 @@ (define_expand "andc3" (not:BOOL_128 (match_operand:BOOL_128 2 "vlogical_operand")) (match_operand:BOOL_128 1 "vlogical_operand")))] "" - "") +{ + if (mode == TImode) + FAIL; +}) ;; Power8 vector logical instructions. (define_expand "eqv3" @@ -7123,7 +7140,10 @@ (define_expand "eqv3" (xor:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand") (match_operand:BOOL_128 2 "vlogical_operand"))))] "mode == TImode || mode == PTImode || TARGET_P8_VECTOR" - "") +{ + if (mode == TImode) + FAIL; +}) ;; Rewrite nand into canonical form (define_expand "nand3" @@ -7132,7 +7152,10 @@ (define_expand "nand3" (not:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand")) (not:BOOL_128 (match_operand:BOOL_128 2 "vlogical_operand"))))] "mode == TImode || mode == PTImode || TARGET_P8_VECTOR" - "") +{ + if (mode == TImode) + FAIL; +}) ;; The canonical form is to have the negated element first, so we need to ;; reverse arguments. @@ -7142,7 +7165,10 @@ (define_expand "orc3" (not:BOOL_128 (match_operand:BOOL_128 2 "vlogical_operand")) (match_operand:BOOL_128 1 "vlogical_operand")))] "mode == TImode || mode == PTImode || TARGET_P8_VECTOR" - "") +{ + if (mode == TImode) + FAIL; +}) ;; 128-bit logical operations insns and split operations (define_insn_and_split "*and3_internal" @@ -7394,7 +7420,17 @@ (define_insn_and_split "*eqv3_internal2" (const_string "16")))]) ;; 128-bit one's complement -(define_insn_and_split "one_cmpl2" +(define_expand "one_cmpl2" + [(set (match_operand:BOOL_128 0 "vlogical_operand" "=") + (not:BOOL_128 + (match_operand:BOOL_128 1 "vlogical_operand" "")))] + "" +{ + if (mode == TImode) + FAIL; +}) + +(define_insn_and_split "*one_cmpl2" [(set (match_operand:BOOL_128 0 "vlogical_operand" "=") (not:BOOL_128 (match_operand:BOOL_128 1 "vlogical_operand" "")))] diff --git a/gcc/testsuite/gcc.target/powerpc/pr100694.c b/gcc/testsuite/gcc.target/powerpc/pr100694.c new file mode 100644 index 00000000000..99dd3ca89ff --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr100694.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target int128 } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler-times {\mstd\M} 2 } } */ +/* { dg-final { scan-assembler-not {\mli\M} } } */ +/* { dg-final { scan-assembler-not {\mor\M} } } */ + +/* It just needs two std. */ +void foo (unsigned __int128* res, unsigned long long hi, unsigned long long lo) +{ + unsigned __int128 i = hi; + i <<= 64; + i |= lo; + *res = i; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.c b/gcc/testsuite/gcc.target/powerpc/pr92398.c new file mode 100644 index 00000000000..7d6201cc5bb --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr92398.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target int128 } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler-times {\mnot\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstd\M} 2 } } */ + +/* All platforms should generate the same instructions: not;not;std;std. */ +void bar (__int128_t *dst, __int128_t src) +{ + *dst = ~src; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.h b/gcc/testsuite/gcc.target/powerpc/pr92398.h deleted file mode 100644 index 5a4a8bcab80..00000000000 --- a/gcc/testsuite/gcc.target/powerpc/pr92398.h +++ /dev/null @@ -1,17 +0,0 @@ -/* This test code is included into pr92398.p9-.c and pr92398.p9+.c. - The two files have the tests for the number of instructions generated for - P9- versus P9+. - - store generates difference instructions as below: - P9+: mtvsrdd;xxlnot;stxv. - P8/P7/P6 LE: not;not;std;std. - P8 BE: mtvsrd;mtvsrd;xxpermdi;xxlnor;stxvd2x. - P7/P6 BE: std;std;addi;lxvd2x;xxlnor;stxvd2x. - P9+ and P9- LE are expected, P6/P7/P8 BE are unexpected. */ - -void -bar (__int128_t *dst, __int128_t src) -{ - *dst = ~src; -} - diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c b/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c deleted file mode 100644 index 72dd1d9a274..00000000000 --- a/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c +++ /dev/null @@ -1,12 +0,0 @@ -/* { dg-do compile { target { lp64 && has_arch_pwr9 } } } */ -/* { dg-require-effective-target powerpc_vsx_ok } */ -/* { dg-options "-O2 -mvsx" } */ - -/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mstxv\M} 1 } } */ -/* { dg-final { scan-assembler-not {\mld\M} } } */ -/* { dg-final { scan-assembler-not {\mnot\M} } } */ - -/* Source code for the test in pr92398.h */ -#include "pr92398.h" diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c b/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c deleted file mode 100644 index bd7fa98af51..00000000000 --- a/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c +++ /dev/null @@ -1,10 +0,0 @@ -/* { dg-do compile { target { lp64 && {! has_arch_pwr9} } } } */ -/* { dg-require-effective-target powerpc_vsx_ok } */ -/* { dg-options "-O2 -mvsx" } */ - -/* { dg-final { scan-assembler-times {\mnot\M} 2 { xfail be } } } */ -/* { dg-final { scan-assembler-times {\mstd\M} 2 { xfail { { {! has_arch_pwr9} && has_arch_pwr8 } && be } } } } */ - -/* Source code for the test in pr92398.h */ -#include "pr92398.h" -