From patchwork Tue Jun 28 15:26:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Noah Goldstein X-Patchwork-Id: 1649610 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha256 header.s=default header.b=BcFFv1W+; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LXT3H6Vtjz9sGJ for ; Wed, 29 Jun 2022 01:26:51 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id CD0A8381F715 for ; Tue, 28 Jun 2022 15:26:49 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CD0A8381F715 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1656430009; bh=nYicdALzlBWGztfp+KyIlLMcO98RlUiVeNojcrA5mlI=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=BcFFv1W+gIUtMg8JphRnLqrFX9OTrbA/tJvxVnQTM9eVEOw2cwLtMjphS6pKhx6iQ j29BOsaewKWm/9v8zINbY+PyRCftgkf53ceCFjHBi6nXRS4afuGS+9NuLM2FHF2t9j NLYxXqHAK966U1/Wm2onWkL8DevDu9Z3Hbd6SjCs= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by sourceware.org (Postfix) with ESMTPS id 8DE41383F64B for ; Tue, 28 Jun 2022 15:26:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 8DE41383F64B Received: by mail-pj1-x102f.google.com with SMTP id d14so12925890pjs.3 for ; Tue, 28 Jun 2022 08:26:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nYicdALzlBWGztfp+KyIlLMcO98RlUiVeNojcrA5mlI=; b=fLOPzKXpWO3CwOqR/YVoqAlGttqinnw1fInvpsZDLhO1xaOHSoGmJXy2IGEGE1uhIt d5838MCm1Q3fphDWBYMMz3JED7wuUMGZEl+9K/1leiRWtDf3asDGame9/mV0ZZXZcYP3 oTTFoJ4PLlquMRdMRJ39NITqcYSm4kpUrg5GsZVFJHXKTM2npg/mgZOfB7ur1ICLFFlp DoPOmLLCBcNLcEX/32NygVGoa2aGgtRTe+tDaSnBzU2Pp6ufZRiQqIre0WiZuJ3l6ZZr pbc0/JWw2jJv5q7Yun7L6UaD/gDT7LROVfFoJPiPGYnOWyO+GBylttCPqVkRjqmdaOWf AxaQ== X-Gm-Message-State: AJIora+xlgaLixjgb3E0vQNwjCSEjLESr+B3HPTIpSOgXOwlzVtAOGso yq4MatKgNXI75kosgqI8w1GLLEwUgCo= X-Google-Smtp-Source: AGRyM1v/hB5M3Hdv/dplIJ3EI95oTaIQN0R9TzljG+8R6bjmVawXJMOOWL4m9ftK/HIoiTdTzeDabw== X-Received: by 2002:a17:90a:7c05:b0:1ee:e40c:589b with SMTP id v5-20020a17090a7c0500b001eee40c589bmr188504pjf.78.1656429994375; Tue, 28 Jun 2022 08:26:34 -0700 (PDT) Received: from noah-tgl.. ([192.55.60.43]) by smtp.gmail.com with ESMTPSA id h15-20020a170902680f00b00161e50e2245sm9407765plk.178.2022.06.28.08.26.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jun 2022 08:26:34 -0700 (PDT) To: libc-alpha@sourceware.org Subject: [PATCH v1] x86: Add support for building strstr with explicit ISA level Date: Tue, 28 Jun 2022 08:26:27 -0700 Message-Id: <20220628152628.17802-2-goldstein.w.n@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220628152628.17802-1-goldstein.w.n@gmail.com> References: <20220628152628.17802-1-goldstein.w.n@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Noah Goldstein via Libc-alpha From: Noah Goldstein Reply-To: Noah Goldstein Errors-To: libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org Sender: "Libc-alpha" Small changes for this function as the generic implementation remains the same for all ISA levels. Only changes are using the X86_ISA_CPU_FEATURE{S}_{USABLE|ARCH}_P macros so that some of the checks at least can constant evaluate and some comments explaining the ISA constraints on the function. --- sysdeps/x86_64/multiarch/ifunc-impl-list.c | 13 +++++++------ sysdeps/x86_64/multiarch/strstr.c | 10 +++++----- 2 files changed, 12 insertions(+), 11 deletions(-) diff --git a/sysdeps/x86_64/multiarch/ifunc-impl-list.c b/sysdeps/x86_64/multiarch/ifunc-impl-list.c index 0d28319905..a1bff560bc 100644 --- a/sysdeps/x86_64/multiarch/ifunc-impl-list.c +++ b/sysdeps/x86_64/multiarch/ifunc-impl-list.c @@ -620,12 +620,13 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, /* Support sysdeps/x86_64/multiarch/strstr.c. */ IFUNC_IMPL (i, name, strstr, - IFUNC_IMPL_ADD (array, i, strstr, - (CPU_FEATURE_USABLE (AVX512VL) - && CPU_FEATURE_USABLE (AVX512BW) - && CPU_FEATURE_USABLE (AVX512DQ) - && CPU_FEATURE_USABLE (BMI2)), - __strstr_avx512) + /* All implementations of strstr are built at all ISA levels. */ + IFUNC_IMPL_ADD (array, i, strstr, + (CPU_FEATURE_USABLE (AVX512VL) + && CPU_FEATURE_USABLE (AVX512BW) + && CPU_FEATURE_USABLE (AVX512DQ) + && CPU_FEATURE_USABLE (BMI2)), + __strstr_avx512) IFUNC_IMPL_ADD (array, i, strstr, 1, __strstr_sse2_unaligned) IFUNC_IMPL_ADD (array, i, strstr, 1, __strstr_generic)) diff --git a/sysdeps/x86_64/multiarch/strstr.c b/sysdeps/x86_64/multiarch/strstr.c index 2b83199245..3f86bfa5f2 100644 --- a/sysdeps/x86_64/multiarch/strstr.c +++ b/sysdeps/x86_64/multiarch/strstr.c @@ -49,13 +49,13 @@ IFUNC_SELECTOR (void) const struct cpu_features *cpu_features = __get_cpu_features (); if (!CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_AVX512) - && CPU_FEATURE_USABLE_P (cpu_features, AVX512VL) - && CPU_FEATURE_USABLE_P (cpu_features, AVX512BW) - && CPU_FEATURE_USABLE_P (cpu_features, AVX512DQ) - && CPU_FEATURE_USABLE_P (cpu_features, BMI2)) + && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX512VL) + && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX512BW) + && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX512DQ) + && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, BMI2)) return __strstr_avx512; - if (CPU_FEATURES_ARCH_P (cpu_features, Fast_Unaligned_Load)) + if (X86_ISA_CPU_FEATURES_ARCH_P (cpu_features, Fast_Unaligned_Load, )) return __strstr_sse2_unaligned; return __strstr_generic;