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Tue, 31 May 2022 13:46:34 +0000 (GMT) Received: from localhost.localdomain (unknown [9.145.83.178]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 31 May 2022 13:46:34 +0000 (GMT) From: Frederic Barrat To: skiboot@lists.ozlabs.org, arbab@linux.ibm.com Date: Tue, 31 May 2022 15:46:33 +0200 Message-Id: <20220531134633.376077-1-fbarrat@linux.ibm.com> X-Mailer: git-send-email 2.35.3 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: dVYSX9JiAr7utYlIY2GqawU3uwDfYW3O X-Proofpoint-GUID: dVYSX9JiAr7utYlIY2GqawU3uwDfYW3O X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514 definitions=2022-05-31_06,2022-05-30_03,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 adultscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 mlxlogscore=999 phishscore=0 mlxscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2204290000 definitions=main-2205310068 Subject: [Skiboot] [PATCH] xive: Fix NSR value when dumping the state of thread context X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: clg@kaod.org Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" There's no reason to skip 2 bits when printing the Notification Source Register (NSR) of any thread context ring. So it's got to be a silly mistake and we should shift by 56 bits and not 58 :-) Signed-off-by: Frederic Barrat Reviewed-by: Dan Horák Reviewed-by: Cédric Le Goater --- hw/xive.c | 2 +- hw/xive2.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/xive.c b/hw/xive.c index 34b92f1e..60552763 100644 --- a/hw/xive.c +++ b/hw/xive.c @@ -4971,7 +4971,7 @@ static int64_t opal_xive_dump_tm(uint32_t offset, const char *n, uint32_t pir) " W2 W3\n", pir); prlog(PR_INFO, "CPU[%04x]: %02x %02x %02x %02x %02x " "%02x %02x %02x %08x %08x\n", pir, - (uint8_t)(v0 >> 58) & 0xff, (uint8_t)(v0 >> 48) & 0xff, + (uint8_t)(v0 >> 56) & 0xff, (uint8_t)(v0 >> 48) & 0xff, (uint8_t)(v0 >> 40) & 0xff, (uint8_t)(v0 >> 32) & 0xff, (uint8_t)(v0 >> 24) & 0xff, (uint8_t)(v0 >> 16) & 0xff, (uint8_t)(v0 >> 8) & 0xff, (uint8_t)(v0 ) & 0xff, diff --git a/hw/xive2.c b/hw/xive2.c index ea55423b..8e2a1f2d 100644 --- a/hw/xive2.c +++ b/hw/xive2.c @@ -4464,7 +4464,7 @@ static int64_t opal_xive_dump_tm(uint32_t offset, const char *n, uint32_t pir) " W2 W3\n", pir); prlog(PR_INFO, "CPU[%04x]: %02x %02x %02x %02x %02x " "%02x %02x %02x %08x %08x\n", pir, - (uint8_t)(v0 >> 58) & 0xff, (uint8_t)(v0 >> 48) & 0xff, + (uint8_t)(v0 >> 56) & 0xff, (uint8_t)(v0 >> 48) & 0xff, (uint8_t)(v0 >> 40) & 0xff, (uint8_t)(v0 >> 32) & 0xff, (uint8_t)(v0 >> 24) & 0xff, (uint8_t)(v0 >> 16) & 0xff, (uint8_t)(v0 >> 8) & 0xff, (uint8_t)(v0 ) & 0xff,